JPH0195628A - Radio receiver - Google Patents

Abstract

PURPOSE:To attain counting without malfunction by supplying an FMIF signal and an AMIF signal used for an IF counting a counter at a sufficient level. CONSTITUTION:The output signal of a buffer circuit 25 for IF counting in common to FM and AM reception is fed to 1st and 2nd counters 27, 28 to attain IF counting. In such a case, since an amplification transistor(TR) is operated to the FMIF signal in the common emitter, the FMIF signal at a low level is amplified to a level suitable for the level of the counting. Since the amplification TR is operated as the emitter follower with respect to the AMIF signal, the AMIF signal with a high level is supplied to the counter as it is. Thus, the counter attained sure counting to prevent malfunction.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a radio receiver that can selectively receive 2M radio broadcasting and AM radio broadcasting, and particularly relates to an IF counting type tuning state detection circuit. The present invention relates to a radio receiver comprising:

(b) Prior art 1°86-'87 issued on August 10, 1986
Pages 439 to 447 of the Sanyo Semiconductor Data Book Home Audio Integrated Circuit Edition describes the ICLM7000 for frequency synthesizers used in radio receivers. The IC has a built-in IF counter for detecting the tuning state, and the output signal of the counter can be used as a search stop signal or the like.

A frequency synthesizer IC with a built-in IF counter is
As shown in FIG. 2, it is combined with a tuner section to form a radio receiver. In Figure 2, the antenna (1
) The FM radio signal received by the RF amplifier circuit (2)
The signal is amplified by the mixing circuit (3), and the signal is converted to IF times by the mixing circuit (3).
Amplification errors occur in the F amplifier circuit (4), and FM detection occurs in the detection circuit (5). Further, the AM radio signal received by the antenna (6) is amplified by the RF amplifier circuit (7), and the mixing circuit (
8), the signal is converted into an IF signal, amplified by a 1F amplifier circuit (9), and AM detected by a detection circuit (10). Therefore, a demodulated FM radio signal is obtained at the first output terminal (11), and a demodulated AM radio signal is obtained at the second output terminal (12).

By using the circuit shown in FIG. 2, automatic search reception can be performed. If the PLL (13) is allowed to operate and the output signal frequencies of the local oscillation circuits (14) and (15) are variably controlled, the tuning state of the receiver changes. Now, the receiver is in a state where it can receive the FM band, and P L L (13
), the tuning frequency changes in predetermined steps (for example, 10 KHz). When the tuning point of a certain station is approached during auto-search, a tuning signal is generated from the IF amplifier circuit (4), auto-search is temporarily stopped, and IF counting operation is started. The IF count operation is performed by I
10.7MHz FMI obtained from F amplifier circuit (4)
This is done by applying the FM signal to the first counter (18) via the buffer circuit (16) and the grounding circuit (17).In addition, since the FM band is being received, the control from the control circuit (19) is FM grounding circuit 17 according to the signal
> is released, and the AM grounding circuit (20) grounds the input terminal of the second counter (21). First counter (1
When the count value of 8) reaches a predetermined value, the first counter 18
) generates a control signal, and the search operation of PLL (13) is stopped. Further, if the count value of the first counter (18) does not reach a predetermined value, no control signal is generated;
Auto search continues.

Note that similar operations are performed when receiving the AM band.

As described above, if the IF counting operation is performed using a counter, the search operation can be stopped only when the intermediate frequency signal of 10.7 MHz or 455 KHz is generated at a predetermined level or higher, that is, when correct tuning is performed. This allows the accuracy of auto search to be improved.

(c) Problems to be solved by the invention By the way, normally the circuits from the RF amplifier circuit (2) to the detection circuit (5) for FM reception are arranged in a first IC (integrated circuit), The circuits from the RF amplifier circuit (7) to the detection circuit (10) can be arranged in the second IC. In addition, the first and second counters (18) and (21) and P
L L (13) is placed in yet another third IC (LSI or microcomputer). In that case, the buffer circuits (16) and (22) for IF counting are
and a dedicated output terminal is also arranged in the second IC. Moreover, the first and second counters (
18) and (21) are arranged, and a dedicated input terminal is also arranged, it is easy to perform IF counting using the first to third ICs.

However, in an FM-AMM IC that incorporates both an FM reception circuit and an AM reception circuit, the IF
Since there is only one counting buffer circuit and one output pin, it is impossible to connect to the third IC (having two input pins) that has a built-in counter. This is the ground circuit (1
7) and (21) exist, and the grounding circuit (17)
) and (21) are grounded, the output signal level of the buffer circuit decreases, making it impossible to count.

(d) Means for Solving the Problems The present invention has been accomplished in view of the above-mentioned points, and consists of a buffer circuit for F counting, and an amplification transistor whose base is falsely applied with the output signal of the buffer circuit. , the first to count the FMIFM signal obtained at the collector of the amplification transistor.
The present invention is characterized in that it includes a counter, a second counter that counts the AMIFM signal obtained at the emitter of the amplification transistor, and a grounding circuit that selectively grounds inputs of the first and second counters.

(f) Effect According to the present invention, the output signal of the buffer circuit for IF counting common to FM reception and AM reception can be supplied to the first and second counters to perform IF counting. At this time, since the amplifying transistor can be operated with its emitter grounded for the FMIF signal, the low level FMIF signal can be amplified to a level suitable for counting. Further, since the amplification transistor can be operated as an emitter follower for the AMIF signal, the high level AMIF signal can be directly applied to the counter.

(v) Embodiment FIG. 1 shows an embodiment of the present invention, in which (23) is an FMIF amplification circuit for amplifying the FMIF signal, (24)
) is an AMIF amplifier circuit for amplifying the AMIF signal, and (25) is the FMIF amplifier circuit (23) and the AMI
This is a buffer circuit to which the output signal of the F amplifier circuit (24) can be applied in common, and these circuits are arranged in the first IC (26). Further, (27) is a first counter that counts FMIF signals, (28) is a second counter that counts AMIF signals, and (29) is a first grounding circuit that grounds the input of the first counter (27). , (30) is a second grounding circuit that grounds the input of the second counter (28), and (31) is a selection circuit that selectively operates the first and second grounding circuits (29> and (30)). These circuits are arranged in the second IC (32).Furthermore,
The base of (33) is connected to the buffer circuit (25) via the capacitor (34), and the collector is connected to the buffer circuit (33) via the capacitor (34).
5〉 to the first grounding circuit (29), and the emitter is connected to the second grounding circuit (30〉) via the capacitor (36).
The amplifying transistor connected to the amp plays the role of connecting the first and second ICs (26) and (Japan).

Now, if FM band reception is being performed, the selection circuit (31) sets the first grounding circuit (29) to an ungrounded state, the second grounding circuit (30) to a grounded state, and connects the amplification transistor (33) to the grounded state. ) is grounded via a capacitor (36). Therefore, the amplification transistor (33
) becomes the emitter grounded operating state, and the FMIF amplifier circuit (
FM obtained from 23) via the buffer circuit (25>)
The IF signal is amplified by a predetermined factor by an amplification transistor (33). Then, the amplified FMIF signal is transmitted from the collector of the amplification transistor (33) to the capacitor (35).
) and the first counter (2
7), the first counter (27) performs counting, and when the count corresponding to 10.7 MHz is performed, an output signal indicating the tuned state is applied to the first output terminal (3).
7) occurs.

On the other hand, when AM band reception is performed, the first grounding circuit <2
9) is in a grounded state, and the second grounding circuit (30) is in an ungrounded state. Therefore, the amplification transistor (33) becomes an emitter follower operating state, and the AMIF signal obtained from the AMIF amplification circuit (24) via the buffer circuit (25) is generated at the emitter of the amplification transistor (33) with approximately the same magnitude. and the capacitor (36) and the second grounding circuit (3
0) to the second counter (28). Then, the second counter (28) performs counting, and 45
When a count corresponding to 5 KHz is taken, an output signal indicating the tuning condition is generated at the second output terminal (38).

Figure 3 shows 1r:1! This shows a specific circuit of the buffer circuit (25) of J.The collector and emitter are commonly connected, the first transistor (39) to which the FMIF signal is applied to the base, and the second transistor (40) to which the AMIF signal is applied to the base. ), and differentially connected third and fourth transistors (42) and (
43), and a limiter amplifier (4) which amplifies the IF signal applied to the base of the third transistor (42).
4) and a fifth transistor (45) connected as an emitter follower to the base of which the output signal of the limiter amplifier (44) is applied.

The FMIF signal obtained from the FMIF amplifier circuit (23) has a lower level than the AMIF signal obtained from the AMIF amplifier circuit (24). Further, the FMIF signal is
Attenuation occurs due to the frequency characteristics of the buffer circuit (25). Therefore, the level of the FMIF signal generated at the output terminal (46) when receiving the FM band is lower than that of the AMIF signal. On the other hand, since the AMIF signal has a sine wave shape and is subjected to AM modulation, it can be sufficiently amplified by the limiter amplifier (44) to facilitate counting in the counter.

Therefore, a high level AMIF signal and a low level FMIF signal are obtained at the output terminal (46). The output signal obtained at the output terminal (46) is selectively amplified by the amplification transistor (33) shown in FIG. That is,
The FMIF signal is transmitted through an amplification transistor with common emitter operation (
33), the AMIF signal is amplified by a predetermined time, and the AMIF signal is output at approximately the same level via the amplification transistor (33) of emitter follower operation. Therefore, the second IC (
FMIF signal level and AMI at the input terminal of 32)
The level of the IF signal is approximately equal to that of the F signal, and the first and second counters (27) and (28) can count both of the IF signals without malfunction.

Note that the first and second grounding circuits (29) and (30) selectively connect one of the first and second counters (27) and (28) according to the output control signal of the selection circuit (31). Although the input terminal is grounded, the control signal may be generated in response to switching of a band selection switch (not shown) or may be generated in response to the level of the received signal.

(G) Effects of the Invention As described above, according to the present invention, since an amplification transistor is provided that amplifies the FMIF signal by a common emitter operation and the AMIF signal by an emitter follower operation, the IFF
The FMIF and AMIF signals used for counting can be supplied to the counter at sufficient levels. Therefore, the counter can perform reliable counting operations and prevent malfunctions. Further, according to the present invention, it is possible to provide an interface circuit that can normally connect a first IC containing an FMIF amplifier circuit and an AMIF amplifier circuit to a second IC containing a counter. Therefore, the first IC!
It is possible to use only one specific output bin for F count, making it easy to integrate into an IC.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional radio receiver, and FIG. 3 is a circuit diagram showing a specific example of the circuit shown in FIG. (23) -FMIF amplifier circuit, (24)...AM
IF amplifier circuit, (25)...buffer circuit, (2
7)...first counter, (28)...second counter, (29)...first grounding circuit, (30)...second grounding circuit, (33)...amplification transistor. Applicant: Sanyo Electric Co., Ltd. Tato (1 person) Representative: Patent attorney Takuji Nishino and 1 person (Figure 1)

Claims (1)

[Claims] (1) In a radio receiver equipped with an IF counting type tuning state detection circuit that detects the tuning state by counting IF signals, the FMIF obtained from the FMIF amplifier circuit
A buffer amplifier circuit that commonly amplifies the F signal and the AMIF signal obtained from the AMIF amplifier circuit, an amplification transistor to which the output signal of the buffer amplifier circuit is applied to the base, and an FMI obtained at the collector of the amplification transistor.
It consists of a first counter that counts the F signal, a second counter that counts the AMIF signal obtained at the emitter of the amplification transistor, and a grounding circuit that selectively grounds the inputs of the first and second counters. When receiving a band, the input of the second counter is grounded and the amplifying transistor is operated as an emitter-grounded operation, and when receiving an AM band, the input of the first counter is grounded and the amplifying transistor is operated as an emitter follower. Features a radio receiver.