JPH02102769U - - Google Patents
Info
- Publication number
- JPH02102769U JPH02102769U JP1141189U JP1141189U JPH02102769U JP H02102769 U JPH02102769 U JP H02102769U JP 1141189 U JP1141189 U JP 1141189U JP 1141189 U JP1141189 U JP 1141189U JP H02102769 U JPH02102769 U JP H02102769U
- Authority
- JP
- Japan
- Prior art keywords
- circuit conductor
- hard substrate
- inner layer
- expose
- resin sealing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 7
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 238000007789 sealing Methods 0.000 claims description 3
- 239000002131 composite material Substances 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims 4
- 238000010030 laminating Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Description
第１図は本考案による多層プリント配線板の実
施例の断面概要図、第２図及び第３図は多層プリ
ント配線板の従来例を示す断面概要図である。
１：複合多層基板、２：硬質基板部、３：フレ
キシブル基板部、６：表面層の回路導体、７：内
層の回路導体、１２：開口部、１３：樹脂封止、
１５：追加回路導体。
FIG. 1 is a schematic cross-sectional view of an embodiment of a multilayer printed wiring board according to the present invention, and FIGS. 2 and 3 are schematic cross-sectional views showing conventional examples of multilayer printed wiring boards. 1: Composite multilayer board, 2: Hard board part, 3: Flexible board part, 6: Surface layer circuit conductor, 7: Inner layer circuit conductor, 12: Opening part, 13: Resin sealing,
15: Additional circuit conductor.
Claims (1)
してなる複合多層基板の硬質基板部に開口部を設
けて内層の回路導体を露出させ、前記開口部に電
子部品を配置して内層の回路導体に実装し樹脂封
止するとともに、この樹脂封止上に回路導体を追
加形成し、この追加回路導体を利用して硬質基板
部表面に電子部品を実装してなることを特徴とす
る多層プリント配線板。 An opening is provided in the hard substrate of a composite multilayer board formed by adhesively laminating a hard substrate and a flexible substrate to expose the inner layer circuit conductor, and an electronic component is placed in the opening to expose the inner layer circuit conductor. A multilayer printed wiring board characterized by mounting and resin sealing, additionally forming a circuit conductor on the resin sealing, and mounting electronic components on the surface of a hard substrate using the additional circuit conductor. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1141189U JPH02102769U (en) | 1989-02-03 | 1989-02-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1141189U JPH02102769U (en) | 1989-02-03 | 1989-02-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02102769U true JPH02102769U (en) | 1990-08-15 |
Family
ID=31219941
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1141189U Pending JPH02102769U (en) | 1989-02-03 | 1989-02-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02102769U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7119801B1 (en) | 1999-03-26 | 2006-10-10 | Seiko Epson Corporation | Display device and electronic apparatus |
-
1989
- 1989-02-03 JP JP1141189U patent/JPH02102769U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7119801B1 (en) | 1999-03-26 | 2006-10-10 | Seiko Epson Corporation | Display device and electronic apparatus |
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