JPH02103452A - Mask inspecting method - Google Patents

Abstract

PURPOSE:To improve inspection accuracy by detecting transmitted light and comparing and inspecting the etched states of the first and second etching patterns on a substrate. CONSTITUTION:An aluminum film is formed on the surface of a quartz substrate 1 by sputtering. Negative type electron beam resist is applied on the substrate by a rotating mode. Mask data to be inspected are directly drawn on specified regions 2 on the substrate 1 with an electron beam exposure device, and development is performed. At this time, the resist is made to remain on regions 3 where patterns are formed by using a mask. Then, with a desired resist pattern as a mask, the aluminum film undergoes dry etching. The resist is removed by ashing treatment. Then positive type photoresist is applied on the surface of the substrate by the rotating mode. Exposure is performed with a stepper by using the mask to be inspected, and development is performed. With the photoresist pattern as a mask, the aluminum undergoes dry etching, and the photoresist is removed. Then, the substrate 1 on which the pattern is formed is compared with a chip and inspected with an automatic inspecting device which inspects the pattern.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for automatically inspecting defects on a mask used in an exposure apparatus.

BACKGROUND ART As the miniaturization of semiconductor devices progresses and the minimum dimension becomes 1 μm or other sub-micron standard, the exposure equipment used in the lithography process is a step-and-repeat reduction projection exposure equipment, a so-called stepper. It is becoming mainstream. A stepper uses a mask to transfer a pattern on the mask onto a semiconductor substrate. At this time, if there are pattern defects or contamination (dust, scratches, etc.) on the mask, these are also transferred at the same time. Transfer of such pattern defects and contamination (hereinafter referred to as defects) causes defects in semiconductor devices. Furthermore, since such defect transfer occurs in all shots, the yield is significantly reduced. To prevent such defects, mask patterns are inspected. In particular, in order to prevent defects caused by dust adhering to the mask, it is necessary to use a mask that is ready for exposure with a stepper on a semiconductor substrate coated with photoresist that is separate from the semiconductor substrate on which elements are to be formed. A test exposure is performed on the photoresist, a mask pattern to be inspected is formed using photoresist, and the pattern is inspected. In most cases, this inspection is performed visually by a person using a microscope, but
If a plurality of identical semiconductor element patterns are drawn on one mask, it is also possible to use a device that performs automatic inspection by chip comparison. However, one mask has one
If a single semiconductor device or a plurality of semiconductor devices that are not equivalent are drawn, there is no other way than to visually inspect them.

Problems to be Solved by the Invention In conventional inspection methods, when one semiconductor element or a plurality of semiconductor elements that are not equivalent are drawn on one mask, the inspection must be performed visually by a person.

The present invention solves the above-mentioned problems and solves the above problems by providing a single mask with one
This enables inspection when a single semiconductor device or a plurality of semiconductor devices that are not equivalent are drawn.

Means for Solving the Problems In the present invention, a first pattern is formed in some areas of a substrate, and a second pattern is formed in other areas. Next, the first pattern and the second pattern are inspected by chip comparison using an automatic inspection device, and the data or mask used for forming the first pattern and the mask used for forming the second pattern are compared and inspected. .

Function: According to this inspection method, it is possible to detect cases where one semiconductor element or multiple semiconductor elements that are not equivalent are drawn on one mask, which was previously considered impossible with automatic inspection equipment that performs inspection by chip comparison. Inspection can be made possible. As a result, inspection accuracy is improved compared to when inspection is performed visually by humans, and yields can be significantly improved.

EXAMPLES Five examples of the inspection method according to the present invention will be explained in detail with reference to the drawings.

First, a first embodiment will be described with reference to FIG.

An aluminum film of about 650 μm is coated on the surface of a quartz substrate 1 with a thickness of about 650 μm.
A person is formed by sputtering, and a negative type electron beam resist is applied on the layer by spin coating for about 5,000 people. Mask data of a mask to be inspected is directly drawn on a predetermined region 2 of the quartz substrate 1 using an electron beam exposure device, and then developed (FIG. 1a).

At this time, alignment marks necessary for exposure of the stepper are also formed. Further, resist is left in the area 3 where a pattern is to be formed using a mask. Next, using the desired resist pattern as a mask, the aluminum film 6 is
50 people were dry etched, and then the resist was removed by ashing. Next, a positive type photoresist of about 2 μm is spin-coated on the surface of the quartz substrate 1, exposed to light using a stepper using a mask to be inspected, and developed. At this time, the area 3 shown in FIG. 1 is exposed. Area 2
Leaves a resist. Next, using this photoresist pattern as a mask, 650 aluminum films are dry etched, and then the photoresist is removed. Next, the quartz substrate 1 on which the pattern has been formed is inspected by an automatic inspection device that compares the chips and inspects the pattern. The automatic inspection device used at this time is of a type that performs inspection by detecting transmitted light. Through this inspection, it can be determined whether an etching pattern formed by exposure using a stepper using a mask is equivalent to an etching pattern obtained by a direct writing method from mask data.

An example of comparative determination is shown in FIG. The automatic inspection device compares the chip pattern 4 drawn directly from the data with the chip pattern 5 formed using a mask. Comparisons are made to display the differences between the images on the operating CRT as shown in FIG. 2, for example. Look at this shown part 6.7,
If a pattern defect 8 is found in the portion 7 as shown in FIG. 2(C), the chip pattern 5 was formed by repeated exposure using a stepper, so the same location 9 of other chips in the region 3 should be further confirmed. , if the same defect 10 is found, the mask used to form the chip pattern 5 is defective. Alternatively, it can be seen that there is a factor causing the defect in the exposure system used to form the chip pattern 5. If portion 9 is the same as portion 6, defect 8 is considered to be caused by contamination on the wafer. Further, if the portion 7 displayed by the inspection device is the same as the portion 6 or there is no problem in pattern formation, it is ignored as a pseudo defect.

If chip patterns 4 and 5 are exactly the same, the inspection device will not find any difference at all and will determine that there is no defect. In this case, it can be determined that the mask used for pattern formation is equivalent to the data, that is, there is no defect. at the same time,
It can be determined that there is no problem with the exposure system using a mask.

Furthermore, when a pattern formed using a mask is inspected for comparison with data, only defects transferred by the exposure device used are subject to determination.

When a mask is directly inspected, it is extremely difficult to determine whether a found defect poses a problem in pattern formation.

Particularly in the case of minute defects, it is necessary to actually conduct a pattern formation test using the exposure equipment in which the mask is intended to be used. This is because the resolution limit differs depending on the exposure apparatus, and the size of the defect that becomes a problem also differs depending on the device and the process using the mask. Therefore, if a mask defect inspection is performed on a pattern formed using a mask, all of these determinations can be made simultaneously, which is very advantageous.

In this way, comparison inspection with mask pattern data can be performed using an automatic inspection device that uses transmitted light to compare chips.

In the above example, a quartz substrate with a thickness of 650 μm was used, but this is because the transmittance of visible light is within the allowable range of the inspection equipment, and it may be thinner or thicker if it can be used in the pattern forming process. It can also be used. In addition, we used 650 aluminum films to form etching patterns, which can be formed on quartz substrates, and the contrast of visible light transmittance with the transmittance of quartz substrates can be recognized by automatic inspection equipment. Any conductive thin film that can be formed thereon can be used. In addition, although we used a negative type as an electron beam resist and a positive type as a photoresist, the resist type can be either positive or negative type in any case, and the resist components, additives such as dyes, and resist film thickness can also be used to form patterns. If so, there are no particular limitations. Of course, there is nothing wrong with using a resist process, such as a method advantageous in terms of pattern formation, such as a multilayer resist method.

Next, a second embodiment of the present invention will be described.

In this embodiment, a P-type semiconductor substrate is used instead of the quartz substrate used in the first embodiment, and as an automatic inspection device,
Use a type that detects reflected light.

A thermal oxide film of approximately 1,000 layers is formed on the surface of a P-type semiconductor substrate, and a negative electron beam resist of approximately 5,000 layers is spin-coated thereon. As shown in FIG. 1 (ta+), using the mask data of the mask to be inspected, direct writing is performed on a predetermined region 2 of the semiconductor substrate using an electron beam exposure device and development is performed. At this time, alignment marks necessary for stepper exposure are also formed. At the same time, a mask is used so that the resist remains in the area 3 where pattern formation is planned.

Next, 1000 oxide films were dry etched using the desired resist pattern as a mask, and then the resist was removed.
Removed by ashing process. Next, a positive photoresist of about 1 μm is spin-coated on the surface of the semiconductor substrate, exposed to light using a stepper using a mask to be inspected, and developed.

At this time, the area 3 shown in Figure 1 (bl) is exposed.Next, approximately 1000 oxide films are dry-etched using the photoresist pattern as a mask, and then the photoresist is removed by ashing. Then, in Figure 1
The semiconductor substrate 1, on which a desired pattern is formed in each region as shown in b+, is inspected by an automatic inspection device that detects reflected light and compares chips to inspect the pattern. Through this inspection, it can be determined whether an etching pattern formed by exposure using a stepper using a mask is equivalent to an etching pattern obtained by a direct writing method from mask data. The determination method is the same as in the first embodiment.

In this way, comparison with mask pattern data can be performed using an automatic inspection device using chip comparison.

In the above embodiment, a P-type semiconductor substrate was used, but an N-type semiconductor substrate may be used. Although about 1,000 thermal oxide films were used to form the etching pattern, any film can be used as long as it can be formed on a semiconductor substrate and the etching pattern can be detected by automatic inspection equipment.

Further, as in the first embodiment, there are no particular restrictions regarding electron beam resist, photoresist, or resist processes.

Next, a third embodiment of the present invention will be described. 1st
On a quartz substrate 1 with an aluminum film of about 650 layers similar to that used in Example 1, a positive photoresist of about 2 μm thick was spin-coated, and a region 2 shown in FIG. 1(a) was formed using a first mask. Exposure is performed using a stepper.

At this time, alignment marks necessary when performing exposure using the second mask are also formed. Further, the second mask is used so that the resist remains in the region 3 where a pattern is to be formed.

Using this resist pattern as a mask, the aluminum film
The OA is etched, and then the resist is removed by ashing.

Next, a positive photoresist of about 2 μm is spin coated on the surface of the quartz substrate again, aligned with the previously formed alignment mark using a second mask, exposed with a stepper, and developed. At this time, the area to be exposed is the area 3 shown in FIG. Approximately 650 aluminum films are etched, and then the resist is removed.Then, as in the first embodiment, this patterned quartz substrate 1 is automatically inspected.

Through this inspection, it can be determined whether the etching pattern formed using the first mask and the etching pattern formed using the second mask are equivalent. If they are exactly equivalent, either there are no defects at all in either mask, or there are exactly the same defects in both masks.

In this case, the possibility that a defect with the exact same shape would occur at the exact same location on the mask is extremely low and is almost unthinkable, so it can be determined that both masks are free of defects. If they are not equivalent, it is determined that the pattern formed using either mask is abnormal. It can be seen that there is a defect in the mask used to form the abnormal pattern.

Although one stepper is used for exposure in this embodiment, separate steppers may be used.

Next, a fourth embodiment of the present invention will be described. Second
A positive photoresist with a thickness of about 1 μm is applied to the surface of a P-type semiconductor substrate with a thermal oxide film of about 1,000 layers similar to that used in the example.
The first mask is used to expose the region 2 shown in FIG. 1 fat using a stepper, and the film is developed. At this time, the second mask is used so that the resist remains in the region 3 where pattern formation is planned. Using this resist pattern as a mask, about 1000 thermal oxide films are etched, and then the resist is removed. Next, a positive photoresist of approximately 1 μm thick is spin coated on the surface of the semiconductor substrate 1 again.
A second mask that is exactly the same as the second mask is used to align with the previously formed alignment mark, perform exposure, and develop. At this time, exposure is performed as shown in Figure 1 (bl
This is region 3 shown in . Further, the resist is left in the region 2 where the pattern is formed using the first mask.

Next, using this photoresist pattern as a mask, about 1000 thermal oxide films are etched, and then the resist is removed. Thereafter, as in the second embodiment, an automatic inspection device detects the reflected light, compares the chips, and inspects the pattern. The method of comparison and determination is the same as in the third embodiment.

Next, a fifth embodiment of the present invention will be described.

Approximately 1 μm of positive resist is spin-coated on the surface of the semiconductor substrate 1 on which an etched pattern of alignment marks necessary for overlapping mask patterns during stepper exposure has been formed, and only one integrated circuit is formed in area 2 shown in FIG. Exposure is performed using a stepper using the first mask on which is drawn. At this time, the pattern of the mask is aligned with the alignment mark formed on the surface of the semiconductor substrate 1. Next, the first
The area 3 on the surface of the semiconductor substrate 1 is exposed to light using a second mask completely equivalent to the first mask attached to the stepper in place of the mask shown in FIG. At this time as well, like the first mask, the mask pattern is aligned with the alignment mark formed on the surface of the semiconductor substrate 1. Thereafter, development is performed to obtain a semiconductor substrate to be inspected in which a photoresist pattern formed using the first mask is present in region 2 and a photoresist pattern formed using the second mask is present in region 3.

Next, the resist pattern formed using the first mask and the resist pattern formed using the second mask are comparatively inspected using an automatic inspection device that detects the reflected light and inspects the pattern by chip comparison. .

The method of comparison and determination is the same as in Example 3.4. According to the method shown in this embodiment, it is not necessary to apply an oxide film on the surface of the substrate in advance, so the preparation of the base is easy. Furthermore, in the first to fourth embodiments, processes such as etching and subsequent resist removal were required in order to form the etching pattern one time at a time, but in the fifth embodiment, only the etching pattern of the alignment mark was formed. A photoresist pattern may be directly formed on the surface of the semiconductor substrate 1 on which the photoresist pattern is formed. As described above, according to the fifth embodiment, compared to the methods shown in the first to fourth embodiments, there are fewer process steps, so the time required for inspection and confirmation can be shortened to about 20 minutes, and it is also cost-effective. Very cheap.

It does not matter what kind of circuit pattern is drawn on the mask used in the five embodiments.

Effects of the Invention According to the method of the present invention, one semiconductor integrated circuit or a plurality of unequal semiconductor integrated circuits can be drawn on one mask, which was previously impossible with automatic inspection equipment that performs inspection by chip comparison. enable automatic inspection when In addition, in such a case, the inspection accuracy is much improved compared to when a person performs visual inspection, and this greatly contributes to improving mask quality and ultimately yield.

[Brief explanation of the drawing]

Figure 1 (al, (bl) is a diagram explaining an example of the present invention, Figure 2 (al~(dl is a diagram explaining an example of inspection confirmation. 1... Board, 2 . . . Region where a pattern is formed first, 3 . . . Region where a pattern is formed second, 4 . . . Chip pattern formed in region 2, 5 ... Chip pattern formed in region 3, 5° ... Chip pattern formed in region 3, 6 ... Part of chip pattern 4, 7.・・・・・・A part of chip pattern 5,
Pattern corresponding to pattern 6, 8...Defect in pattern 7, 9...Pattern corresponding to pattern 6.7, part of chip pattern 5°, 10...
...Defect in pattern 9. Name of agent: Patent attorney Shigetaka Awano and 1 other person 1-K
Temporary 2 - 3m method 3 to change the pattern at the first meeting - part 26 @ I putter) 51 squares ζ Figure y'L

Claims (5)

[Claims] (1) A step of forming a thin film that does not transmit visible light on a substrate that transmits visible light, using a direct writing method from the mask data of the mask to be inspected to form a thin film that does not transmit visible light on a part of the substrate. a step of forming a first etching pattern; a step of forming a second etching pattern of a thin film that does not transmit visible light in an area on the substrate other than the area where the first etching pattern is formed using a mask to be inspected; , a step of comparatively inspecting the first etching pattern and the second etching pattern on the substrate using an automatic inspection device that detects transmitted light and inspects the patterns by etching comparison. Characteristic mask inspection method. (2) Forming an oxide film on a semiconductor substrate that does not transmit visible light, forming a first etching pattern in a part of the semiconductor substrate using a direct writing method from the mask data of the mask to be inspected. a step of forming a second etching pattern in a region on the semiconductor substrate other than the region in which the first etching pattern is formed using a mask to be inspected, a step of forming the first etching pattern on the semiconductor substrate and the second etching pattern,
1. A mask inspection method comprising the step of performing a comparative inspection using an automatic inspection device that detects reflected light and inspects a pattern by chip comparison. (3) a step of forming a thin film that does not transmit visible light on a substrate that transmits visible light; a step of forming a first etching pattern in a part of the substrate using a first mask; forming a second etching pattern in an area where the first etching pattern does not exist on the substrate using a second mask that is exactly the same as the mask of the first etching pattern; 1. A mask inspection method comprising the step of comparatively inspecting a pattern using an automatic inspection device that detects transmitted light and inspects the pattern by chip comparison. (4) a step of forming an oxide film on a semiconductor substrate that does not transmit visible light; a step of forming a first etching pattern in a part of the semiconductor substrate using a first mask;
forming a second etching pattern on the semiconductor substrate in a region where the first etching pattern does not exist using a second mask completely equivalent to the first mask; A mask inspection method comprising the step of comparatively inspecting a second etching pattern using an automatic inspection device that detects reflected light and inspects the pattern by chip comparison. (5) A step of forming a first pattern using a first mask on a part of the surface of the semiconductor substrate that does not transmit visible light, using a second mask that is exactly the same as the first mask. forming a second pattern in a region on the semiconductor substrate other than the region in which the first pattern is formed;
A mask inspection method comprising the step of comparatively inspecting the first pattern and the second pattern using an inspection device that detects reflected light and inspects the patterns by chip comparison.