JPH0210627B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a system for transmitting and receiving data divided into a predetermined number of blocks using a half-duplex communication method between, for example, a central processing unit (CPU) and a peripheral processing unit (μ-CON). Regarding transmission and reception methods.

Generally, in such a data transmission/reception method,
When executing one command from the CPU, for example a receive command, μ-CON is in a busy state.
Therefore, other commands, such as transmission commands, will have to wait until the data reception operation is completed. This also applies when the amount of data to be transmitted increases and is divided into a plurality of blocks for transmission and reception, and the waiting time in this case becomes even longer.
Therefore, there is a demand for efficient transmission and reception processing using the half-duplex communication system by interrupting the execution of one command with the execution of another command.

Figure 1 is a block diagram showing the general configuration of a system consisting of a CPU and μ-CON, Figure 2 is a block diagram showing the configuration of transmitted and received data, and Figure 3 is an explanatory diagram explaining conventional transmitting and receiving operations. . In FIG. 1, 1 is a host computer (CPU), and 2 is a peripheral processing device (μ-CON) such as a terminal display device.

The CPU 1 is composed of a reception buffer 1R, a transmission buffer 1S, etc., and the μ-CON is composed of a transmission/reception control section 21 consisting of a reception buffer 21R, a transmission buffer 21S, etc., and a microprocessor section (MPU) 22. Yes, CPU
Reception buffer 1R and transmission buffer 1S in 1
may be used in one buffer. Note that L _D is a data line, L _R is a control line that gives a reception command, L _S is a control line that gives a transmission command, and L _T is μ−.
This is a control line that sends a transmission end request signal from CON to the CPU.

To start transmission and reception, send a transmission command (hereinafter referred to as
Abbreviated as SND Directive. ) or reception command (hereinafter referred to as
Abbreviated as RCV Directive. ) is sent to μ-CON2 via the control lines L _S and L _R , thereby transmitting or receiving data. In other words, the case where the CPU has the initiative in sending and receiving will be described below. Also, at the time of RCV command, data is transferred from CPU1 to μ-CON2,
Furthermore, when the SND command is issued, it is assumed that the signal is transmitted from μ-CON 2 to CPU 1, and the same applies hereafter. this is,
From the CPU side, the relationship between sending and receiving is reversed, but
Here, it will be expressed in a unified manner as described above. Format of data sent and received
For example, as shown in FIG.
It is expressed by adding order (instruction) ORDER to DA,
For this reason, the transmission/reception control section (TR) 2 on the μ-CON side
1 or the microprocessor section 22, the order
It usually has an interpreter function to decipher ORDER. By the way, the amount of data to be transmitted generally tends to increase, and the capacity of each sending/receiving buffer is limited by the hardware. It is necessary to divide it into blocks and transfer it.

Conventionally, this problem has been dealt with, for example, as shown in FIG.

In other words, the figure shows that the data amount of the reception request generated inside CPU1 is
Since this data is larger than the R capacity, an example is shown in which this data is divided into three blocks, BL1, BL2, and BL3, as shown in FIG. The reception process for block BL1 is to order the block data BL1 of reception buffer 1R in the CPU as shown in the figure (b).
Together with the reception buffer 21R of the transmission/reception control unit TR
This is done by sending the data to the MPU 22 via the MPU 22. (See the shaded area of MPU22). The MPU 22 recognizes the total amount of data sent from the CPU (see A in the same figure) by interpreting (decoding) the order ORDER at the beginning of the data BL1. When the reception of BL3 is completed, the processing of the received data is executed for the first time. Therefore, even if an urgent transmission request occurs on the CPU side while receiving data block BL2, for example, the MPU side of μ-CON will not process the data block BL.
It is not possible to accept a transmission command from the CPU until the amount of data recognized by the reception of step 1 has been sent. Therefore, the block transmission process shown in Figure 1 (h) has to wait until the reception process is completed. It will be. In other words, in general, in the half-dyad communication system, μ−
While CON is executing one command given from the CPU, it is in a busy state and cannot accept the other command from the CPU until the series of operations according to that command is completed. This other command request may occur from within the CPU, or
In addition, interrupts may be caused by hardware lines from the μ-CON side, but in any case, as the amount of data increases, the execution of one command that occurs while the other command is being executed is delayed. The disadvantage is that it takes a long time.

The present invention has been made to eliminate such drawbacks, and in a half-duplex block data transmission/reception system, it is possible to receive and execute one command while the other command is being executed, thereby improving the efficiency of transmission and reception processing. The purpose is to achieve this goal.

Its feature is that when data is divided into a predetermined number of blocks and transmitted and received between the central processing unit and peripheral processing units using the half-duplex communication method, a series of blocks is placed at the beginning of each divided data block. In addition to providing both devices with the function of attaching a flag indicating whether the block is the first block or the succeeding block, when a transmission request is sent via a dedicated control line or signal line, the request is converted into a command code. The peripheral processing unit is equipped with the function of converting and decoding, and when the information sent from the central processing unit is the first block, the peripheral processing unit decodes the command code that is subsequently sent, and uses the command code. If the specified action is different from the action currently being executed, the action being executed is interrupted and the process moves to the action specified by the command.

Examples of the transmission/reception system according to the present invention will be described below. Note that the system configuration is the same as that in FIG.

First, its outline will be explained with reference to FIG. 1 again. Regarding the reception operation, as mentioned above, the RCV command is given from CPU1 to TR21 via the control line L _R , so TR21 transfers the data from CPU reception buffer 1R to its own reception buffer 21R.
The receiving process is performed by receiving the received data and sending it to the MPU 22. On the other hand, when sending,
TR21 receives the SND command from CPU1 via control line L _S. At this time, only a high level or low level signal indicating this is sent to the control line L _S , so the TR 21 receives this, creates an SND command order, and sends it to the MPU 22 as received data. do. The MPU 22 decodes the SND command order received as received data using the interpreter function, and transmits the specified transmission data requested from the CPU 1 to the transmission buffer 21S of the TR 21.
Therefore, the TR 21 sends the data to the CPU transmission buffer 1S. In addition, the end of the reception process of a series of data consisting of a plurality of blocks is determined by identifying within the transmission/reception control unit TR the time when the RCV command on the control line L _S is turned off.
Similarly, the end of the transmission process is transmitted via the control line L _T
- This shall be done by sending a transmission end request signal from the TR in CON to the CPU.

4A to 4C are explanatory diagrams for explaining the transmission/reception information format and its header section.

That is, during the transmission/reception operation of the present invention, a header H1 as shown in the figure is placed at the beginning of each transmission/reception data SD, RD.
~H3 is attached and transmitted. Note that Figure 4A (a) shows the format of information sent from the CPU to the TR, Figure 4B (a) shows the format of information sent from the TR to the MPU, and Figure 4C (a) shows the format of information sent from the MPU to the TR and from the TR to the CPU. It indicates the format of the information.
As shown in FIG. 4A, the header H1 is composed of a reception block flag RBCF. If this flag is "0", the block of reception data RD is the first block, and a predetermined order is sure to follow this header. It shows that there is. On the other hand, the flag
If RBCF is "1", this indicates that the block of received data RD is a continuation block, and that there is subsequent data immediately following the previous received block. By the way, the reception buffer 1R of CPU1
The capacity of the reception buffer 21 of the transmission/reception control unit TR is
Since it is generally larger than the capacity of R,
In a block transfer based on one RCV command from the CPU 1, the reception processing from the TR to the MPU is divided into multiple steps. Therefore, the received data RD sent from TR to MPU is
The size of the header H2 is determined to be appropriate considering the size of the receiving buffer of the header H2 as shown in the figure B.
is attached and transferred. This header H2 consists of a reception continuation flag RCF and a reception data length. Similar to the previous flag RBCF, the flag RCF is "0" to indicate a first block, and "1" to indicate a continuation block. In addition, as mentioned above, if the receive data sent from the CPU in one RCV command is larger than the capacity of the TR's receive buffer, the receive data length is divided into multiple times in the TR and sent to the MPU. The maximum data length matches the reception buffer capacity value of the TR, but this data length is counted and assigned by a counter (not shown) inside the TR. Furthermore, the header H3 is composed of a transmission block continuation flag SBCF and transmission data length information, as shown in FIG. 4C (b). In other words, since the transmission operation is terminated by the final processing by μ-CON (sending of the transmission termination request signal), one
In response to the SND command, the sending buffer unit in the sending/receiving control unit TR is sent from the MPU to the CPU via the TR.
to be carried out. Therefore, depending on the MPU
Header H3 and data SD set in TR
is sent as is to the CPU. In addition, the flag
If SBCF is "0", it indicates that the transmission data block is an end block, and the transmission data ends with its own block. On the other hand, if the flag SBCF is "1", the transmitted data block is a continuous block, indicating that the transmitted data does not end in its own block and that subsequent transmitted data exists. In addition, the maximum transmission data length is equal to the TR transmission buffer capacity value, and the value (data length) is
Determined by the program in the MPU.

FIG. 5 is an explanatory diagram for explaining the overall transmission and reception operation of the present invention, and FIGS. 6, 7, and 8 are flowcharts for explaining the transmission and reception operations of the CPU, TR, and MPU, respectively. . In addition,
A in FIGS. 6, 7, and 8 all indicate a receiving operation, and similarly, B indicates a transmitting operation.

Below, as shown in Figure 5, the two RCV directives (RCV
1, SND command twice during RCV2) SND1,
The operation when SND2 is interrupted will be explained with reference to FIGS. 5 to 8. It is assumed that the format and amount of information sent from the CPU to μ-CON are as shown in FIG. 5A.

First, the CPU adds a header H1 (since it is the first block, the flag RBCF is "0") to the received data as shown in Figure 5B (see ○B in Figure 6A). Data such as A is transferred to the TR. In TR, when header H1 is received,
As shown in ○C in Figure 7, "0", which is the content of flag RBCF, is set in flag RCF, and it is determined whether the RCV command is on or not (see ○D in Figure 7A), and if YES, then The data is received by the TR reception buffer (see ○ho in Figure 7A). Since the capacity of this TR reception buffer is smaller than the capacity of the CPU reception buffer, the buffer becomes full when it finishes receiving block BL11 of data block BL1 sent from the CPU (Fig. 7). For this reason, TR is set to header H2 (with the flag RCF set to "0", as shown in Figure 5C).
Set data length. ) and send it to the MPU. Next, receive the remaining block BL12,
In the same manner as above, a header H2 as shown in FIG. 5D is created (at this time, the flag RCF is set to "1") and sent to the MPU. In one RCV command from the CPU, data BL12 is the last, so
When the CPU finishes receiving the data, the RCV
Turn off command 1. On the other hand, the MPU first determines whether the flag RCF is "0" or not, as shown in FIG. 8, based on the data received as described above (see E in FIG. 5) (see A in FIG. 8). ○Refer to C). In this case, since it is the first block, the flag is "0", so the order is continued to be decoded (see ○ in Figure 8A), and it is determined whether it is an SND command (see ○ in Figure 8A). (see e). As a result, if it is an SND command, the process moves to transmission processing, but if it is not an SND command,
Recognizes the total amount of received data due to the above order (8th
(See circle in Figure A), processing of the received data is not started until all data has been received. Here, when an urgent transmission request occurs in the CPU while receiving operation according to RCV command 1 is being performed, the CPU shifts to transmission processing via ○chi and ○ri in Figure 6A, and By turning on the SND command as shown in B, SND command 1 is given to TR. As mentioned above, this SND command 1 is given to the control line L _S (see Figure 1) as a high or low level signal, so in TR, a predetermined signal indicating the SND command is output from this signal as shown in Figure 5. It is converted into an order and sent to the MPU with a header H2 with flag RCF=0 and data length=1. When the MPU receives the command as shown in Figure 5,
After confirming that the flag RCF is "0", it is the first block, and that the order is an SND command, the data requested by the CPU is grasped, as shown by ○ in FIG. 8B. At this time,
When the amount of data to be transmitted is larger than the TR transmission buffer, the judgment result at ○C in Figure 8B is
Since it is YES, the flag SBCF=
1, add the data length, and set the data block BL3 as shown in Figure 5, to TR (Figure 5,
), the data is sent from the TR to the CPU.
In TR, as shown in Figure 7B, the number of transmitted data is
When the data length matches the data length from the MPU,
Send a transmission end request to the CPU as shown in ○, and wait for SND command 1 to turn off. The CPU receives the block data BL3 as shown in FIG. 5, confirms the transmission end request from the TR, and then turns off the SND command 1. Furthermore, since the flag SBCF in the header of the transmission data is "1", it is known that there is continuing data, so the SND command 2 is subsequently turned on to prompt the TR to transmit. From this ON signal, the TR creates an SND order in the same manner as above, adds a header, and sends it to the MPU (see Figure 5 L and O). TR the block data BL4 of
(See wa, wa', and ka in Figure 5). At this time, the flag in the header
Since SBCF is “0” as shown in Figure 5,
The CPU then knows that the transmission process has ended and continues the interrupted reception process. Note that this series of processing is performed by proceeding to A in FIG. 6 through steps ◯ 2 to ◯ and ○ in FIG. 6B. The CPU is the fifth
In order to send the data block BL2 shown in Figure A, create a header as shown in Figure 6A, and
Since command 2 is turned on (see ○C in Figure 6A) and the received data BL2 is sent to TR, TR receives RCV.
As in the case of command 1, set RCF=1 to the MPU, add the data length, and send data BL2 (see Fig. 5, y, t, y). MPU is data BL2
When this is received, it is known that the entire amount of data for the first order has been received, so at this point the processing of the received data is started.

In the above case, the RCV command and the SND command are sent out through dedicated control lines, but these commands can be sent out in code form through a data line. In that case, it can be easily realized by adding information indicating the received data length to the header H1 described in FIG. 4A and performing the command output processing by the CPU in the receiving operation. In addition, by adding the function of detecting RCV command and SND command orders to TR,
It is also possible to provide dedicated control lines and data lines between the MPU and TR to perform data transmission and reception processing. Moreover, although an example in which transmission processing is interrupted during reception processing has been described above, it is also possible to interrupt reception processing during transmission processing in the same manner as described above. In other words, during transmission processing, the CPU
The next block will not be sent unless the CPU sends an SND command, so the CPU will operate as usual.
After sending the RCV command, the received data can be sent.

As described above, according to the present invention, each of the CPU, TR, and MPU is provided with the function of creating a header having at least the transmission (reception) block continuation flag at the beginning of the transmission/reception data, and the function of detecting the header. At the same time, when the received data block is the first block, the MPU always refers to the following order to determine what processing should be executed, so the CPU and μ-CON
When transmitting/receiving block data using half-duplex communication method, it is possible to interrupt the execution of one command while the other command is being executed, thus making it possible to perform appropriate transmission/reception processing according to the request. This has the advantage that.

In addition, although the case where block data is sent and received using the half-duplex method between a host computer (CPU) and a lower-order processing unit (μ-CON) such as a peripheral processing unit has been explained above, It can also be applied to cases where communication is performed by mutually issuing sending and receiving commands.

[Brief explanation of drawings]

Figure 1 is a block diagram showing the general configuration of a system consisting of a host computer (CPU) and a peripheral processing unit (μ-CON), Figure 2 is a block diagram showing the configuration of transmitted data, and Figure 3 is a block diagram showing the conventional system configuration. FIGS. 4A, 4B, and 4C are explanatory diagrams for explaining the format of information transmitted in the present invention. FIG. 5 is an explanatory diagram for explaining the transmitting and receiving system according to the present invention. , Figure 6 is a flowchart showing the transmission and reception operations in the central processing unit (CPU), Figure 7 is a flowchart showing the transmission and reception operations in the transmission and reception control unit (TR), and Figure 8 is the transmission and reception operation in the microprocessor (MPU). This is a flowchart showing the following. Code explanation, 1... Upper computer (CPU), 1R,
21R...Reception buffer, 1S, 21S...Transmission buffer, 2...Peripheral processing device (μ-CON), 2
1... Transmission/reception control unit (TR), 22... Microprocessor (MPU), L _D ... Data line, L _R ...
Reception control line, L _S ...Transmission control line, L _T ... Termination request signal line.

Claims (1)

[Scope of Claims] 1. In a device that transmits and receives data between a central processing unit and a peripheral processing unit consisting of a transmission/reception control unit and a peripheral processing unit, the central processing unit: A receive command or a transmit command is sent to the transmission/reception control unit via the data line or in code form, and when the receive command is sent, a header section containing flag information indicating whether the block is the first block or a continuation block is subsequently sent. Sends the attached reception data to the transmission/reception control section, and when a transmission command is sent, if it is determined that it is not an end block based on the flag information in the header section attached to the transmitted block, it sends the transmission command again, When the transmission/reception control unit receives a reception command from the central processing unit, the transmission/reception control unit divides the continuously received reception data into blocks according to its own receivable data length, and divides each divided block into blocks with the beginning of the received data. A header section containing flag information indicating whether it is a block or a continuation block is attached and sent to the peripheral processing section, and when a transmission command is received from the central processing unit, the transmission command is converted into a corresponding predetermined order. The order is then sent to the peripheral processing unit with a header section containing flag information indicating the first block, and then the peripheral processing unit that decodes the order divides the order into blocks, adds a header to each block, and sends out the order. The peripheral processing unit sends the data to the central processing unit, and when receiving the received data from the central processing unit, the peripheral processing unit calculates the amount of the total received data written in the order provided at the head of the received data. The end of reception is determined by receiving data, and when a transmission command converted into a predetermined order from the transmission/reception control unit is received and decoded, the transmission data sent out from the central processing unit is Divide the block into blocks according to the data length that can be received by the transmission/reception control unit, give each divided block a header section containing flag information indicating whether it is a continuation block or an end block, and send it to the transmission/reception control unit; When the peripheral processing unit issues a transmission command during a reception operation or a reception command during a transmission operation, the central processing unit stores continuation information indicating continuation of reception or transmission and interrupts reception or transmission of the continuation block. , transmitting the transmission command or reception command to the transmission/reception control unit to cause the transmission operation or reception operation to be performed based on the transmission command or reception command, and interrupting the transmission operation or reception operation based on the continuation information after the transmission operation or reception operation is completed. A method for transmitting and receiving block data characterized by restarting a receiving operation or transmitting operation of a continuation block that has been in progress.