JPH02118968A - Data reproduction circuit - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Table of contents] (Overview Industrial field of application Prior art (Figure 6) Means for solving the problem to be solved by the invention (Figure 1) Working example (a) Description of one embodiment (FIGS. 2 to 4) (b) Description of another embodiment (FIG. 5) (C) Description of another embodiment Effects of the invention [Summary] From a storage medium such as an optical disk to a head The purpose of the data reproducing circuit, which uses a comparator to reproduce data from the read signal read by the head, is to compare the signal read by the head from the storage medium with a predetermined threshold level, with the aim of reducing the probability of uncorrected pull errors occurring. In a data reproducing circuit including a comparator for reproducing data, the threshold level is set high when checking write data;
A variable threshold circuit is provided to set the threshold low when reading.

[Industrial application field]

The present invention relates to a data reproducing circuit that uses a comparator to reproduce data from a read signal read by a head from a recording medium such as an optical disk.

Data reproducing circuits are widely used to obtain pulsed data from a read signal for reading recording media such as optical disks and magnetic disks.

In such a data reproducing circuit, data is reproduced using a comparator, and it is desired that appropriate reproduced data can be obtained depending on the purpose of reading.

[Conventional technology] 6th [IJ is an explanatory diagram of the prior art.

As shown in FIG. 6(A), the read signal read from the optical disk 4 by the optical head 5 is input to the data reproducing circuit.

In the data reproducing circuit, the read signal is differentiated by a differentiating circuit 1, and then AGC (automatic gain control) is performed by an AGC circuit 2.
The C output AGCO is regenerated into pulsed (regenerated) data RD DATA by the pulse generator 3.

The pulsing circuit 3 has a comparator, and the AGC output A
By comparing Cco with the threshold level Vs, the reproduced data RD DATA is reproduced as shown in FIG. 6(B).

By the way, since the optical disk 1g has a high recording density of 1 μm or less per bit, the error rate is lower than that of a magnetic disk device.

For this reason, after data is recorded on the optical disc 4, the optical disc 4 is read to confirm whether or not the data has been recorded normally (this is called write verification).

Here, if data is not recorded well and there is a problem in reproduction, the data is recorded again in a replacement block.

However, even though write verification determined that the data was normal, there were many cases in which playback became impossible (uncollectible error) when reading later.

As a countermeasure to this problem, conventional error correction function (Error Co1
1ection code) correction ability!・It was lowered when helified, raised higher when normally read, and made stricter checks during write verification.

[Problem to be solved by the invention]

Abnormal record part AGCOI at the time of abnormality shown in Figure 6 (C)
, AGCO2 occurs when there is some kind of malfunction in the focus servo unit of the optical disc or due to a medium defect.

A threshold level Vs of a comparator for pulsing such AGC output AGCO is set, and a reproduction pulse train RD ciATA is obtained.

Here, if the waveform abnormality is like AGCO2, a missing pulse NOP will obviously occur during write verification, and replacement processing will be performed.

However, if the waveform abnormality is just below the threshold level Vs, such as in AGCO1, there will be no gaps during write helifi, it will not appear as an error, and the replacement process will not be performed and the process will end normally. be.

When reading something in this condition at a later date, due to slight differences in focus point and read power,
An uncollectible error may occur that makes playback impossible.

Conventionally, this has been dealt with by varying the correction ability of ECC, but while ECC works effectively for burst defects, it is not effective for those where the level changes gradually. , a problem has arisen in that it is difficult to sufficiently suppress uncollectible pull errors.

Therefore, an object of the present invention is to provide a data reproducing circuit that can sufficiently reduce the probability of occurrence of an uncollectible error.

[Means to solve the problem]

FIG. 1 is a diagram showing the principle of the present invention.

As shown in FIG. 1, the present invention provides a data reproducing circuit that includes a comparator 32 that reproduces data by comparing a signal read by a head 5 from a storage medium 4 with a predetermined threshold level. , a variable threshold circuit 31 is provided which sets the threshold high when checking or writing write data and sets the threshold low when reading data.

[Effect]

The present invention provides a comparator 3 for regenerating the data bus.
2 threshold level for write data
Since vh is set high at the time of error, blocks that are likely to cause an error can be replaced in advance.

Further, during reading (normal reading or read retry), the threshold level is set as low as Vl, so that the pulse train can be reproduced sufficiently against level down due to changes in focus position or read power.

Furthermore, if the threshold level is kept constant at high vh, an uncorrectable error is likely to occur during reading, and if the threshold level is kept constant at low (■β), noise tends to spread, which is undesirable.

〔Example〕

(a) Description of an Embodiment FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is a block diagram of essential parts of an embodiment of the present invention.

As shown in FIG. 2, the optical head 2 irradiates the optical disc 1 with a light beam and creates a read signal from the reflected light.

The read signal is input to the data reproducing circuit, differentiated by the differentiating circuit 1, and AGC circuit 2 converts the read signal to A-G C? tilJ please,
The pulse generator 3 reproduces the data into pulse data.

The optical head 2 performs track following control along the trunk of the optical disc 1 and performs focus control to adjust the focus position using reflected light from the optical disc 1.

FIG. 3 shows details of the pulsing circuit 3 having the configuration shown in FIG.

In the figure, 30 is a pulse shaper (pulse shaping circuit), and the two-phase AGC output AGCO1*A from the AGC circuit 2
31 is a threshold variable circuit that pulse-shapes the GCO and outputs it, and when the mode signal MS is "low"
(normally in read mode), the transistor Tr is turned off, the potential difference between the resistors 15 is made small, and the ΔGC output A is
By setting the bias potential difference between GCO1*AGCO small and setting the low threshold level Vp to the mode signal M
When S is "high" (at the time of write helifi), the transistor Tr is turned on and the potential difference between the resistors 16 is increased,
A G C output By increasing the bias potential difference between AGCO and IAGCO, a high threshold hold level vh
It gives

32a is a first comparator, which slices the second ACC output *AGCO using the first 〇C output AGCO as a slice level. For ○, the second AGC output *AGCo is used as the slice level to slice.

34 is Furi, Bufronop, and the first comparator 3
set by the output of 2a, the second comparator/re 32b
35 is an AND gate that is reset by the output of and creates data window wd.
36 is a monostable circuit which converts the output of the AND gate 35 into read data RD DATA of a constant width and outputs the same.

FIG. 4 is an explanatory diagram of the operation of one embodiment of the present invention.

When refining to write, the mode signal MS from the controller (not shown) becomes "high", and the transistor Tr
Since the resistors 16 are turned on, the potential difference between the resistors 16 becomes large.

Therefore, as shown in FIG. 4(C), the comparator 32
The bias potential between the inputs A, G, and CO1*AGCO of a is increased to vh.

On the other hand, when reading, the mode signal MS becomes "mouth",
Since the transistor Tr is turned off, the potential difference between the resistors 18 becomes small.

Therefore, as shown in FIG. 4(B), the comparator 32
The bias potential between input AGCO1*AGCO of a is set to VZ
Let it be small like .

This changes the slice level AGCO in the comparator 32a.

The comparator 32b has a reverse phase input, but operates in a similar manner, and the slide level *AGCO becomes i.

In the comparator 32a, as shown in FIG.
AGC output *A with C output AGC○ as slice level
The GCO is sliced and the output is input to the cent terminal of the flip-flop 34.

On the other hand, in the comparator 32b, as shown in FIG. 4(A), the AGC output *AGCO is set as the slice level.
Slice the output AGCO and send the output to flip-flop 3
Input to the reset terminal of 4.

The flip-flop 34 is clocked at the rising edge of the output of the comparator 32a and reset at the rising edge of the output of the comparator 32b, creating a data window wd.

The AND gate 35 opens in the data window wd and outputs the pulse output of the pulse shaper 30 to the monostable circuit 36.
Output to.

In this way, the threshold level of the data window creation route can be set to a high V
h, the threshold level for data reproduction is changed by setting it to 1, which is low during normal reading.

Therefore, during write verification, the threshold level for data reproduction changes to high, and during normal reading, the threshold level changes to low.

Therefore, during ride verification, a strict check is performed at a high threshold level, and during normal reading, a low threshold level is used to enable smooth data reproduction in accordance with signal fluctuations.

(b) Description of other embodiments FIG. 5 is a block diagram of main parts of another embodiment of the present invention.

In this embodiment, the mode signals are MSI and MS2, and the transistors T r 1 . Tr2 is provided in parallel in the variable threshold circuit 31, so that the threshold level can be switched to three levels: Vh, Vm, and V-.

This embodiment is useful when performing read retry.

In other words, if a read error occurs due to read operation,
Retry the read or retry.

In order to relax the reproduction conditions at this time, the following procedure is performed.

First, in write refinement, the mode signals MS1 and MS
Both transistors Tr+ and Tr2 are turned on, increasing the potential difference across the resistor r6 and providing a high threshold level vh.

Next, during normal reading, one of the mode signals MSI and MS2 is set to "high" and the other is set to 10-, and the transistor Tr
Either r or Tr2 is turned on and a medium threshold level Vm is applied.

Furthermore, during read retry, mode signals MS1 and Ms
2 are set to "low", transistors Tr1 and Tr2 are turned off, and a low threshold level v1 is provided.

As a result, at the time of read retry, the threshold level for data reproduction becomes low, so the possibility of data reproduction by retry increases, and the probability of occurrence of an uncollectible error is further reduced.

(C) Description of Other Embodiments In the embodiment shown in FIG. 5, the threshold level is changed between read retry and normal read, but may be the same.

In this way, the probability of a -layer uncollectible error is further reduced.

Alternatively, the same threshold level may be used during write verify and normal read, and a low threshold level may be used only during read retry.

In this way, it is resistant to noise and can prevent uncollectible pull errors from occurring during read retry.

Furthermore, although the threshold level for creating the data window signal is controlled by the mode signal, threshold levels for reproducing other data may also be controlled.

Moreover, although the target was the read signal of an optical disk device,
Other read signals such as a magnetic disk device may also be used.

Although the present invention has been described above using examples, the present invention can be modified in various ways according to the gist of the present invention, and these are not excluded from the present invention.

〔Effect of the invention〕

As explained above, according to the present invention, the threshold level for data reproduction is changed at the time of write verification and at the time of read (normal read or read retry). This has the effect of performing alternation processing in advance, increasing the margin against errors, and making it possible to reduce the probability of occurrence of uncollectible errors.

[Brief explanation of drawings]

Fig. 1 is a diagram of the principle of the present invention, Fig. 2 is a block diagram of an embodiment of the present invention, Fig. 3 is a block diagram of main parts of an embodiment of the present invention, and Fig. 4 is an explanation of the operation of an embodiment of the present invention. FIG. 5 is a block diagram of main parts of another embodiment of the present invention, and FIG. 6 is an explanatory diagram of the prior art. In the figure, 3-data reproducing circuit, 4-head, 5.-
Storage medium, 31-Threshold variable circuit, 32.32a, 32b-Comparator. Patent Applicant: Fujitsu Limited, Representative Patent Attorney Akira Yamatani, Eiri Yamatani) Fusuma: Amendment Procedure (Voluntary) (B) November 21, 1988 Commissioner of the Japan Patent Office Yoshi 1) Mr. Moon Takeshi (＼：・＞１、 Display of the case 1986 Patent Application No. 270421 2
, Title of the invention Data reproduction circuit 3, Relationship to the case of the person making the amendment Patent applicant address 1015 Kamikonaka, Nakahara-ku, Yozaki City, Kanagawa Prefecture Name (522) Takuma Yamamoto 4, Representative of Fujitsu Limited Agent address: 1-19-8R, Kanda-Awajicho, Chiyoda-ku, Tokyo
D DATA 6.Detailed description of the invention column of the specification to be amended Contents of the amendment to the explanatory word for barley ice investigation■, "Data bus" on page 7, line 12 of the specification is changed to "data pulse" to correct. 2. In the 9th line of page 11, "Iruko naru." is corrected to "Iru ni naru." 3. Correct the "slice level" on the 11th line of the same truth to "slice level j." 4. Correct the "detatsumatomai." on the 16th line of the 14th page of the same truth to "
It may be. ” he corrected. that's all

Claims (1)

[Claims] (1) In a data reproducing circuit equipped with a comparator (32) that compares the signal read by the head (5) from the storage medium (4) with a predetermined threshold level and reproduces the data, the threshold level is set to the write data. A data reproducing circuit characterized in that it is provided with a variable threshold circuit (31) that sets a threshold high when checking and low when reading.