JPH0211904B2 - - Google Patents

Description

[Detailed description of the invention]

[Technical field] The present invention forms an image by forming an electrostatic latent image on a photoreceptor and then developing it, and in particular, it is possible to stabilize the surface potential regardless of changes in the characteristics of the photoreceptor. The present invention relates to an electrostatic recording device. [Prior Art] An electrostatic recording device that forms an electrostatic latent image on a recording medium such as a photoreceptor or an insulator is conventionally well known, and in this specification, an electrophotographic method disclosed in Japanese Patent Publication No. 23910 of 1962 will be described. This will be explained by taking a copying machine using this as an example. How the surface potential of the photosensitive drum changes corresponding to bright areas (areas that reflect more light) and dark areas (areas that reflect less light) of the document at each processing position in the copying process of such a copying device is investigated. Shown in Figure 2. What is required for the final electrostatic latent image is the surface potential at the point in the figure, and the surface potentials a and b in the dark and bright areas at that point will change when the ambient temperature of the photosensitive drum increases, as shown in figure 3 , B', and as the photosensitive drum ages, it also changes as shown in A' and B' in FIG. 4, making it impossible to obtain contrast between dark and bright areas. A method of compensating for such changes in surface potential is described in Japanese Patent Application Laid-Open No. 1983-1997, which is filed by the present applicant.
It is disclosed in Publication No. 29857. However, when the photoreceptor in the apparatus is changed to a photoreceptor with different characteristics, the control program created for the previous photoreceptor becomes completely invalid due to the difference in characteristics, and a new control program must be reassembled. [Purpose] The present invention has been made in view of the above points, and its purpose is to provide an electrostatic recording device that can always stabilize the surface potential even if the characteristics of the photoreceptor change. It is in. That is, the present invention provides an electrostatic latent image forming means for forming an electrostatic latent image on a photoreceptor, a developing means for developing the electrostatic latent image formed on the photoreceptor, and a method for detecting the surface potential of the photoreceptor. a detection means, and a control means for setting operating conditions of the electrostatic latent image forming means by executing a potential control program based on the output of the detection means in order to bring the surface potential of the photoreceptor to a target potential. , the control means operates the electrostatic latent image forming means based on control data, and provides a coefficient corresponding to the sensitivity of the photoreceptor with respect to surface potential data detected by the detection means in this state. Calculate correction data by performing calculations according to the calculation formula, set the data obtained by adding the correction data to the control data as new control data, and adjust the electrostatic latent image based on the new control data. a first potential control program that stabilizes the surface potential by operating the forming means; and a first potential control program that adds or subtracts predetermined data that becomes smaller sequentially depending on the number of repetitions to the surface potential data repeatedly detected by the detection means; A built-in second potential control program for stabilizing the surface potential by operating the electrostatic latent image forming means based on the result, and an input terminal for selecting either the first or second program. the first, by determining the signal level of the input terminal;
Select one of the second potential control programs,
The present invention provides an image forming apparatus characterized in that a selected potential control program is executed on the output value of the detection means. [Example] Examples of the present invention will be described below. (Schematic Structure of Copying Apparatus) FIG. 1a is a sectional view of a copying apparatus to which the present invention can be applied. The surface of the drum 47 is made of a three-layer seamless photoconductor using a CdS photoconductor, is rotatably supported on a shaft, and is rotated in the direction of the arrow by a main motor 71 activated when the copy key is turned on. Start. When the drum 47 rotates by a predetermined angle, the original placed on the original platen glass 54 is moved to the first scanning mirror 44.
illuminated by an illumination lamp 46 integrally configured with
The reflected light is scanned by the first scanning mirror 44 and the second scanning mirror 53. The first scanning mirror 44 and the second scanning mirror 53 move at a speed ratio of 1:1/2, so that the original is scanned while the optical path length in front of the lens 52 is always kept constant. The above reflected light image shows the lens 52 and the third mirror 55.
After passing through, an image is formed on a drum 47 at an exposure section. The drum 47 is simultaneously neutralized by the pre-exposure lamp 50 and the pre-AC charger 51a, and then corona-charged (for example, +) by the primary charger 51. Thereafter, the drum 47 is the exposure section, and the image irradiated by the illumination lamp 46 is slit-exposed. At the same time, AC or corona charge removal with a polarity opposite to the primary one (for example -) is performed by a charge remover 69, and then a high-contrast electrostatic latent image is formed on the drum 47 by uniform surface exposure using a full-surface exposure lamp 68. The electrostatic latent image on the photosensitive drum 47 is then developed with liquid by the developing roller 65 of the developing device 62 and visualized as a toner image, and the toner image is easily transferred by the pre-transfer charger 61. Upper cassette 10 or lower cassette 11
The transfer paper inside is fed into the machine by a paper feed roller 59, and is sent toward the photosensitive drum 47 with accurate timing by a register roller 60, so that the leading edge of the latent image and the leading edge of the paper are aligned at the transfer section. Can be done. Next, while the transfer paper passes between the transfer charger 42 and the drum 47, the toner image on the drum 47 is transferred onto the transfer paper. After the transfer is completed, the transfer paper is separated from the drum 47 by the separation roller 43, sent to the conveyance roller 41, guided between the hot plate 38 and press rollers 39, 40, and fixed by pressure and heat. The paper is discharged to the tray 34 by the discharge roller 37 via the paper detection roller 36 . After the transfer, the drum 47 continues to rotate and its surface is cleaned by a cleaning device composed of a cleaning roller 48 and an elastic blade 49, and the process proceeds to the next cycle. Here, a surface electrometer 67 for measuring the surface potential is connected to the drum 47 between the entire surface exposure lamp 68 and the developing device 62.
mounted in close proximity to the surface of the As a cycle executed prior to the above copy cycle, there is a step of pouring a developer into the cleaning blade 49 while the drum 47 is stopped after the power switch is turned on. Hereinafter, this will be referred to as pre-wet. This is to flush out the toner accumulated near the cleaning blade 49 and to provide lubrication to the contact surface between the blade 49 and the drum 47. After the prewetting time (4 seconds), the drum 47
Rotate the pre-exposure lamp 50 and pre-AC static eliminator 51
There is a step in which residual charges and memory on the drum 47 are erased by means such as a, and the drum surface is cleaned by a cleaning roller 48 and a cleaning blade 49. Hereinafter, this will be referred to as pre-rotation INTR. This is to make the sensitivity of the drum 47 appropriate and to form an image on a clean surface. Also, as a cycle after the set number of copy cycles are completed, the drum 47 is rotated several times and
Next, there is a step in which residual charges and memory on the drum are removed using a charger 69 or the like, and the drum surface is cleaned. Hereinafter, this will be referred to as post-rotation LSTR. This is to leave the drum 47 electrostatically and physically clean. (Blank exposure lamp) Figure 1b shows the blank exposure lamp 70 of Figure 1a.
It is a plan view of the vicinity. Blank exposure lamp 70-
1 to 70-5 are turned on when the drum is rotating and not during exposure to erase the drum surface charge and prevent excess toner from adhering to the drum. However, since the blank exposure lamp 70-1 illuminates the drum surface corresponding to the surface electrometer 67, it is turned off momentarily when the dark area potential is measured with the surface electrometer 67. Also, for B size copies, the image area is A4
The blank exposure lamp 70-5 is turned on for the non-image area even when the optical system is moving forward. The lamp 70-0 is called a sharp cut lamp, and the separation guide plate 43
The part of the drum that is in contact with -1 is irradiated with light to completely erase the charge on that part to prevent toner from adhering and to prevent the separation width from being contaminated. This sharp cut lamp is always lit while the drum is rotating. (Surface Potential Control) Next, a surface potential control method for compensating for changes in surface potential due to temperature changes or changes over time will be outlined. In this embodiment, in order to detect the drum surface potential in bright and dark areas, the document illumination lamp 4 shown in FIG.
A blank exposure lamp 70 is used instead of a lamp 6. The electrometer 67 measures the surface potential of a portion of the drum surface irradiated with light from the blank exposure lamp 70 as a bright area surface potential, and measures the surface potential of a portion of the drum surface that is not irradiated with light from the blank exposure lamp as a dark area surface potential. Measure with. Regarding the electrometer, please refer to the above-mentioned Japanese Patent Laid-Open Publication No. 55-29857. First, the values of the bright and dark potentials that allow obtaining an appropriate image contrast are set as target values. The bright area potential target value is V _LO and the dark area potential target value is V _DO
shall be. Also, the nth time (n=1, 2, 3,...)
The light potential measurement value is V _Lo and the dark potential measurement value is V _Do
shall be. (First surface potential control method) First, a first control program for matching the bright and dark potentials to the target values will be described. The initial value of the primary charger current is DC _O , and the primary charger current during n-time control is DC _O . Similarly, the initial value of the secondary charger current is A _O , and the secondary charger current during n-time control is A _O . The primary charger current DC _o and the secondary charger current AC _o during n-time control are given by the following equations. DC _o = α ₁・(V _Do −V _DO )+α ₂・(V _Lo −V _LO )＋DC _o-1 (1) AC _o = β ₁・(V _Do −V _DO )+β ₂・(V _Lo − V _LO ) + AC _o-1 (2) However, n = 1, 2, 3, ... α ₁ = △DC (change in primary charger current)
/△V _D (change in dark potential) (=constant) (3) α ₂ =△DC (change in primary charger current)
/△V _L (change in bright area potential) (=constant) (4) β ₁ =△AC (change in secondary charger current)
/△V _D (change in dark potential) (=constant) (5) β ₂ =△AC (change in secondary charger current)
/ΔV _L (change in bright area potential) (=constant) (6) α ₁ , α ₂ , β ₁ , and β ₂ are constants determined by the characteristics of the photosensitive drum 47, and differ depending on the type of photosensitive drum. First, D _O and A _O are output to the primary charger 51b and the secondary charger 69. At this time, the blank exposure lamp 70-1 is blinked, the bright area potential V _L1 and the dark area potential V _D1 are measured with the surface electrometer 67, and DC ₁ and AC ₁ are calculated using equations (1) and (2). ,Output. Similarly,
Measure V _L2 and V _D2 , calculate and output DC ₂ and AC ₂ ,
This is repeated to obtain the n-th control values DC _o and AC _o . (Second surface potential control method) Next, an outline of the second control program will be explained. To explain only the control of the dark potential V _D ,
First, the reference current DCSA is passed through the primary charger 51,
It is determined whether the surface potential V _D1 of that part of the photoreceptor is larger or smaller than the target value V _DO , and if it is larger, the value obtained by subtracting the parameter P from DC _O is applied to the primary charger 51 . Then, by sequentially decreasing the value of the parameter P and repeating this control, the dark area potential is
V _D gradually approaches the target value V _DO . Regarding the light potential V _L , the current flowing through the secondary charger 69 is controlled in the same way as the dark potential. As mentioned above, if the sensitivity characteristics of the photoreceptor are known to some extent, the first control program is effective because the number of detection controls is small, and when the second control program is used, the sensitivity characteristics of the photoreceptor are known. Regardless of the sensitivity characteristics, the surface potential can be converged to the target value. (Control Circuit) Next, a control circuit that can implement the present invention will be described. (Potential Control Unit) FIG. 5 is a circuit diagram of the potential control unit.
The CPU 1 is a microcomputer that stores programs for outputting signals to drive and control each part of the copying machine, including a drum clock pulse DCK synchronized with the rotation of the drum 47, a jam detection signal JAM, signals from the key matrix KM, etc. Drum rotation signal DRMD, platen advance signal based on the input signals of
Outputs SCFW, reverse signal SCRV, document illumination lamp drive signal IEXP, primary charging drive signal HVDC, AC static eliminator drive signal HVAC, output signal to display DPY, etc. Along with this, a microcomputer for potential control
It outputs a signal to control the CPU2. Microcomputer CPU for sequence control
Primary charging drive signal HVDC from 1, AC static eliminator drive signal HVAC, bright area potential detection timing pulse
V _L CTP, dark potential detection timing pulse V _D
CTP, standard bright area potential detection timing pulse v _L
CTP and developer drive signal DBTP are connected to input terminals T ₀ and T ₁ of the potential control microcomputer CPU2 and data buses DB ₀ to _{DB 3} via inverter buffers Q ₂₀ and Q ₂₁ . In addition, the initial reset pulse is sent to the CPU2 terminal via the inverter _Q20-7 .
Input to RESET. Based on these timing signals, the CPU 2 takes in surface potential A/D conversion data, which will be described later, performs predetermined arithmetic processing internally, and uses the results as the primary current control value, secondary current control value, and development bias control value. Output to A converter. In addition, by switching the mode changeover switch SW ₁ , the value that causes the reference current to flow through the primary and secondary chargers regardless of the above control value is set, and the value equivalent to 0V for the developing bias is set to the CPU.
It is also possible to output from 2. The surface potential measured by the surface electrometer is terminal TP1.
is input. Further, the surface potential is inputted to the inverting input terminal of the operational amplifier Q23-3 via the resistor R40-4, and is inverted and amplified with a gain determined by the ratio of the resistors R40-4 and R40-5. A bias of +6V which can be divided by resistors R45-1 and R45-2 is applied to the non-inverting input terminal of Q23-3 to perform a level shift. The output of Q23-3 is operational amplifier Q2
3-4 is input to an inverting buffer with a gain of 1. The level of the measured potential is adjusted by varying the voltage applied to the non-inverting input of Q23-4 using variable resistor VR7. The output of Q23-4 is sent to operational amplifiers Q23-1 and Q23 as a low impedance signal that varies from 12V to 17V in proportion to the displacement of the surface potential.
-2 etc. is input to the A/D conversion section.
The A/D command signal ADC from CPU2 is normally "H", the output of inverter Q16-4 is "L", the source and gate of FET switch Q24 is zero bias, and the source and drain of Q24 is zero bias. Conducting, the output of op amp Q23-2 is held at +12V. The CPU 2 detects the falling edge of the timing pulses V _L CTP, V _D CTP, and υ _L CTP given from the CPU 1, changes the A/D command signal from "H" to "L", and outputs it to the inverter Q16-4. At this time, the output of Q16-4 becomes "H" and a reverse bias is applied to the gate of FET Q24, thereby cutting off Q24. Q
Since +12V is applied to the non-inverting input terminal of 23-2 via the resistor R45-6, when Q24 is cut off, the output of Q23-2 and the capacitor C4
0, the integration circuit loop of resistor R46 is configured and Q
The output of 23-2 has an initial voltage of 12V, and the current flowing through R46 linearly charges the capacitor C40 until the A/D command signal becomes "H" and FETQ24 becomes conductive. When FETQ24 conducts, C4
The charge stored in 0 is discharged through R41-4, and the output of Q23-2 rapidly drops to 12V. After integration is started as described above by the A/D command, after a certain period of time, the CPU 2 starts counting. Start. In order to match this counting start point with the minimum value 12V of the output of Q23-4, the output of Q23-2 is level-shifted by resistors R41-2 and R41-3, and the operational amplifier Q23-1 forming the comparator is
is inputted to the non-inverting input terminal of 1 through a resistor R45-7. On the other hand, the measured potential is input to the inverting input of Q23-1 via a resistor R27-6. While the output voltage of the integrating circuit is lower than the measured potential, Q
The output of 23-1 is “L”, and during this time the CPU
Counting is performed inside 2. When both voltages match, Q2
The output of 3-1 becomes "H" and this level change causes the Zener diode ZD3 and the inverter Q21-1 to
is input to the interrupt terminal of the CPU 2 as a counting end pulse. The CPU 2 processes the internal count value until the end of counting as the measured potential A/D converted value. In this way the timing pulse
Each potential of the bright area potential, dark area potential, and standard bright area potential can be A/D converted in synchronization with each pulse of V _L CTP, V _D CTP, and v _L CTP. In this embodiment, the CPU 2 is an NMOS 1-chip 8-bit microcomputer (μPD8048C). The signals shown in the table below are input to or output from the CPU terminals. Here, the signal CS1 is input to the input terminal P26 of the CPU2, and the CPU2 receives this signal as described later.
Either the first control program or the second control program is selected and executed depending on the level of CS1. Further, a signal CS2 is input to the input terminal P27, and the CPU 2 calculates calculation coefficients α ₁ , α ₂ , β used in the first control program of the first surface potential method according to the level of CS2 as described later. ₁ , select _β2 .

【table】

[Table] (Potential display mode) Signals DMS1, 2, EPC, and DBC from the changeover switch SW1 are input to the terminals DB4 to DB7. The control mode of CPU2 in each signal state is shown in the table below.

[Table] (D/A converter) Next, the D/A converter will be explained. The CPU2 and the D/A converter Q18 are connected by four data lines DA0 to DA3 and one control line LD1. At the rise of LD1, the CPU 2 specifies with DA0 to DA3 whether the data to be D/A converted is primary current control data, secondary current control data, or developing bias control data. At the falling edge of LD1, the data on DA0 to DA3 sent from CPU2 is transferred to D/A converter Q.
Latch inside 18. D/A converter Q18 is
Internally latched data and capacitor C37,
4 counted by the internal clock oscillated by C38, C39, resistor R41-1, and coil L5.
This is done by detecting a match with a bit, 6-bit, or 12-bit binary counter. That is, an analog value is obtained by integrating pulses whose duty varies depending on the data. The D/A output, DAC3 and 4 each have a 4-bit resolution pulse, and DAC1 has a 12-bit resolution pulse.
2 is constructed so that pulses with 6-bit resolution can be obtained respectively. These pulses are connected to resistor R3
9. Converted to an analog voltage by an integrating circuit using a capacitor C34. Further, R36 is a pull-up resistor added because the output is an open drain. The D/A converted primary current control value becomes a voltage value corresponding to the upper 4 bits in DAC4 and the lower 4 bits in DAC3. These are operational amplifiers Q22-3, Q
After passing through the non-inverting buffer by 22-4, R
57-2 and R35-2 to obtain a voltage value corresponding to 8 bits, which is applied to the No. 1 terminal of the changeover switch SW2. The secondary current control value is converted to a voltage value equivalent to 12 bits and output from DAC1 to operational amplifier Q22-2.
After passing through a non-inverting buffer, it is applied to the No. 1 terminal of the changeover switch SW3. The developing bias control value is integrated and then applied to the first terminal of the changeover switch SW4. Changeover switches SW2, SW3, and SW4 are for CPU2
This circuit is provided to switch between potential control by the CPU 2 and a circuit that causes a reference current to flow through the charger without going through the CPU 2 and sets the developing bias to a predetermined value. By this switching, even in a situation where the CPU 2 becomes inoperable due to some kind of accident, it is possible to supply a reference current to the charger and set the developing bias to a predetermined value. On the primary side, a voltage that provides a reference current is applied to the second terminal of the changeover switch SW-2 by resistor division through R57-4 and R57-8. On the other hand, for the secondary, there is a signal to switch between AC and weak AC.
Inverter Q16-3 is turned on and off by HVDC. Q16- when HVDC is “H”
3 outputs become “L” and R57-5, R57-6,
The voltage determined by R57-7 is the selector switch.
It is given to the 2nd terminal of SW-3. This voltage is
It is set to provide an AC reference current. next
Q1 when HVDC goes “L” and weak AC flows.
6-3 is turned off and the voltage determined by R57-5 and R57-7 is switched to provide a weak AC current. Regarding the developing bias, R is the same as in the primary case.
57-2, the voltage obtained by resistor division with R30-1 is set as the developing bias reference voltage with the selector switch SW-.
It is given to the 2nd terminal of 4. As described above, when the circuit before the D/A converter malfunctions, the switching means SW2 to SW4 prevent the malfunction from reaching the high-voltage charger and developing bias circuit in the subsequent stage, and furthermore, the high-voltage charger and developing bias circuit are A predetermined value is set so that the circuit outputs a reference current or reference voltage. Therefore, even if the device before the D/A converter fails, image formation can be performed and extreme deterioration of image quality can be prevented. Primary charger control voltage V _P is terminal 1-3 of SW-2.
The signal is input to the non-inverting input terminal of the operational amplifier Q14-1 via the resistor R19-1. Q14-
The voltage difference between the voltage V _FP applied to the inverting input terminal of Q1 and the V _P is multiplied by -R23/R19-1 and output from Q14-1. Primary charger drive signal HVDC is “L”
When , the Q20-2 output is “H” and the Q16-5 output is “L”, diode D12-1 is forward biased and conductive, and the Q14-1 output is approximately
It is clamped to 0.6V and the primary charger is turned off.
When the HVDC becomes "H", the Q14-1 output is output to the primary high voltage transformer TDC. The voltage applied to the primary transformer TDC is boosted to the secondary side according to the winding ratio of the transformer, rectified and smoothed by a diode and a capacitor, and then applied to the primary charger 51. The primary corona current Ip flowing through the primary charger 51 is detected by the resistor R11, R20-4, VR4, R2
Level shifted by 0-3 combination, Q14
-1 through the resistor R19-2, and the primary corona current Ip is controlled so that the voltage V _F p and the primary charger control voltage Vp match. Similarly AC static eliminator control voltage V _AC is operational amplifier Q1
It is inputted to the inverting input terminal of No. 4-2 via a resistor R19-2. The difference voltage between the voltage V _FAC applied to the non-inverting input terminal of Q14-2 and the correction voltage V _AC is -
The signal is multiplied by R24/R19-2 and output from Q14-2. Q2 when AC static eliminator drive signal HVAC is “L”
The 0-1 output becomes "H", the Q16-6 output becomes "L", the diode D12-3 becomes conductive, the output of Q14-2 is clamped to about 0.6V, and the AC static eliminator is off. When the HVAC becomes "H", the Q14-2 output voltage is applied to the AC high voltage transformer TAC. The output, which is boosted to the secondary side according to the winding ratio of the transformer, is rectified and smoothed by a diode and a capacitor, and becomes a DC component output. In addition, the AC high voltage transformer TAC also outputs an AC high voltage, and superimposes the DC component output to create a secondary
Output to AC charger 69. The AC corona current I _AC flowing through the secondary AC charger 69 is detected by the resistor R12. The detection output is amplified by amplifier Q9-1, integrated by R14-6 and C38, and then outputted by Q9-1.
After being bumped by 2, R20-5,R
20-7, level shifted by VR3 and Q14
-2 non-inverting input terminal, and controls the AC corona current I _AC so that the V _FAC and the secondary AC correction voltage V _AC match. As described above, the outputs of the high voltage chargers 51 and 69 are blocked by the diodes D _12-1 and D _12-3 . This is because CPU2 has not been reset at first, so the output of the digital computer is uncertain, so the signal is
Using HVDC and HVAC, the output of the high-voltage charger, that is, the primary charger 51, and the AC static eliminator is blocked regardless of the output of the digital computer, and high-voltage corona discharge occurs due to the uncertain control voltage, causing damage during the image forming cycle. This prevents an extremely undesirable situation. Q15-2 is a buffer circuit, and a value obtained by dividing 24V by variable resistor VR2 is obtained as the output of Q15-2.
The operational amplifier Q14-1 is an inverter, and when the primary charger control signal Vp decreases, the high voltage output current increases. When the primary charger control signal Vp begins to fall below the minimum value, the Q14-1 output increases to the maximum, and therefore the input to the primary high voltage transformer TDC increases to the maximum. Q14 that determines this maximum value
The above Q15-2 is set to a value approximately 1.2V lower than the -1 output.
If the output is adjusted by VR2, when the Q14-1 output attempts to exceed the maximum value, the diodes D12-4 and D13-3 become conductive, and the Q14-1 output will not increase beyond the maximum value. The same applies to the limiter on the AC static eliminator side. The developing bias control signal given to the 1st terminal of SW-4 is inputted from the 3rd terminal to the operational amplifier Q22-1 via the resistor R30-3.
It is amplified with a gain determined by the ratio of VR6 and R30-3, and from the output of Q22-1, transistors Q10 and Q
11 and is applied to the midpoint of the inverter transformer T2. A voltage obtained by dividing 24V by a variable resistor VR5 is applied to the non-inverting input terminal of Q22-1, and by adjusting VR5, the level of the developing bias can be varied. Further, by adjusting the VR6, the gain of the developing bias can be adjusted. When the drum is rotating and no development is being performed, the bias voltage is set to -75V to prevent developer from adhering to the drum. During standby, the bias voltage is set to 0V, and when the drum is not rotating,
This prevents the charged liquid developer from stagnation. During development, the development bias value is controlled to be +102V with respect to the standard bright area potential by the development bias control signal from the D/A converter. The developing bias value is obtained by a combination of a variable output inverter transformer T2 whose oscillation output changes depending on the current booster output, and a fixed output inverter transformer T1. Variable output inverter is transistor Q5, Q6
By using a self-excited oscillation inverter, Q5 and Q6 are alternately turned on and off, and the voltage induced on the primary side of T2 in response to the developing bias control voltage applied to the midpoint of T2 is determined by the winding ratio of T2. The voltage is increased to the secondary side voltage, half-wave rectified by D11, smoothed by C27, and a DC high voltage output is supplied to the developing roller via R17. On the other hand, in a fixed output inverter, 24V is applied to the middle point of the primary side of T1, and the secondary high voltage output is output according to the transformer winding ratio.
2. By rectifying and smoothing with C10, a negative fixed DC high voltage is obtained. A divided voltage is superimposed on the output of the variable output inverter from the center of resistors R3-1 and R3-2, and the developing bias voltage changes linearly from positive to negative in response to the input control voltage. In the fixed output inverter T1, in addition to the fixed output for the developing bias, a -12V power supply, a floating power supply voltage of 24V and 40V to the surface potential measurement circuit, and a -600V power supply voltage to the surface potential measurement circuit are obtained. There is. If these are constructed from ordinary regulators or the like, it will take up space, increase the number of parts, and the floating power supply in particular will become complicated. According to this configuration, the various power supply voltages described above can be obtained extremely efficiently. (Flowchart) The microcomputer CPU 2 contains first and second control programs for carrying out the above-described surface potential control method, and the program flowcharts are shown in FIGS. 6A to 6K. In the flowchart, DC is a digital value for controlling the primary charger, and similarly, AC and DB are digital values for controlling the AC static eliminator and developing bias, respectively. or,
DCSA, ACSA, DBSA are the digital values DC,
Shows the RAM area in CPU2 where AC and DB are saved. <Step SP0> When the reset signal RESET from CPU1 is input, all memory areas of RAM are cleared and
The input port of CPU2 is enabled for input.
The output port is set to an output enabled state. or
Initial set ACSA, DCSA, and DBSA. or,
The current flowing through the primary charger and AC static eliminator is OμA, and the developing bias voltage is also 0V. Then, check terminal P26 and if signal CS1 is “1”, step
Execute the first control program from SP1 to SP23,
If it is "0", the program jumps to SP24 and executes the second control program. (First control program) <Step SP1> Digital value corresponding to 160μA in area ACSA,
Make DCSA save the digital value corresponding to 350μA. <Step SP2> It is determined whether the AC static eliminator drive signal HVAC indicating that copying has started is "0" or "1", and if it is "0", the process advances to SP23, and if it is "1", the process advances to SP3. <SP3> Set port P25 of CPU2 again and output the sensor drive signal. Also, HVAC, and
LED24 indicating that HVDC is “1”,
Turn on LED25. <SP4> Determine the signal EPC of the changeover switch SW1 and determine whether to output a standard value to the primary charger and AC static eliminator, or a control value based on the detection output of the electrometer. <SP5> Based on the judgment in step SP4, the primary charger,
AC static eliminator with reference current or area ACSA, DCSA
Outputs the stored value within. Also, the developing bias is -
Output to 72V. <SP6> Each signal HVAC, HVDC, V _L CTP, V _D CTP,
υ _L Determine CTP and DBTP and proceed to each processing step. In the display subroutine, when the potential display mode or potential measurement mode is specified, LED1
The potential is displayed in 8 bits from 0 to 17. In the potential measurement mode and the potential display mode, the potential specified by the changeover switch SW1 is transferred to the accumulator in the CPU 2 and displayed on the LEDs 10 to 17. <SP7> When the bright area potential V _L detection signal V _L CTP is output, the light emitting diode LED 20 indicating it lights up.
At the same time, measure V _L and save the measurement results.
Then calculate (V _L −V _LO ) and save the calculated value. Next, the signal input to terminal P27 of CPU2
Judge CS2 and select coefficient α ₂ . Then α ₂ (V _L
−V _LO ), save it, and similarly calculate β ₂ (V _L −V _LO )
Calculate and save. When the above is completed, the light emitting diode LED20 is turned off and the process returns to SP4. <SP8> When the dark potential V _D detection signal V _D CTP is output, the light emitting diode LED 21 indicating it lights up.
Measure V _D and save the measurement results. <SP9> Check switch SW1 to determine whether potential control is enabled or not. If not, proceed to SP17. If there is, proceed to SP10. <SP10> Calculate (V _D −V _DO ), α ₁ (V _D −V _DO ), β ₁ (V _D −V _DO ), and calculate α ₁ (V _D −V _DO ), β ₁ (V _D − V _DO ) calculation results are saved. <SP11> Calculate α ₁ (V _D −V _DO ) + α ₂ (V _L −V _LO )=△DC′,
Add to the previous primary charger control current value DC. At this time, DC is 8 bits and △DC' is 16 bits, so we perform the calculation (DC x 8 + △DC') and get DC' (16 bits).
shall be. <SP12> Determine whether DC' is within the control range, and in the case of overflow, turn on the LED 12 indicating this and set DC' to a predetermined value. In the case of underflow, the LED 13 indicating this is turned on and DC' is set to a predetermined value. <SP13> Convert DC' (16 bits) to DC (8 bits),
Save to DCSA. <SP14> In order to find the AC static eliminator control current value AC' (16 bits), calculate β ₁ (V _D − V _DO ) + β ₂ (V _L − V _LO ).
Find AC' (16 bits) and add 8 to the previous control current value AC.
Add. <SP15> Determine whether AC' is within the control range. In the case of overflow, the LED 10 indicating this is turned on and AC' is set to a predetermined value. In the case of underflow, the LED 11 is turned on and AC' is set to a predetermined value. <SP16> Convert AC' (16 bits) to AC (8 bits),
Save to ACSA. <SP17> Find the difference between the dark potential V _D and the bright potential V _L , that is, the contrast CNT. If CNT is below 0V or
When the voltage is 396V or less, both LED14 and LED15 are turned on. LED when CNT is above 396V and below 498V
Only 14 is turned on. If CNT is 498V or higher, the LED will not light up. After the above is completed, the LED 21 is turned off. <SP18> When the standard bright area potential υ _L detection signal υ _L CTP is output, the light emitting diode LED22 lights up and υ _L is measured and saved. Determine whether υ _L is within the controllable range, and if υ _L is −474V or less and υ _L
If is 288V or higher, set the developing bias voltage DB to a predetermined value and save it in the area DBSA. When υ _L is within the controllable range, calculate (υ _L +120V) and save the calculation result to DBSA. When the above steps are completed, the light emitting diode is turned off. <SP19> When development starts, the development bias signal DBTP is output from CPU1, and the light emitting diode LED2
3 lights up. The presence or absence of developing bias control is determined by looking at the signal DBC of the changeover switch SW1, and if there is no control, the developing bias voltage is set to 0V. If controlled, the developing bias voltage DB found in SP18 is output. Thereafter, the display subroutine is executed until the signal DBTP becomes "0", and when it becomes "0", the light emitting diode LED 23 lights up. <SP20> When HVAC is “1” and HVDC is “0”, the rear rotation LSTR is in progress, so the LED indicates that HVDC is “1”.
25 is turned off and the AC is turned off without current flowing through the primary charger.
Apply a weak AC current (60μA) to the static eliminator. <SP21> Determine whether or not it is in potential measurement mode, and if it is not in potential measurement mode, turn off the potential sensor. The display subroutine is repeated until the post-rotation LSTR is completed. If HVDC becomes “1” during post-rotation, return to SP3. <SP22> When the HVAC becomes "0", copying is not in progress, so the LED 24 is turned off, the output of the primary charger and the AC static eliminator are turned off, and the developing bias voltage is set to 0V. <SP23> It is determined whether or not it is the potential measurement mode, and when it is the potential measurement mode, the potential sensor is driven and the measured value is displayed on the LEDs 10 to 17. (Second Control Program) Next, the second control program will be explained. <SP24> First, set the parameter to (10000000) and the address P, and at the same time set the control number N. In this case, if the parameter is halved seven times, it will finally become (00000001), so N is set to 7. In addition, the primary charger current and AC static eliminator current are set to intermediate values.
Set to 400μA and 200μA respectively. Also, set the developing bias voltage to 0V. <SP25 to SP29> are the same as SP2 to SP6 of the first control program. <SP30> When V _L CTP appears, measure and save the bright area potential. <SP31> Detects the presence or absence of potential control. If yes, proceed to SP32; if not, turn off the V _L LED at SP33. <SP32> Shift P set in SP24 to the right. Since P is "80", it can be expressed in binary as follows. 10000000 ↓ 01000000 <SP33> Since the bright area potential is greatly affected by the AC static eliminator output, V _L controls the AC charging current. Light potential
V _L is compared with the control target value V _LO , and when V _L > V _LO , [AC+P→AC] is performed, and when V _L < V _LO , [AC-P → AC] is performed. When V _L = V _LO , do not change AC. Then save the AC value in area ACSA and turn off the V _L LED. <SP34> When the dark potential detection signal V _D CTP is output, V _D
When the LED lights up, the dark potential V _D is detected and the value is saved in DCSA. <SP35> If potential control is present, proceed to SP36; if not, proceed to SP37. <SP36> Since the dark potential V _D is greatly affected by the primary charger output, V _D controls the primary charger current.
The dark potential V _D is compared with the control target value V _DO , and when V _D > V _DO , [DC-P → DC] is performed, and when V _D < V _DO , [DC + P → DC] is performed, and the output value is determined. Change DC. When V _D = V _DO , V _D is not changed. <SP37> Since control of both the bright area and dark area potentials has been completed once, the control number N is subtracted by 1. Repeat steps SP27 to SP36 until N becomes 0. At that time, step
Shift parameter P to the right with SP32. <SP38> Here, the difference between the measured values V _D and V _L , that is, the contrast, is calculated, and if the contrast is less than a predetermined value, the LED
lights up. Then turn off the V _D LED. In other words, if the value of P is expressed in binary, N=7 01000000 ↓ N=6 00100000 ↓ N=5 00010000 ↓ N=4 00001000 ↓ N=3 00000100 ↓ N=2 00000010 ↓ N=1 000 Changes to 00001. Therefore, by the above operation, this P can be converted to DC
and DC, AC values (digital
Hexadecimal) can be set between "00" and "FF" at 1-bit intervals. <SP39-SP44> This performs the same operation as SP18-23. The characteristics of the control by the second control program described above are that the amount by which the bright area potential V _L is measured and changed is
Even though only the AC static eliminator current is used, the effect of the change in the AC current is taken into account in the dark potential V _D that is subsequently measured, and it can be successfully converged. Of course, the influence of the bright area potential on the change in the primary charger current is also taken into account. Furthermore, since the operations required for control are shift, comparison, addition, and subtraction, microcomputer programming becomes extremely simple. Furthermore, if the photoreceptor is changed or the environment is changed, even if the charging characteristic coefficients α ₁ , α ₂ , β ₁ , β ₂ change, if the primary charger current is increased, the dark area potential increases monotonically, AC If the static eliminator current is increased, the bright area potential will continue to decrease monotonically, so
It has the feature that it can always be controlled to a value close to the target value regardless of changes in charging characteristics. As described above, according to the present invention, the electrostatic latent image forming means is operated based on control data, and an arithmetic expression having a coefficient according to the sensitivity of the photoreceptor is applied to the surface potential data detected in that state. calculation is performed to obtain correction data, and the data obtained by adding the correction data to the control data is used as new control data to operate the electrostatic latent image forming means. Surface potential control can be performed by selecting one of the methods of adding and subtracting decreasing data to the repeatedly detected surface potential detection value and operating the electrostatic latent image forming means based on the result. If the characteristics of the surface potential are known in advance, the surface potential can be stabilized in a short time by controlling the surface potential using the former method, and if the sensitivity has changed due to replacement of the photoconductor, etc., the former method can be used. By switching from this method to the latter method and controlling the surface potential, it becomes possible to always obtain a stable surface potential. In this example, the device is capable of simultaneous exposure and
Although an apparatus using electrophotography with a simultaneous static elimination method has been described, the present invention can be applied to any other electrostatic recording apparatus such as the Carlson process in which the surface potential on the recording medium affects the obtained visible image.

[Brief explanation of drawings]

FIG. 1a is a sectional view of a copying apparatus to which the present invention can be applied, FIG. 1b is a plan view of the vicinity of the blank exposure lamp, FIG. 2 is a characteristic diagram showing the surface potential of each part of the photosensitive drum, and FIG. Fig. 4 is a characteristic diagram showing changes in surface potential, Fig. 5 is a potential control unit circuit,
6A to 6J are diagrams showing program flowcharts stored in the CPU 2. FIG. In the figure, 47 is a photosensitive drum, 51 is a primary charger, 69 is an AC charger, 70 is a blank exposure lamp, 65 is a developing roller, 67 is a surface electrometer,
CPU1 is a microcomputer for sequence control, CPU2 is a microcomputer for potential control,
Q18 each indicates a D/A converter.

Claims (1)

[Scope of Claims] 1. An electrostatic latent image forming means for forming an electrostatic latent image on a photoreceptor, a developing means for developing the electrostatic latent image formed on the photoreceptor, and a surface potential of the photoreceptor. a detection means for detecting; a control means for setting operating conditions of the electrostatic latent image forming means by executing a potential control program based on the output of the detection means to bring the surface potential of the photoreceptor to a target potential; The control means operates the electrostatic latent image forming means based on the control data, and in this state, applies a coefficient according to the sensitivity of the photoconductor to the surface potential data detected by the detection means. Obtain correction data by performing calculations according to the prepared calculation formula,
data obtained by adding the correction data to the control data as new control data;
a first potential control program that stabilizes the surface potential by operating the electrostatic latent image forming means based on the new control data; and the detecting means that detects predetermined data that becomes smaller depending on the number of repetitions. A second potential control program is built-in for stabilizing the surface potential by adding and subtracting the surface potential data repeatedly detected by and operating the electrostatic latent image forming means based on the result. An input terminal for selecting one of the second programs is provided, and one of the first and second potential control programs is selected by determining the signal level of the input terminal, and the output value of the detection means is An image forming apparatus characterized by executing a potential control program selected for an image forming apparatus.