JPH0211933B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a memory access control method,
In particular, it relates to a memory access control method between a system storage shared by multiple processing devices and a local storage unique to the processing devices.

[Conventional technology]

A system in which system storage is shared by a plurality of processing devices is configured as shown in FIG. A system storage 1 is connected to processing devices 3, 4, and 5 via a common bus line 2, and among the processing devices, for example, processing device 4 has its own local storage. This processing device 4 stores a large number of microinstructions in the local storage, and stores the microinstructions that are insufficient in the local storage in the system storage.

When one of the processing devices 3, 4, and 5 accesses the shared system storage 1, the other processing devices of that processing device are forced to wait until the access to the system storage 1 of the processing device currently accessing is completed. Become.

As a measure to reduce this waiting time, for example, the processing device 4 is provided with a local storage 41, and the processing device 4 accesses the local storage 41 instead of accessing the system storage 1, thereby reducing the time occupied by the system storage 1. We are trying to Generally, the local storage 41 and system storage 1 in this case are the processing device 4.
are provided in a continuous address space.

If a continuous address space is set as shown in FIG. It is determined whether the request address is in part B by comparing the requested address with the monitored address C. If it is determined that the requested address is in part B, an access request is issued to the system storage 1 and the request is accepted. I'm waiting.

However, even when the processing device 4 accesses part B continuously for a long period of time, it is necessary to make the above judgment each time, and the time to access the system storage of the processing device 4 is delayed by the judgment time, which slows down the processing. This poses a problem in that the processing speed of the device 4 is affected and the time required for other devices to wait becomes longer.

For example, a program that is running while fetching instructions from local storage may cause the program counter to count up, jump instructions, etc.
Access to the access area of the system storage area may be started by operand access.

In the case of , the system storage will continue to be accessed one by one until the local storage area is fetched again by a jump instruction, so it will take time to compare with address C each time. The processing time for the period becomes extremely long.

Therefore, it is an object of the present invention to make it possible to eliminate the time required for comparing address C with the requested address from the actual operating time while the system storage continues to be accessed.

[Problem that the invention seeks to solve]

In order to solve the above-mentioned problems, the present invention includes a plurality of processing devices each having a dedicated local storage and a system storage shared by the plurality of processing devices. In a system configuration in which the system storage is assigned consecutive addresses, each of the processing units is made to memorize the boundary address between the local storage and the system storage, and whether the local storage is being accessed or the system storage is being accessed. A mode indicator indicating whether the local storage is being accessed is provided, and when the request address to be accessed is output in each of the processing units, if the mode indicator indicates that the local storage is being accessed, the request address is A local storage access mode in which the boundary address is compared and the one indicated by the comparison result is accessed between local storage and system storage, and when the mode indicator indicates that system storage is being accessed,
After accessing both system storage and local storage, the request address and the boundary address are compared, and access to one of the local storage and system storage indicated by the comparison result is enabled, and access to the other is disabled. system storage access mode, and when the access mode is switched,
The mode indicator is controlled to be rewritten.

[Effect]

When the above access request is in system storage access mode, the system storage access time is reduced by first requesting access to both system storage and local storage, and then comparing the size after this request. Therefore, the overall access processing time of the processing device can be shortened.

It is easy to switch between the system storage access mode and the local storage access mode using a program, and there is no particular problem. Therefore, a program that is running in local storage access mode while fetching instructions on the local storage by switching the mode can now access the system storage area by counting up the program counter, jumping instructions, etc. If started, the first instruction of the program in this system storage area
Switch to access mode.

Thereafter, commands on the system storage will be executed in the system storage access mode, and the time required for access can be shortened as described above.

System storage is accessed in local storage access mode only when fetching the instruction itself to switch to system storage access mode.

Next, this system storage access
mode while executing instructions on system storage.
When jumping to an address in the local storage area using a jump instruction or interrupt, the first instruction of the jump destination instruction switches to local storage access mode.

After this, local storage access will be performed again.
In this mode, instructions on local storage will be executed.

Local storage is accessed in system storage access mode only by instructions that switch to local storage access mode, and only in this case requests for system storage are wasted and cause overhead, but do not reduce the overall processing time. Compared to time, this is insignificant. The time reduction effect when executing instructions on the system storage in the system storage access mode is as effective as the number of instructions, and the above-mentioned overhead is only one instruction.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram of essential parts of an embodiment of the present invention.
FIG. 2 is a flowchart showing the operation of the present invention. The same numbers are used for the same parts throughout the figures. The processing device 6 includes a local storage 61, a processor section 62, an address comparison circuit 63, a register 64, and an access request control circuit 65.

The register 64 stores the boundary address C between part A and part B shown in FIG. 4, that is, the boundary address C between local storage and system storage. Mode setting register 65 in access request control circuit 65
1 is provided. This mode setting register 651
is provided to store a mode indicator indicating the current mode, and indicates whether the address currently being operated by the processor unit 62 is in local storage access mode or system storage access mode. A logical value indicating each mode is stored.

For example, the mode setting register 651 has a logical value '' in local storage access mode.
0', logical value '1' is stored in case of system storage access mode.

Processor section 62 outputs a storage access request and then outputs an address to be accessed. This address is input to access request control circuit 65 and address comparison circuit 63 via address bus line 621.

The access request control circuit 65 sends an access request to the system storage 1 and the local storage 61 when the mode setting register 651 is logic '1'.

After accessing both storages, the comparison circuit 63 compares the request address with the boundary address C of the register 64 and sends the result to the access request control circuit 65. Access request control circuit 6
5, if the requested address is greater than the boundary address C, access to the system storage 1 described above is enabled, and access to the local storage 61 is disabled.

Of course, the access request control circuit 65 disables the local storage access permission signal 652.

If the requested address is smaller than the boundary address C, access to the system storage 1 described above is disabled, an access permission signal is output, and access to the local storage 61 is enabled.

The access request circuit 65 is the mode setting register 6
51 is logic '0', the above-mentioned comparison circuit 63
Based on the comparison results, system storage 1,
Alternatively, it operates to access the local storage 61.

The above operation will be explained with reference to FIG. When a storage access request is output from the processor unit 62, the access request control circuit checks whether the mode setting register is '1'. The state is shown in FIG. 2 (1). Hereinafter, the states in FIG. 2 will be indicated by numbers in parentheses. If '1', requests access to system storage and local storage (2). After that, address comparison is performed (3), and if the requested address is greater than address C, system storage access is enabled and local storage access is disabled (4). If the requested address is smaller than address C in the address comparison, system storage access is disabled (5), local storage access is enabled (6), and the contents of the mode setting register 651 are rewritten to the logical value '0'.

If the mode setting register is '0' (1), address comparison is performed (7), and if the requested address is greater than address C, system storage is accessed (8), and the contents of the mode setting register 651 are set to a logical value ' Rewrite to 1'. If the address is smaller than C, local storage is accessed (9).

Therefore, when the mode setting register is '1', that is, in the system storage access mode, an access request is made without performing a comparison, reducing the access processing time by the comparison time.

〔Effect of the invention〕

As can be understood from the above explanation, in short, the present invention makes an access request to the system storage and local storage without performing a comparison when the system storage access mode is on, and the comparison time for performing an address comparison is This allows for faster access, which is effective in improving system processing speed.

[Brief explanation of drawings]

FIG. 1 is a block diagram of essential parts of an embodiment of the present invention.
FIG. 2 is a flow chart showing the operation of the present invention, FIG. 3 is a system configuration diagram, and FIG. 4 is a schematic diagram showing an address space. In the diagram, 1 is system storage, 3 and 4
, 5 and 6 are processing units, 41 and 61 are local storages, 63 is an address comparison circuit, 65 is an access request control circuit, and 651 is a mode setting register, respectively.

Claims (1)

[Scope of Claims] 1 A system comprising a plurality of processing devices each having a dedicated local storage and a system storage shared by the plurality of processing devices, wherein the local storage and the system storage are assigned consecutive addresses. In a system configuration in which each of the processing units stores a boundary address between the local storage and the system storage, and a mode indicator indicating whether the local storage is being accessed or the system storage is being accessed. and when the request address to be accessed is output in each of the processing units, if the mode indicator indicates that the local storage is being accessed, the request address is compared with the boundary address and the local storage is accessed. and system storage, whichever the comparison result indicates is accessed; and if the mode indicator indicates that system storage is being accessed, after accessing both system storage and local storage; , providing a system storage access mode for comparing the request address and the boundary address, validating access to one of local storage and system storage indicated by the comparison result, and invalidating access to the other; , when the access mode switches,
A memory access control method, characterized in that the mode indicator is controlled to be rewritten.