JPH02123795A - Multilayer circuit substrate - Google Patents
Multilayer circuit substrateInfo
- Publication number
- JPH02123795A JPH02123795A JP63278392A JP27839288A JPH02123795A JP H02123795 A JPH02123795 A JP H02123795A JP 63278392 A JP63278392 A JP 63278392A JP 27839288 A JP27839288 A JP 27839288A JP H02123795 A JPH02123795 A JP H02123795A
- Authority
- JP
- Japan
- Prior art keywords
- coaxial line
- multilayer circuit
- circuit board
- conductor
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structure Of Printed Boards (AREA)
- Waveguides (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔概要〕
高速信号を伝送する同軸線路を埋設する多層回路基板の
構造に関し、
信号の漏話をできるだけ少なくすることを目的とし、
円筒形の外部導体の中心に絶縁体を介し中心導体を配設
した同軸線路を埋設し、該同軸線路を挟むように表裏面
にアース層を形成し多層に積層された絶縁性基板からな
り、前記同軸線路の外部導体と前記アース層とを接続す
るように構成する。[Detailed Description of the Invention] [Summary] Regarding the structure of a multilayer circuit board in which a coaxial line for transmitting high-speed signals is embedded, an insulator is placed in the center of a cylindrical outer conductor with the aim of minimizing signal crosstalk. A coaxial line with a central conductor arranged therein is buried, and a ground layer is formed on the front and back surfaces so as to sandwich the coaxial line, and an insulating substrate is laminated in multiple layers. Configure to connect.
(産業上の利用分野〕
本発明は高速信号を伝送する同軸線路を埋設する多層回
路基板とその製造方法に関する。(Field of Industrial Application) The present invention relates to a multilayer circuit board in which a coaxial line for transmitting high-speed signals is buried, and a method for manufacturing the same.
通信装置において、Gllz以上の高周波帯域を扱う多
層回路基板は高速信号を伝送する線路は信号線(ストリ
ップ線)、に絶縁層を介し平行に近接してアース層を沿
わせたマイクロストリップ線路やトリプレートストリッ
プ線路に形成してインピーダンスの整合をとり、信号の
漏話を極力防止する必要がある。そのため、信号の漏話
の少ない良好な伝送特性を有する多層回路基板が要望さ
れている。In communication equipment, multilayer circuit boards that handle high-frequency bands of Gllz or higher are used to transmit high-speed signals using signal lines (strip lines), microstrip lines or strip lines in which a ground layer is placed parallel to the signal line (strip line) through an insulating layer. It is necessary to form a plate strip line to match impedance and prevent signal crosstalk as much as possible. Therefore, there is a demand for a multilayer circuit board that has good transmission characteristics with less signal crosstalk.
従来の高速信号を伝送する線路は、第4図(alの模式
図に示すようなストリップ線(信号線路)12を絶縁層
13を介し上、下のアース層14bで挟んだトリプレー
トストリップ線路と呼ばれる構造をなしている。A conventional line for transmitting high-speed signals is a triplate strip line in which a strip line (signal line) 12 is sandwiched between upper and lower ground layers 14b with an insulating layer 13 in between, as shown in the schematic diagram in Figure 4 (al). It has a structure called
トリプレートストリップ線路の伝送特性は、上下のアー
ス層14b以外に絶縁層13、即ち、絶縁性基板の左右
両端に形成したストリップ線12を囲む(挟むアース層
14にも影響され、絶縁性基板13の幅Wが大小に異な
る第4図(b)と第4図(c)の場合を実験的に比較す
ると、GHz以上の高周波帯域を扱う場合、信号の漏話
を少なくする観点からみて幅Wの小さい第4図(C)の
方がインピーダンスの整合がとり易く基板内での空洞共
振を抑えて良好な伝送特性を示す。In addition to the upper and lower ground layers 14b, the transmission characteristics of the triplate strip line are also influenced by the insulating layer 13, that is, the ground layer 14 that surrounds the strip wire 12 formed at both left and right ends of the insulating substrate. An experimental comparison of the cases of Fig. 4(b) and Fig. 4(c) in which the width W of The smaller the size shown in FIG. 4(C), the easier it is to match the impedance, suppressing cavity resonance within the substrate, and exhibiting good transmission characteristics.
この第4図(C1の模式図の実際の構造をなす多層回路
基板11は、第5図(a)、 (b)の要部側断面図お
よび斜視図に示すように複数の絶縁性基板13の間に配
線パターン14(部品を搭載実装するランド14aおよ
びアース層14aを含む)を形成し、それらの配線パタ
ーン14をピアホール14cで接続するとともに、高速
信号を伝送するストリップ線12を囲むように多数のピ
アホール14cを間隔Wに並列させ上下のアース層14
bと接続して方形に囲んでいる。The multilayer circuit board 11 having the actual structure of the schematic diagram in FIG. A wiring pattern 14 (including a land 14a for mounting and mounting components and a ground layer 14a) is formed between them, and these wiring patterns 14 are connected by a peer hole 14c, and the strip line 12 for transmitting high-speed signals is surrounded. A large number of pier holes 14c are arranged in parallel at intervals W to form the upper and lower earth layers 14.
It is connected to b and surrounded by a square.
しかしながら、このような上記同軸線路構造によれば、
ピアホールで形成したアース層では断続的なシールドと
なるため、十分な電磁シールドが得られず、漏話が少な
い良好な伝送特性を得ることが難しいといった問題があ
った。However, according to the above-mentioned coaxial line structure,
Since the ground layer formed by the peer hole provides intermittent shielding, it is difficult to obtain sufficient electromagnetic shielding and it is difficult to obtain good transmission characteristics with little crosstalk.
上記問題点に鑑み、本発明は信号の漏話をできるだけ少
なくすることのできる多層回路基板を提供することを目
的とする。In view of the above problems, an object of the present invention is to provide a multilayer circuit board that can reduce signal crosstalk as much as possible.
上記目的を達成するために、本発明の多層回路基板にお
いては、多層に積層された絶縁性基板に同軸線路を埋設
し、該同軸線路を挟むように表裏面にアース層を形成し
、同軸線路の外部導体とアース層とを接続するように構
成する。In order to achieve the above object, in the multilayer circuit board of the present invention, a coaxial line is buried in an insulating substrate laminated in multiple layers, and ground layers are formed on the front and back surfaces so as to sandwich the coaxial line. The outer conductor of the ground layer is connected to the ground layer.
信号線路(ストリップライン)を同軸線路に形成し、こ
の同軸線路を多層回路基板に埋設し、同軸線路を挟むよ
うに表裏面にアース層を形成し、同軸線路の外部導体と
アース層とを接続することにより、電磁シールドされた
信号線路を有する多層回路基板が得られ、多層回路基板
内における信号の漏話を少なくすることができる。A signal line (strip line) is formed into a coaxial line, this coaxial line is buried in a multilayer circuit board, a ground layer is formed on the front and back sides of the coaxial line, and the outer conductor of the coaxial line and the ground layer are connected. By doing so, a multilayer circuit board having electromagnetically shielded signal lines can be obtained, and signal crosstalk within the multilayer circuit board can be reduced.
以下図面に示した実施例に基づいて本発明の要旨を詳細
に説明する。The gist of the present invention will be explained in detail below based on embodiments shown in the drawings.
第1図(a)、 fb)の斜視図および側断面図に示す
ように、多層回路基板は両外層に部品を搭載実装するラ
ンド4aおよび後述する同軸線路2を上下に挟むアース
層4bを含む配線パターン4と、各内層に配線パターン
4と、回路に応じて各内層の配線パターン4を適宜に接
続するピアホール4Cとを形成して多層に積層された絶
縁性基板3と、円筒形の外部導体2bの軸心に中心導体
(信号線路)2aを絶縁体2cを介し配設した同軸線路
2とから構成される。As shown in the perspective view and side sectional view of FIGS. 1(a) and fb), the multilayer circuit board includes lands 4a on which components are mounted and mounted on both outer layers, and a ground layer 4b that sandwiches a coaxial line 2 (described later) above and below. An insulating substrate 3 laminated in multiple layers with wiring patterns 4, wiring patterns 4 on each inner layer, and pier holes 4C for appropriately connecting the wiring patterns 4 on each inner layer depending on the circuit, and a cylindrical outer layer. It is composed of a coaxial line 2 in which a center conductor (signal line) 2a is disposed at the axis of a conductor 2b via an insulator 2c.
同軸線路2は絶縁性基板3に設けた埋め込み穴3aに埋
設し、同軸線路2の外部導体2bと両外層に形成したア
ース層4bとはピアホール4Cで(または直接に)接続
される。なお、同軸線路2は絶縁性基板3および配線パ
ターン4と同一組成の絶縁材および導体材料を用いて形
成し、加熱時の熱歪みの発生を防止する。The coaxial line 2 is buried in a buried hole 3a provided in an insulating substrate 3, and the outer conductor 2b of the coaxial line 2 and the ground layer 4b formed on both outer layers are connected (or directly) through a peer hole 4C. Note that the coaxial line 2 is formed using an insulating material and a conductive material having the same composition as the insulating substrate 3 and the wiring pattern 4 to prevent thermal distortion from occurring during heating.
つぎに、第2図の製造工程を示す斜視図を用いて同軸線
路2の製造方法を説明する。即ち、第2図(alの巻取
り法では、
■ステップ:絶縁体2cとなるセラミックグリーンシー
ト2c’ の端部に中心導体2aとなる導体ペースト
(例えば、銅ペースト)2a’を印刷する。Next, a method for manufacturing the coaxial line 2 will be described using a perspective view showing the manufacturing process in FIG. That is, as shown in FIG.
(e.g. copper paste) 2a'.
■ステップ:これを巻回し乾燥する。巻径は多層回路基
板の厚さより少なくとも小さ(する。■Step: Roll it up and dry it. The winding diameter is at least smaller than the thickness of the multilayer circuit board.
■ステップ:外周面に外部導体2bとなる導体ペースト
2b’ を塗布し乾燥する。■Step: Apply a conductor paste 2b' that will become the outer conductor 2b to the outer peripheral surface and dry it.
第2図(blの抜型・貼合わせ法では、■ステップ:断
面半円のかまぼこ形くぼみ2個を備える抜型5に絶縁体
2cとなるセラミック絶縁ペースト2c”をそれぞれ流
し込み乾燥させた後、片方の中心に中心導体2aとなる
導体ペースHa’ を印刷し乾燥する。Figure 2 (bl) cutting die/bonding method: ■Step: Ceramic insulation paste 2c'' which will become the insulator 2c is poured into the cutting die 5 having two semicircular semicircular hollows in cross section and dried. A conductor paste Ha' which will become the center conductor 2a is printed at the center and dried.
■ステップ:抜型5から抜き出し、双方を合わせて圧着
する。■Step: Pull out from the cutting die 5 and press both together.
■ステップ:外周面に外部導体2bとなる導体ペース)
2b’を塗布し乾燥する。■Step: Conductor paste that becomes external conductor 2b on the outer circumferential surface)
2b' is applied and dried.
第2図(C)の抜型法では、
■ステップ:抜型6の円筒穴の軸心に心棒7を立て、絶
縁体2cとなるセラミック絶縁ペースト20″を流し込
み乾燥させる。In the cutting method shown in FIG. 2(C), Step 1: The mandrel 7 is erected on the axis of the cylindrical hole of the cutting die 6, and the ceramic insulating paste 20'' serving as the insulator 2c is poured in and dried.
■ステップ:心棒7を抜き取り、その後に中心導体2a
となる導体ペース)2a’ を充填する。■Step: Remove the mandrel 7, then the center conductor 2a
The conductor paste 2a' is filled.
■ステップ;抜型6から抜き出し、外周面に外部導体2
bとなる導体ペースト2b’ を塗布し乾燥する。■Step: Cut out from the cutting die 6, and put the outer conductor 2 on the outer circumferential surface.
A conductive paste 2b', which becomes b, is applied and dried.
つぎに、第3図の側断面図により、この同軸線路2を用
いた多層回路基板の製造方法を説明する。Next, a method of manufacturing a multilayer circuit board using this coaxial line 2 will be explained with reference to the side sectional view of FIG.
■ステップ:多層回路基板の絶縁性基板3を形成する各
セラミックグリーンシート3゛(図は6枚を示す)に位
置合わせ穴(図示路)、ピアホール4Cおよび同軸線路
2の埋め込み穴3aをパンチング加工により開ける。埋
め込み穴3aを大きさはその積層位置における同軸線路
2の外形寸法に合わせた寸法とする。■Step: Punching alignment holes (path shown), pier holes 4C, and embedded holes 3a for the coaxial line 2 on each ceramic green sheet 3 (the figure shows 6 sheets) forming the insulating substrate 3 of the multilayer circuit board. Open by. The size of the embedded hole 3a is made to match the outer dimensions of the coaxial line 2 at the stacked position.
■ステップ:各セラミックグリーンシート3゛のピアホ
ール4Cに導体ペースト4c゛(例えば、銅ペースト)
を充填し、さらに表面に所定の配線パターン4を形成す
る導体ペースト4゛をスクリーン印刷し乾燥する。■Step: Conductive paste 4C (for example, copper paste) in the peer hole 4C of each ceramic green sheet 3C
A conductive paste 4' is screen printed to form a predetermined wiring pattern 4 on the surface and dried.
■ステップー同軸線路2を埋め込むように挾みながら各
セラミックグリーンシート3゛を積層する。■Step - Layer each ceramic green sheet 3'' while sandwiching the coaxial line 2 so as to embed it.
■ステップ:積層したセラミックグリーンシート3゛を
900℃〜1000℃の温度の還元性雰囲気中で加熱、
圧着して焼成する。■Step: Heating the laminated ceramic green sheets 3゛ in a reducing atmosphere at a temperature of 900℃ to 1000℃,
Press and bake.
■ステップ二表裏面の外層配線パターン4 (部品を実
装するランド4aおよびアース層4bを含む)を形成す
る導体ペースト4゛(銅ペースト)をスクリーン印刷し
乾燥した後、750℃〜900℃の温度の還元性雰囲気
中で加熱、圧着焼成する。■Step 2 After screen printing and drying the conductive paste 4゛ (copper paste) that forms the outer layer wiring pattern 4 on the front and back sides (including the land 4a on which components are mounted and the ground layer 4b), the temperature is set at 750°C to 900°C. Heating, pressing and firing in a reducing atmosphere.
以上により、同軸線路2を埋設した多層回路基板を製造
することができる。Through the above steps, a multilayer circuit board in which the coaxial line 2 is embedded can be manufactured.
このように、信号線路と円筒形の外部導体とを同軸構造
に形成した同軸線路は、従来の信号線路で囲んだ不連続
なピアホールに比べて導体が連続し、かつ形状が一定し
ているため、信号の漏話が極めて少なくなり常に一定の
伝送特性を有する高速信号線路を形成することができる
。In this way, a coaxial line in which a signal line and a cylindrical outer conductor are formed into a coaxial structure has a continuous conductor and a constant shape compared to a conventional discontinuous pier hole surrounded by a signal line. , it is possible to form a high-speed signal line with extremely low signal crosstalk and always having constant transmission characteristics.
また、同軸線路は上記した巻取り法や抜型・貼合わせ法
や抜型法などにより、予め単体で形状−定に容易に製作
することができる。Further, the coaxial line can be easily manufactured in advance in a single piece in a fixed shape by the above-mentioned winding method, die-cutting/bonding method, die-cutting method, or the like.
また、同軸線路を絶縁性基板および配線パターンと同一
または熱収縮率がほぼ等しい組成の絶縁材および導体材
料を用いて形成することにより、熱収縮率が実質等しく
なり基板の加熱、圧着焼成時の熱歪みをなくすことがで
きる。In addition, by forming the coaxial line using an insulating material and a conductive material that have the same composition or almost the same thermal shrinkage rate as the insulating substrate and wiring pattern, the thermal shrinkage rate becomes substantially the same, so that when the substrate is heated, pressed, and baked, Heat distortion can be eliminated.
以上、詳述したように本発明によれば、同軸線路を有す
る多層回路基板により、漏話の極めて少ない高速信号の
伝送特性の向上を図ることができるといった実用上極め
て有用な効果を発揮する。As described in detail above, according to the present invention, a multilayer circuit board having a coaxial line exhibits an extremely useful effect in practice, such as being able to improve the transmission characteristics of high-speed signals with extremely low crosstalk.
第1図(al、 (b)は本発明による一実施例の斜視
図および側断面図、
第2図は第1図の同軸線路の製造工程を示す斜視図、
第3図は第2図を用いた第1図の製造工程を示す側断面
図、
第4図(a)、 (bl、 (C)はストリップ線路を
示す説明する模式図、
第5図(a)、 (telは従来技術による斜視図およ
び側断面図である。
図において、
1は多層回路基板、
2は同軸線路、
2aは中心導体(信号線路)、
2bは外部導体、
2cは絶縁体、
3は絶縁性基板、
4は配線パターン、
4bはアース層を示す。1(al) and (b) are a perspective view and a side sectional view of one embodiment of the present invention, FIG. 2 is a perspective view showing the manufacturing process of the coaxial line of FIG. 1, and FIG. 3 is a view similar to that of FIG. 4(a), (bl), (C) are schematic diagrams showing strip lines, and FIG. 5(a), (tel is based on conventional technology. They are a perspective view and a side sectional view. In the figures, 1 is a multilayer circuit board, 2 is a coaxial line, 2a is a center conductor (signal line), 2b is an outer conductor, 2c is an insulator, 3 is an insulating substrate, and 4 is a In the wiring pattern, 4b indicates the ground layer.
Claims (1)
介し中心導体(2a)を配設した同軸線路(2)を埋設
し、該同軸線路(2)を挟むように表裏面にアース層(
4b)を形成し多層に積層された絶縁性基板(3)から
なり、前記同軸線路(2)の外部導体(2b)と前記ア
ース層(4b)とを接続してなることを特徴とする多層
回路基板。A coaxial line (2) with a center conductor (2a) arranged through an insulator (2c) is buried in the center of a cylindrical outer conductor (2b), and ground is placed on the front and back sides so as to sandwich the coaxial line (2). layer(
4b) and is formed of an insulating substrate (3) laminated in multiple layers, and is characterized in that the outer conductor (2b) of the coaxial line (2) and the ground layer (4b) are connected. circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63278392A JPH02123795A (en) | 1988-11-01 | 1988-11-01 | Multilayer circuit substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63278392A JPH02123795A (en) | 1988-11-01 | 1988-11-01 | Multilayer circuit substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02123795A true JPH02123795A (en) | 1990-05-11 |
Family
ID=17596704
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63278392A Pending JPH02123795A (en) | 1988-11-01 | 1988-11-01 | Multilayer circuit substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02123795A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09116310A (en) * | 1995-10-17 | 1997-05-02 | Nippon Telegr & Teleph Corp <Ntt> | Multi-input multi-output switch circuit |
| JP2015198153A (en) * | 2014-04-01 | 2015-11-09 | 日本特殊陶業株式会社 | Wiring board and manufacturing method thereof |
-
1988
- 1988-11-01 JP JP63278392A patent/JPH02123795A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09116310A (en) * | 1995-10-17 | 1997-05-02 | Nippon Telegr & Teleph Corp <Ntt> | Multi-input multi-output switch circuit |
| JP2015198153A (en) * | 2014-04-01 | 2015-11-09 | 日本特殊陶業株式会社 | Wiring board and manufacturing method thereof |
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