JPH0212527A - Microprogram controller - Google Patents

Abstract

PURPOSE:To efficiently perform control by running plural independent microprograms simultaneously in time division. CONSTITUTION:The execution sequence control of a microinstruction in a first microprogram is performed by an address register 1, and the control in a second microprogram is performed by an address register 2. The microinstructions of the first and second microprograms designated by the address registers 1 and 2 according to the control of a microinstruction cycle control circuit 4 are read out alternately from a control memory circuit 3, and are executed at a microprogram execution control circuit 5. Thus, the first and second microprograms are executed independently, and furthermore, it is possible to freely make access to the control memory circuit 3, a universal register in the microinstruction execution control circuit 5, and hardware in an external memory controller. In such a way, the control of the microprogram can be performed efficiently.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microprogram control device, and more particularly to a microprogram control device that controls one device using a plurality of sets of microprograms.

In recent years, the development of computer systems has been remarkable, and there is a particularly strong demand for higher functionality and performance. In order to meet these needs, microprogram control technology has been developed, and many devices constituting computer systems are now controlled by microprograms.

However, the demand for higher functionality and performance is 1.
Devices that can be controlled by multiple sets of microprograms are appearing, exceeding the limit that can be controlled by one set of microprograms.

These devices use multiple microprocessors to implement multiple sets of microprogram control. In such a case, it is difficult to closely interface each processor, and therefore, there is a drawback that high-performance and fine-grained control cannot be performed.

Purpose of the Invention Therefore, the present invention was made to solve the drawbacks of the conventional ones, and its purpose is to make it possible to tightly connect multiple sets of independent microprograms. The object of the present invention is to provide a microprogram control device that enables efficient microprogram control.

A microprogram control device according to the basic invention includes: control storage means for storing a plurality of sets of microprograms that operate independently of each other; address generation means for generating addresses for reading each set of the microprograms; It is characterized in that it includes a control means for sequentially controlling the execution of each set of microprograms successively executed based on these addresses in a time-sharing manner.

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram showing in block form one embodiment of an external storage control device incorporating a microprogram control device 20 of the present invention.

Referring to FIG. 1, the microprogram control bag 'y:t20 of the present invention includes a first microinstruction address register 1 that controls the execution address of the first microprogram.
．． 2. Second microinstruction address register that controls the execution address of the second microprogram. Control storage circuit 3 for storing the first microprogram and the second microprogram. The microinstruction cycle control circuit 4 determines the execution cycle of the first microprogram and the second microprogram, and the first microinstruction cycle read from the control storage circuit 3
It is comprised of a microinstruction execution control circuit 5 that decodes the microprogram and the second microprogram and controls its execution.

The external storage control device incorporating the microprogram control device 20 of the present invention has a first interface circuit 6 that connects the external storage control device to a host device (not shown), and is connected through the first interface circuit 6. a first data transfer control circuit 1lI87 for controlling data transfer between the host device and the buffer memory port R8; a buffer memory circuit 8 for storing data written to the external storage device and data read from the external storage device; A second data transfer control circuit 10 that controls data transfer between this buffer storage circuit 8 and an external storage device connected through a second interface circuit 8@9. and a second interface circuit 9 for connecting the external storage control device and the external storage device.
It consists of

The microprogram control device 20 of the present invention is incorporated into an external storage control device including a host device and a buffer storage port! 88 and the data transfer between the buffer storage circuit 8 and the external storage device are executed independently and asynchronously, and the data transfer between the first microprogram and the first microprogram stored in the control storage circuit 3 is performed independently and asynchronously. It is controlled by 2 microprograms.

FIGS. 2A and 2B show parts of two microprograms in an embodiment of the present invention. 1st
The microprogram controls data transfer between the host device and the buffer storage circuit 8, and includes microinstructions Al, . . . , microinstructions A6. The second microprogram controls data transfer between the buffer storage circuit 8 and the external storage device, and includes microinstructions B1, . . . , microinstructions B6.

Figure 3 is a time chart showing the execution status of two microprograms in one embodiment of the present invention! ) 9 In one embodiment of the present invention, the first microprogram and the second microprogram are assumed to be executed alternately for the sake of simplicity; Depending on performance, for example, the microinstructions in the first microprogram and the second microprogram may be executed at a ratio of 1:2.

Referring to FIG. 1, the execution order control of microinstructions in the first microprogram is performed by the first microprogram instruction address register 1, and the execution order of microinstructions in the second microprogram is controlled by the microinstruction address register 2. Implemented by 2. Under the control of the microinstruction cycle control circuit 4, the microinstructions of the first microprogram and the second microprogram designated by the first and second microinstruction address registers 1 and 2 are alternately stored from the control storage circuit 3. The data is read out and executed by the microprogram execution control circuit 5.

The first microprogram and the second microprogram are executed completely independently, but the first microprogram and the second microprogram are executed by the control storage circuit 3 and the microinstruction execution control circuit 5 (not shown in FIG. 1). It is possible to freely access the general-purpose registers present in the microprogram, as well as the hardware in the external storage controller, so that information can be easily exchanged between the two microprograms.

As explained above, according to the present invention, a plurality of independent microprograms can be run simultaneously in a time-sharing manner in one microprogram control device. This has the effect of making it possible to tighten the connections between the two, thus enabling efficient control.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing a part of microinstructions of a microprogram used in the embodiment of the present invention, and FIG. 3 is a diagram of the first and second microprograms. It is a time chart showing an execution state. Explanation of symbols of main parts 1.2... Address register 3... Control storage circuit

Claims (1)

[Claims] (1) control storage means for storing a plurality of sets of microprograms that operate independently of each other; address generation means for generating addresses for reading each set of the microprograms; A microprogram control device comprising: control means for sequentially controlling the execution of each set in a time-sharing manner.