JPH02129943A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain the characteristics of a transistor and the corresponding gate length of the transistor having the characteristics by a method wherein a monitor composite pattern formed by unifying a monitor transistor pattern and a monitor resistor pattern is provided on a wafer surface. CONSTITUTION:A monitor composite pattern 1 formed by unifying a monitor transistor pattern for obtaining the characteristics of a transistor and a monitor resistor pattern for obtaining the gate length of the transistor electrically is provided on a wafer surface. As a source 1b and a drain 1c are provided in the monitor composite pattern 1, the characteristics of the transistor can be measured by using a gate 1a, the source 1b and the drain 1c. With this constitution, the characteristics of the transistor and the corresponding gate length of the transistor having that characteristics can be obtained.

Description

[Detailed Description of the Invention] [Summary] Regarding the improvement of monitor patterns used for process control of wafer processes and management of transistor characteristics, it is possible to determine the characteristics of a transistor and the gate length of a transistor having these characteristics in correspondence. A monitor transistor pattern used to determine the characteristics of a transistor and a monitor used to electrically determine the gate length of a transistor in a wafer process of a semiconductor device manufacturing process. A monitor composite pattern integrated with a resistor pattern is formed on the wafer surface.

[Industrial application field]

The present invention relates to a method of manufacturing a semiconductor device, and in particular to improvement of a monitor pattern used for managing wafer process steps and transistor characteristics.

2. Description of the Related Art As semiconductor devices become more highly integrated, pattern sizes are becoming smaller in wafer processes for manufacturing semiconductor devices, and higher reliability of patterns is required.

In response to this demand, in order to manage the manufacturing process and transistor characteristics, a monitor pattern is provided on the element forming area or scribe line on the wafer surface, and this pattern is electrically measured using an automatic measuring instrument. I am getting a lot of accurate information.

However, with conventional monitor patterns, it is impossible to determine the transistor characteristics and the gate length of this transistor at the same position.

Under the circumstances described above, there is a need for a method of manufacturing a semiconductor device in which the transistor characteristics and the gate length of the transistor can be determined at the same location.

[Conventional technology]

A conventional method for manufacturing a semiconductor device will be explained with reference to FIGS. 2 and 3.

There are two types of monitor patterns used in the conventional manufacturing process of semiconductor devices, one of which is a monitor transistor pattern shown in FIG. 2, and the other one is a monitor resistance pattern shown in FIG. 3.

FIG. 2 shows a monitor transistor pattern 2 of a MOS transistor, in which 2a is the gate 2b is the source, 2c is the drain, and the gate electrode 12 is drawn out from each region.
Transistor characteristics are measured using a, source electrode 12b, and drain electrode 12c.

FIG. 3(a) is a diagram illustrating a method for determining sheet resistance using the four-terminal method. Each pad number of this sheet resistance pattern 3 is set as shown in the figure, and the voltage between pad m and pad n is ■1. and the current between pad m and pad n is expressed as 0.7, R+=Vg, +/11.
4R,=V z/I+.4, the sheet resistance Rs of this sheet resistance pattern can be obtained from the following equation.

Rs” (7C/ 1n2) ・((R+ + Ri)/2)
・In the monitor resistance pattern 4 as shown in f(R+/Rz) (therefore, in Figure 3), the sheet resistance R3 of this pattern and the current value ■ of the constant current flowing between pad G and pad J are , pad H and pad of monitor resistance pattern 4! Since the length l between pad H and band I is known, when measuring the voltage ■ between pad H and band I, the width W of monitor resistance pattern 4 is found from W = (R3xJ)/(V/T). becomes possible.

[Problem to be solved by the invention]

In the conventional semiconductor device manufacturing method described above,
If a monitor transistor pattern is provided in the wafer, transistor characteristics can be determined, but l.
It is not possible to obtain the absolute value of the gate length, which is closely related to transistor characteristics, and must be measured using a SEM or the like.

Conversely, if a monitor resistance pattern is provided within the wafer, it is possible to obtain the absolute value of the gate length of the transistor, but there is a problem in that it is not possible to determine the characteristics of the transistor with this gate length. was there.

SUMMARY OF THE INVENTION In view of the above-mentioned circumstances, it is an object of the present invention to provide a method for manufacturing a semiconductor device that allows the characteristics of a transistor and the gate length of a transistor having these characteristics to be determined in correspondence.

[Means to solve the problem]

The semiconductor device manufacturing method of the present invention includes a monitor transistor pattern used to determine the characteristics of a transistor and a monitor resistance pattern used to electrically determine the gate length of the transistor in the wafer process of the semiconductor device manufacturing process. An integrated monitor composite pattern is configured to be formed on the wafer surface.

[Effect]

That is, in the present invention, a monitor composite pattern is provided on the wafer surface, which integrates a monitor transistor pattern used to determine the characteristics of the transistor and a monitor resistance pattern used to electrically determine the gate length of the transistor. Source of transistor pattern for monitor composite pattern.

It becomes possible to determine the characteristics of a transistor using each of the drain and gate electrodes, and to correspondingly determine the gate length of a transistor having these characteristics using a monitor resistance pattern.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 3.

FIG. 1 shows a monitor composite pattern 1 that integrates a monitor transistor pattern and a monitor resistance pattern. In this monitor composite pattern 1, as shown in the figure, the gate 1a of the monitor transistor pattern and the gate length of the monitor resistance pattern are It matches what you are looking for.

Since this monitor composite pattern 1 is provided with a source 1b and a drain IC, the characteristics of the transistor can be measured using the gate 1a, this source 1b, and the drain IC.

On the other hand, the sheet resistance R8 of this monitor composite pattern 1 obtained by the method explained in FIG. 3(a), pad A and pad D
Since the current value I of the constant current flowing between pads B and C of the monitor composite pattern 1 is known, the length between pad B and pad C is known. When the voltage V is measured, the width W of the monitor composite pattern 1 can be determined from W=(RsXL)/(V/I).

By providing such a monitor composite pattern 1 and performing measurements using this monitor composite pattern 1, it becomes possible to determine the transistor characteristics and the gate length of this transistor in correspondence at the same position.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, a monitor composite pattern that integrates a monitor transistor pattern and a monitor resistance pattern used to electrically determine the gate length of a transistor is formed on a wafer surface. This has the advantage that the characteristics of a transistor and the gate length of a transistor having these characteristics can be found in correspondence, making it possible to provide a method for manufacturing a semiconductor device that can be expected to significantly improve reliability. .

[Brief explanation of drawings]

FIG. 1 is a diagram showing a monitor composite pattern that integrates a monitor transistor pattern and a monitor resistor pattern according to an embodiment of the present invention, FIG. 2 is a diagram showing a conventional monitor transistor pattern, and FIG. 3 is a diagram showing a conventional monitor pattern. FIG. 3 is a diagram showing a resistance pattern. In the figure, 1 is a monitor composite pattern, 1a is a gate, 1b is a source, and lc is a drain. fal Plan view+'bl E-E sectional view Figure 1 (al Plan view fbl F sectional view Book diagram showing a conventional monitor transistor transistor (al Diagram tb explaining the method for determining one-tooth resistance using the four-terminal method)
+ Monitor resistance pattern Diagram showing the conventional monitor resistance pattern

Claims (1)

[Claims] In the wafer process of semiconductor device manufacturing, a monitor composite pattern that integrates a monitor transistor pattern used to determine transistor characteristics and a monitor resistance pattern used to electrically determine the gate length of the transistor is placed on the wafer surface. 1. A method of manufacturing a semiconductor device, the method comprising: forming a semiconductor device on a semiconductor device;