JPH0213190A - Stationary display control circuit for muse decoder - Google Patents

Abstract

PURPOSE:To display a still picture with high quality attended without any flicker even if any movement exists between fields by storing a pattern with a newest one field outputted from an in-field interpolation circuit of a movement area processing system into a memory and reading it periodically. CONSTITUTION:The title circuit is provided with a memory used as a memory for a temporary except the stationary display period and reading out and outputting the pattern of the newest field for each field stored just before the stationary display in the stationary display period and a means commanding adaptive synthesis sections 17, 25 synthesizing a luminance signal and a chrominance signal by only the output of a moving area processing system. The pattern of the newest field outputted from the in-field interpolation circuit 15 is stored in the memory and read out periodically so as to display a still picture with high picture quality without any flicker even if any movement exists between fields.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a static display control circuit for a MUSE decoder installed in a MUSE television receiver.

(Prior technology) Currently, MUSE (Multiple
Tiple Sub-nyquist Sample
Experiments have begun on television broadcasting using the encoding encoding method.

In this MUSE method, a baseband signal including a luminance signal with a bandwidth of 22 Mllz and a chrominance signal with a bandwidth of 7 Mtlz is frequency modulated, and this is modulated into a baseband signal with a bandwidth of 27 Mtlz for satellite broadcasting.
In order to transmit using one MHz channel, the baseband signal has approximately 8 Mt! The band is compressed to z. This band compression is performed by spacing out the complete sampled school of fish extracted from the original video signal according to a predetermined rule. When thinning out the sampling points, inter-field offset sampling is performed using the physiological characteristic of the viewer that the resolution in the diagonal direction on the screen is lower than in the vertical and horizontal directions. In addition, the physiological characteristic of viewers is used that they do not perceive a significant deterioration in image quality even if the resolution decreases to some extent in moving areas.

In the decoder on the receiving side, the sampling points thinned out by the encoder on the transmitting side are reproduced based on the sampled fish schools before and after they were actually sent and received, and inserted into the missing points. This process of reproducing and inserting missing sampling points is called interpolation process. This interpolation process includes intra-field interpolation using adjacent sampling fish schools in the same field and inter-field interpolation using sampling fish schools at corresponding positions in adjacent fields. In this interpolation process, a moving area and a still area are detected from the received screen, intra-field interpolation is performed for the moving area, and inter-field interpolation is performed for the still area. As a special type of inter-field interpolation, inter-frame interpolation processing is also used.

NEC Gitl Vol, 41 No, 3/1988
The paper by the present inventors entitled "R MUS fE Decoder" published in 2003 describes a MUSB decoder shown in the block diagram of FIG. 3.

In the MUSE decoder shown in Fig. 3, the video signal input to the input terminal IN is converted into a digital video signal by the A/D converter 1, and after being subjected to preprocessing such as de-emphasis in the preprocessor 2, the video signal input to the input terminal IN is converted into a digital video signal. The interpolation unit 4 performs interframe interpolation and noise reduction processing. The video signal that has undergone interframe interpolation and noise reduction processing is subjected to various processing such as interpolation processing, frequency conversion, and filtering for each luminance signal and chrominance signal in a luminance signal processing section 10 and a chrominance signal processing section 20. After that, R and G are applied in the matrix section 8.

It is converted into three primary color signals of B, and converted into analog R, G, B signals by D/A converters 9a to 9c, and output terminals O8 to 0.
．． is output to.

As shown in FIG. 4, the interframe interpolation unit 4 in FIG.
A frame memory composed of staged field memories 41 and 42, arithmetic circuits 43 and 44, and a non-linear circuit 45.
and a switch 46.

The signal output from the adder circuit 44 to the output terminal O is the fifth
As shown in Figure (A), the noise-reduced pixel signal rOJ of the current field and the pixel signal "-2" two fields (l frame before) of the current field are alternated in units of pixels (dots). However, by arranging them on a line, interpolation is performed between frames. This signal (A) is transmitted to the field memories 41 connected in series in two stages.
and 42, the signal C is further delayed by two fields (one frame) as shown in FIG. 5(C).
and is supplied to one input terminal of the subtraction circuit 43,
It is subtracted from the current field signal applied to the other input terminal. As a result, the subtraction circuit 43 outputs the signal obtained by subtracting the signal of four fields (two frames before) from the signal of the current field, and the signal obtained by subtracting the signal of four fields (two frames before) from the signal of the current field.
A signal obtained by subtracting the signal before the field (one frame before) is output, which is alternated in the line direction for each pixel.

The switch 46, which is switched for each pixel, is connected to the subtraction circuit 43.
Of the outputs, the signal obtained by subtracting the signal 4 fields before from the signal of the current field passes through the nonlinear circuit 45, and the signal obtained by subtracting the signal 2 fields before from the signal of the current field passes through the nonlinear circuit 45. The signal is directly supplied to one input terminal of the adder circuit 44 without passing through.

The signal applied to one input terminal of adder circuit 44 via switch 46 is summed with the current field signal applied to the other input terminal. The non-linear circuit 45 regards the output of the subtraction circuit 43 as a noise component included in a still area within the screen, and selectively passes only small amplitude components. Therefore, the adder circuit 44 outputs the current field signal "0" from which the noise component extracted by the nonlinear circuit 45 has been removed from the current field signal. From the adder circuit 44, the signal from two fields before is shifted by one pixel from the output "0" and returned to the signal at the time of reading from the field memory 42 through subtraction and addition with the current field signal in the arithmetic circuits 43 and 44. The signal "-2" (one frame before) is also output.

The output of the interframe interpolation unit 4 is transmitted to the luminance signal processing unit 1 in the subsequent stage.
0 and is supplied to the color signal processing section 20.

The luminance signal processing section 10 consists of a static region processing system consisting of a low-pass filter circuit 11, a frequency conversion circuit 12, and an interfield interpolation circuit 13, a sampling switch 14, an intrafield interpolation circuit 15, and a frequency conversion circuit 16. It is separated into a motion area processing system. The luminance signal processing section 1
The outputs of the still area processing system and the motion area processing system within 0 are combined in the adaptive combining section 17 at a combining ratio according to the motion detection result by the motion detection circuit 5.

The sampling switch 14, which is opened and closed at the pixel frequency,
By blocking the passage of the pixel signal two fields before (one frame before) interpolated by the interframe interpolation unit 4 in the previous stage, the noise reduction processed signal "0" as shown in FIG. ” is supplied to the interfield interpolation unit 15.

(Problem to be Solved by the Invention) In the above conventional MUSE decoder, the interframe interpolation unit 4
frame memory (two-stage field memory 41
．． It has been planned to add a static display function that freezes the display screen at a desired time by forming a loop between the input and output of 42).

However, when attempting to freeze the display screen by forming a loop between the input and output of the frame memory of the interframe interpolation unit 4, if there is movement between adjacent fields, flickering of the field period will occur in the still image. There is a problem.

That is, by fixing the sampling switch 46 of the interframe interpolation section 4 in FIG. 4 to the lower side and removing the nonlinear circuit 45, a transition is made to the static display mode. At this point, a signal as shown in FIG. 5(A) is written in the field memory 41, and a signal as shown in FIG. 5(B), which is delayed by one field, is written in the field memory 42. A signal is written. The signals shown in FIGS. 5(A) and 5(B) pass through the sampling switch 14, become signals shown in FIG. 6(A) and ([3), respectively, and are repeatedly supplied to the intra-field interpolation unit 15. The result is a still image that has been subjected to intra-field interpolation processing.

Therefore, if there is a change between the signal "0" of the current field and the signal "-1" of one field before, flickering occurs in the field period on the still display screen, and the accompanying deterioration of image quality becomes a problem.

Also, if you add field memory dedicated to static display,
There is a problem in that the amount of hardware increases, pushing up the price of the MUSE decoder.

(Means for Solving the Problems) The static display control circuit of the MUSE decoder according to the present invention is used as a memory of a temporal filter during periods other than the static display period, and immediately before the static display starts, it is used as a memory for the luminance signal processing unit and the color The screen for the latest one field output from or input to the intra-field interpolation unit in the motion area processing system common to the signal processing unit is held, and within the static display period, the screen is displayed immediately before the start of this static display. It is equipped with a memory for reading out and outputting the most recent one field of the screen for each field, and a means for instructing the adaptive synthesis unit to synthesize the luminance signal and color signal using only the output of the motion area processing system. .

(Function) The static display control circuit of the present invention stores the latest one-field screen output from the field interpolation circuit in the memory and periodically reads it out, thereby preventing movement between fields. High-quality still images without flicker can be displayed even if there is a flicker.

In addition, since the screen for the latest one field output from or input to the intra-field interpolation unit is stored in the memory of the temporal filter, which is always unnecessary during static display, memory is no longer required,
The cost of the MUSE decoder can be reduced.

Hereinafter, further details of the present invention will be explained together with examples.

(Embodiment) FIG. 1 is a block diagram showing an example of the configuration of a main part of a MUSE decoder including a static display control circuit according to an embodiment of the present invention.

In this MUSE decoder, IN is an input terminal for a received analog video signal, 1 is a Δ/D conversion section, 2 is a preprocessing section,
・1 is inter-field interpolation section, 5 is tJ+ detection section, 6 is synchronization detection section, 7 is control signal detection section, 8 is ゛7
TRIX section; 9 is a D/A conversion section;

01JT, ~ou'r are output terminals for processed R, G, and B video signals, 10 is a luminance signal processing section, and 20 is a color signal processing section.

The MLJSE video signal appearing at the input terminal IN is the A/D
In the converter 1, the signal is converted into a 10-bit wide digital signal at a sampling frequency of 1.6.2 Mllz. A preprocessing section 2 performs preprocessing such as nonlinear de-emphasis and reverse gamma correction on this A/D converted digital video signal.

The same I detection unit 6 extracts various synchronization signals from the A/D converted digital video signal, and extracts 16.2M1lz, 32.4 Mtlz, 4 from the extracted synchronization signals.
The 8.6 MIIz clock signal is regenerated and supplied to each part. The control signal extracting section 7 has an A/D'Ii
A control signal including a motion hector signal and sub (number phase information) is extracted from the converted digital video signal, and these are passed to an interframe interpolation unit 4 and a luminance signal processing unit 1.
0, is supplied to the color signal processing section 20, etc. Further, although not shown in the drawing, an audio signal separation/decoding section and the like are also installed in this MUSE decoder.

The video signal output from the preprocessing section 2 is subjected to interframe interpolation processing in an interframe interpolation section 4 having the configuration shown in FIG. The motion detection section 5 detects the magnitude of motion in the screen from the magnitude of the interframe difference signal of one frame or two frames before the video signal after the interframe interpolation processing nii, and communicates the magnitude of the motion with the luminance signal processing section 10. The signal is supplied to adaptive synthesis circuits 17 and 25 in the signal processing section 20.

The static region of the luminance signal included in the video signal that has been interpolated between frames is filtered by a low-pass filter circuit 11 with a pass band of 0 to 12 Mtlz, 32. ．． 4 Mllz to 48.6 Ml
The signal is processed in a still area processing system comprising a frequency conversion circuit 12 for lz and an interfield interpolation circuit 13. Further, the motion region included in the inter-frame interpolated video signal is processed in a motion region processing system comprising a sampling switch 14, an intra-field interpolation circuit 15, and a frequency conversion 16. Therefore, the still display control circuit 30 is configured to pass the output of the intra-field interpolation circuit 15 as is to the frequency conversion circuit 16 during normal operation other than the still image display mode. Also,
1. The sampling switch 14 and the intra-field interpolation circuit 15 in the motion area processing system of the luminance signal processing section 10 constitute a common part with the motion area processing system of the color signal processing section 20.

The inter-field interpolated luminance signal and the intra-field interpolated luminance signal are synthesized in an adaptive synthesis circuit 17 according to a synthesis ratio that is adaptively controlled according to the magnitude of motion detected by the motion detection unit 5. be done. This synthesized luminance signal undergoes low-pass replacement processing in a low-pass replacement section 18 and is then supplied to a temporal filter 19 .

This temporal filter 19 is for reducing the change in resolution at the change point between the still area and the moving area, and filters the high-frequency components of the signal of the current frame, the high-frequency components of the signal of the previous frame, Among these average values, the one with the smallest absolute value is added to the reduced component of the signal of the current frame. Therefore, a memory is provided to hold the high-frequency components of the signal before the previous frame. Furthermore, as will be described in detail later, during static display only signals from the motion area processing system are used, so the temporal filter processing and therefore its memory are always unnecessary. The output of the temporal filter 19 is supplied to the matrix section 8 during periods other than the static display period.

Similarly, for the color signal whose time axis has been expanded by four times in the time axis expansion circuits 21 and 23 in the color signal processing section 20, the interfield interpolation circuit 22 and the intrafield interpolation circuit 2
3, interpolation processing is performed according to the still area and the moving area, respectively. The interpolated color signals are combined in an adaptive synthesis circuit 25 according to a synthesis ratio that is adaptively controlled according to the magnitude of motion detected by the motion detection circuit 5. This combined color signal is subjected to data compression in which a (RY) signal and a (B-Y) signal appear alternately every other line. This color signal is processed by the line sequential decoder 26.
Line continuous color signal by line interpolation; the frequency is converted from L6.2 Mtlz to 48.6 MHz in the frequency conversion circuits 27 and 28, respectively, and then sent to the matrix section 8. Supplied.

The matrix unit 8 receives a luminance signal Y and a color signal (RY) supplied from a luminance signal processing unit 10 and a color number 13 processing unit 20,
Generate R, G, B three primary color signals from (B-Y),
Output terminal 0 [JT, 0LJT
2. OUT: Supplied to each of l.

As shown in FIG. 2, the static display control circuit 30 has an input terminal (1) connected to the high-frequency component extracting section in the temporal filter 19, an input terminal I2 connected to the output terminal of the intra-field interpolation circuit, and a static display control circuit 30. It has an input terminal I3 that receives display commands, switches S, S, S3, and a memory M. This static 1F display control circuit 30 further includes an adaptive synthesis section 17.25, a low frequency replacement circuit 18,
It includes a command output terminal O1 that supplies a control command to the temporal filter 19, and a control circuit C.

In the normal operation element where the command signal for static display operation does not appear at the input terminal 13, the switches St and Sz
, S3, the contact is switched to the A side. Along with this, the high-frequency component of the reduced and substituted signal created in the temporal fin n,, =; 1 g and supplied to the input terminal It is read out after the frame and is supplied to the high-frequency component detection section of the previous frame signal in the temporal filter 19 via the switch S1 and the output O:II O3. this,
The write/continuous output address for the memory M, write/read commands, and control signals such as memory enable are both supplied from the temporal filler 19 via the switch S2 whose contact point is switched to the A side. Ru.

In this way, when a static display command is not issued, the memory M in the static display control circuit 30 is temporally
used by filter 19.

On the other hand, when the static display 1 command appears at the input terminal ■3, the control circuit C that detects this changes the switches S and S2.
Switch the contact from A side to B side, and switch S
A write address and a control signal for one field of signals are supplied to the contact B side of No. 2. As a result, the intra-field interpolated signal for one latest field output from the previous-stage intra-field interpolation circuit 15 is written into the memory M.

When the writing of the signal for one field is completed, the control circuit C switches the contact of the switch S:l from the A side to the B side, and also sets the address of the signal for one field to the contact B side of the switch S2. Send control signals. As a result, the intra-field interpolated signal for the latest one field outputted from the previous-stage intra-field interpolation circuit 15 and written to the memory M is read out from the memory M.
To read one field worth of signals from the memory M of the
Repeated with field period. In addition, the above switch S
Simultaneously with the switching of 3, the control circuit C supplies a control command to the output terminal O□. Adaptive synthesis unit 1 that receives this control command
7 and 25 start signal synthesis using only signals from the motion area processing system.

In addition, the low frequency replacement circuit 18 and the temporal filter 19 that have received the control command stop their respective processes within the static display period.

In this way, one field of the screen held in the memory M in the static display control circuit 30 is repeatedly read out every field. Therefore, even if signals between adjacent fields change due to movement, a stable field still screen is displayed without any force.

Above, a configuration has been exemplified in which the still display control circuit 30 is installed after the intra-field interpolation circuit 15 in the motion area processing system common to the luminance signal processing section and the color signal processing section. However, the static display control circuit 30 may be installed before the field interpolation circuit 15.

Further, a configuration is illustrated in which the output of the interframe interpolation circuit 4 is supplied to the intrafield interpolation circuit 15 via the sampling switch 14. However, the interframe interpolation circuit 4
The signal on the input terminal may be supplied to a cascade-connected circuit of the field interpolation circuit 15 and the static display control circuit 30 via the sampling switch 14.

(Effects of the Invention) As explained in detail above, the static display control circuit of the MUSE decoder according to the present invention stores the latest one field of screen output from the field interpolation circuit of the motion area processing system in the memory. Since the structure is such that a still image is stored in the field and periodically read out, a high-quality still image without flicker can be displayed even if there is movement between fields.

In addition, the configuration is such that the latest one field of screen output from the field interpolation circuit is stored in the memory of the temporal filter, which is always unnecessary during static display.
A memory dedicated to static display is no longer required, and the cost of the MUSE decoder can be reduced.

[Brief explanation of the drawing]

FIG. 1 shows an M including a static display control circuit according to an embodiment of the present invention.
FIG. 2 is a block diagram showing a configuration example of the static display control circuit of FIG. 1, FIG. 3 is a block diagram showing the configuration of a conventional MUSE decoder, and FIG. 5 and 6 are conceptual diagrams for explaining the operation of the interframe interpolation block 4 and the problems of static display control using this block diagram. be. IN...Input terminal for received video signal, 1...A/D conversion section, 2...Preprocessing section, 4...Interframe interpolation section,
5... Motion detection section, 10... Luminance signal processing section, 20
... Color signal processing section, 30 ... Still display control section, 31
...Field memory, 32...Control circuit, h.
・Input terminal for intra-frame interpolated video signal, I2 ・
・・Input terminal for A/D converted video signal, I3 ・・
Input terminal for static display command, 0. ...Video signal output terminal, 0□...Control signal output terminal. Patent applicant: NEC Home Electronics Co., Ltd. (1 other person)

Claims (1)

[Claims] Used as memory for a temporal filter during periods other than the static display period, and immediately before the start of static display, field interpolation within a motion area processing system common to the luminance signal processing section and the color signal processing section is performed. Latest 1 after processing or before field interpolation processing
A memory that holds a screen for a field and reads and outputs the latest one field screen held immediately before the start of the static display every field during a static display period, and a luminance signal by only the output of the motion area processing system. A static display control circuit for a MUSE decoder, comprising: and a control means for instructing an adaptive synthesis section to synthesize color signals.