JPH02137323A - Method for forming low stress thin film - Google Patents
Method for forming low stress thin filmInfo
- Publication number
- JPH02137323A JPH02137323A JP63291587A JP29158788A JPH02137323A JP H02137323 A JPH02137323 A JP H02137323A JP 63291587 A JP63291587 A JP 63291587A JP 29158788 A JP29158788 A JP 29158788A JP H02137323 A JPH02137323 A JP H02137323A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- stress
- film
- substrate
- deposited
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 40
- 238000000034 method Methods 0.000 title claims description 15
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 239000010408 film Substances 0.000 abstract description 30
- 238000000137 annealing Methods 0.000 abstract description 5
- 229910003460 diamond Inorganic materials 0.000 description 6
- 239000010432 diamond Substances 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 239000002184 metal Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 238000001552 radio frequency sputter deposition Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Landscapes
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は基板(以下、ウェハという)の表面への低応力
薄膜の形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a low stress thin film on the surface of a substrate (hereinafter referred to as a wafer).
従来、各種半導体デバイスあるいはX線マスク基板等に
用いられる薄膜の形成において、該薄膜の応力を低減し
たり、あるいは適当な応力に制御したりする必要がある
場合、成膜方法及び成膜条件を特定の条件に精密に制御
して所望の応力を得るか、もしくは成膜後に特定の条件
で該薄膜を7ニールして適正応力を得るか、あるいはま
た異なる方法で堆積した複数の薄膜を積層して全体とし
て適正応力になるようにする方法のいずれかによってい
た。例えば、IECRプラズマCvD法によりSi基板
上に堆積したシリコン窒化膜は一般に圧縮応力を有して
おり、これをX線マスク基板として利用する場合には、
シリコン窒化膜を堆積した後、Si基板を数百℃の窒素
雰囲気中でアニールして該シリコン窒化膜の残留応力を
張力に変化させる必要があった。Conventionally, when forming thin films used for various semiconductor devices or X-ray mask substrates, etc., when it is necessary to reduce the stress of the thin film or control the stress to an appropriate level, the film forming method and film forming conditions have been changed. Either by precisely controlling specific conditions to obtain the desired stress, or by annealing the thin film 7 times under specific conditions after film formation to obtain the appropriate stress, or by stacking multiple thin films deposited using different methods. One of the methods was used to ensure that the overall stress was at an appropriate level. For example, a silicon nitride film deposited on a Si substrate by the IECR plasma CvD method generally has compressive stress, and when used as an X-ray mask substrate,
After depositing the silicon nitride film, it was necessary to anneal the Si substrate in a nitrogen atmosphere at several hundred degrees Celsius to change residual stress in the silicon nitride film into tension.
しかしながら、上記の第1の方法の場合には、薄膜の応
力を適正に制御しようとすると、薄膜の他の特性が犠牲
になる。また上記第2の方法においては、高温でアニー
ルするため、デバイス製造プロセスには適用が極めて限
定されることや、アニールによってその薄膜の本来の性
質が変えられてしまうという不都合があった。さらに上
記第3の成膜方法は工程が複雑になるばかりでなく、薄
膜の種類によっては適当な組合せがなく、低応力化する
ことができないなどの欠点があった。However, in the case of the first method described above, other properties of the thin film are sacrificed in order to properly control the stress in the thin film. Further, in the second method, since the annealing is performed at a high temperature, its application to device manufacturing processes is extremely limited, and the original properties of the thin film are changed by the annealing. Furthermore, the third film forming method has drawbacks such as not only complicated steps but also the lack of suitable combinations depending on the type of thin film and the inability to reduce stress.
本発明の目的は前記課題を解決した低応力薄膜の形成方
法を提供することにある。An object of the present invention is to provide a method for forming a low stress thin film that solves the above problems.
前記目的を達成するため、本発明に係る低応力薄膜の形
成方法においては、基板の一面上に所望の応力を有する
第1の薄膜を堆積し、該基板の他面上に前記第1の薄膜
と等しい極性の応力を有する第2の薄膜を堆積し、その
後第1の薄膜を除去して第2の薄膜の応力を低減させる
ものである。In order to achieve the above object, in the method for forming a low stress thin film according to the present invention, a first thin film having a desired stress is deposited on one surface of a substrate, and the first thin film is deposited on the other surface of the substrate. A second thin film having a stress of polarity equal to is deposited, and then the first thin film is removed to reduce the stress in the second thin film.
(作用〕
本発明によれば、特別な成膜条件の設定や成膜後のアニ
ールを施さずとも1本来残留応力の大きい薄膜を、その
薄膜の他の性質を殆ど変化させずに低応力化できる。(Function) According to the present invention, a thin film that inherently has high residual stress can be reduced in stress without changing any other properties of the thin film without setting special film forming conditions or performing post-forming annealing. can.
次に本発明の一実施例として、低応力のダイヤモンド膜
をウェハの表面に形成する方法を図面を用いて工程順に
説明する。第1図(a)に示すように、S1基板11の
裏面にrfスパッタリング法により高融点金属膜(例え
ばW膜)12を堆積する。このとき、ガス圧を約2Pa
ないし10Pa、 rfパワーを約1v/−なイL5W
/aH:制御すルト、該W[12は約2 X 10L。Next, as an embodiment of the present invention, a method for forming a low stress diamond film on the surface of a wafer will be explained step by step with reference to the drawings. As shown in FIG. 1(a), a high melting point metal film (for example, W film) 12 is deposited on the back surface of the S1 substrate 11 by RF sputtering. At this time, the gas pressure is approximately 2 Pa.
or 10Pa, RF power about 1V/- L5W
/aH: Control throttle, the W [12 is approximately 2 x 10L.
dyn/ aiの圧縮応力を生ずるため、該Si基板1
1の表面はW[12の膜厚に応じて凹面に反る(第1図
(b))。In order to generate compressive stress of dyn/ai, the Si substrate 1
The surface of W[12] curves into a concave shape depending on the film thickness of W[12] (FIG. 1(b)).
W膜12の厚さは、後に堆積するダイヤモンド膜の厚さ
に応じて最適化する。The thickness of the W film 12 is optimized depending on the thickness of the diamond film to be deposited later.
次に例えばCH4ガスと11.ガスを用いた[ECRプ
ラズマCVD法により、該Si基板11を約1000℃
に加熱しつつ、ダイヤモンド膜13をこのSi基板]1
の表面に堆積する(第1図(C))。こうして堆積した
ダイヤモンド膜13は通常的I X 10iQdyn/
aJの圧縮応力を有し、先にSi基板の裏面に堆積した
W膜12の圧縮応力と相殺しあって、Si基板11の反
りは軽減される。Next, for example, CH4 gas and 11. The Si substrate 11 is heated to about 1000° C. by [ECR plasma CVD method using gas].
While heating the diamond film 13 to this Si substrate]1
(Fig. 1(C)). The diamond film 13 deposited in this way has a typical I x 10iQdyn/
It has a compressive stress of aJ, which cancels out the compressive stress of the W film 12 previously deposited on the back surface of the Si substrate, thereby reducing the warpage of the Si substrate 11.
この段階で前記W膜12には、堆積直後に比べてさらに
大きな圧縮応力を生じている。しかる後、Si基板11
の裏面に堆積したW膜12を任意のエツチング方法、例
えば湿式エツチング法により除去すると、該W膜12に
よる応力が除去される結果、該Si基板11はほぼ平坦
な初期状態に戻る(第1図(d))。At this stage, a larger compressive stress is generated in the W film 12 than immediately after the deposition. After that, the Si substrate 11
When the W film 12 deposited on the back surface of the Si substrate 11 is removed by any etching method, such as wet etching, the stress caused by the W film 12 is removed, and the Si substrate 11 returns to its initial, almost flat state (see FIG. 1). (d)).
すなわち、この状態においてはダイヤモンド膜及びSi
基板双方の応力は殆どゼロである。That is, in this state, the diamond film and Si
The stress on both substrates is almost zero.
なお、上記実施例においては目的とする低応力化すべき
薄膜としてOCRプラズマCvD法のダイヤモンド膜を
、また基板の裏面に形成する反り補正用薄膜としてスパ
ッタ金属膜をそれぞれ用いたが、本発明は上記の組合せ
の場合に限定されるものではなく、目的の薄膜の応力と
同極性で大きさがほぼ等しい応力を有する薄膜を基板の
裏面に予め堆積する場合が全て含まれる。In the above embodiments, a diamond film produced by OCR plasma CVD method was used as the thin film to be aimed at reducing stress, and a sputtered metal film was used as the warp correction thin film formed on the back surface of the substrate. The present invention is not limited to the combination of the following, but includes all cases in which a thin film having a stress of the same polarity and approximately the same magnitude as the stress of the target thin film is deposited in advance on the back surface of the substrate.
本発明によれば、従来一般に用いられている成膜方法の
最も一般的な成膜条件を用いて、所望の性質を有し且つ
残留応力の殆どない薄膜を堆積することができる効果を
有する。According to the present invention, a thin film having desired properties and having almost no residual stress can be deposited using the most general film forming conditions of a film forming method commonly used in the past.
第1図(a)〜(,1)は本発明の一実施例を工程順に
示す模式断面図である。FIGS. 1(a) to 1(,1) are schematic sectional views showing an embodiment of the present invention in the order of steps.
Claims (1)
堆積し、該基板の他面上に前記第1の薄膜と等しい極性
の応力を有する第2の薄膜を堆積し、その後第1の薄膜
を除去して第2の薄膜の応力を低減させることを特徴と
する低応力薄膜の形成方法。(1) Depositing a first thin film having a desired stress on one side of the substrate, depositing a second thin film having a stress of the same polarity as the first thin film on the other side of the substrate, and then depositing a second thin film having a stress of the same polarity as the first thin film. A method for forming a low stress thin film, the method comprising removing a first thin film to reduce stress in a second thin film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63291587A JPH02137323A (en) | 1988-11-18 | 1988-11-18 | Method for forming low stress thin film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63291587A JPH02137323A (en) | 1988-11-18 | 1988-11-18 | Method for forming low stress thin film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02137323A true JPH02137323A (en) | 1990-05-25 |
Family
ID=17770870
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63291587A Pending JPH02137323A (en) | 1988-11-18 | 1988-11-18 | Method for forming low stress thin film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02137323A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004029736A (en) * | 2002-03-29 | 2004-01-29 | Hoya Corp | Method for determining flatness of substrate for electronic device, production method and method for producing mask blank and mask for transfer |
| KR100577526B1 (en) * | 1999-08-17 | 2006-05-10 | 주식회사 하이닉스반도체 | Manufacturing Method of Semiconductor Device |
-
1988
- 1988-11-18 JP JP63291587A patent/JPH02137323A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100577526B1 (en) * | 1999-08-17 | 2006-05-10 | 주식회사 하이닉스반도체 | Manufacturing Method of Semiconductor Device |
| JP2004029736A (en) * | 2002-03-29 | 2004-01-29 | Hoya Corp | Method for determining flatness of substrate for electronic device, production method and method for producing mask blank and mask for transfer |
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