JPH02143664U - - Google Patents
Info
- Publication number
- JPH02143664U JPH02143664U JP5078489U JP5078489U JPH02143664U JP H02143664 U JPH02143664 U JP H02143664U JP 5078489 U JP5078489 U JP 5078489U JP 5078489 U JP5078489 U JP 5078489U JP H02143664 U JPH02143664 U JP H02143664U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- image
- information
- image information
- averaging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012935 Averaging Methods 0.000 claims description 8
- 238000000034 method Methods 0.000 claims 2
- 239000000284 extract Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Image Processing (AREA)
Description
第１図は、本考案に係る画像情報平均化回路の
構成例を示すブロツク図であり、第２図は、第１
図に示した平均化回路における入力選択部の構成
例を示す論理回路図であり、第３図は、第１図に
示した平均化回路における減算回路の論理回路図
であり、第４図は、第１図に示した平均化回路に
おける比較回路の論理回路図であり、第５図は、
第１図に示した平均化回路における第１演算回路
、第２演算回路および出力選択回路の構成を示す
論理回路図である。
主な参照番号、１０……入力選択部、１１……
減算回路、１２……比較回路、１３ａ……第１演
算回路、１３ｂ……第２演算回路、１４……出力
選択部。
FIG. 1 is a block diagram showing a configuration example of an image information averaging circuit according to the present invention, and FIG.
FIG. 3 is a logic circuit diagram showing a configuration example of an input selection section in the averaging circuit shown in FIG. 1; FIG. 3 is a logic circuit diagram of a subtraction circuit in the averaging circuit shown in FIG. 1; FIG. , is a logic circuit diagram of a comparison circuit in the averaging circuit shown in FIG. 1, and FIG.
2 is a logic circuit diagram showing the configurations of a first arithmetic circuit, a second arithmetic circuit, and an output selection circuit in the averaging circuit shown in FIG. 1. FIG. Main reference numbers, 10... Input selection section, 11...
Subtraction circuit, 12... Comparison circuit, 13a... First arithmetic circuit, 13b... Second arithmetic circuit, 14... Output selection section.
Claims (1)
得た画像情報から、連続する複数の走査線の情報
を平均化して圧縮した画像情報を生成する処理を
含む画像処理を実行するシステムにおいて、該走
査線情報の平均化処理を実行する回路であつて、 それぞれ独自の演算方式に従つて平均化処理を
行う複数の演算回路と、平均化の対象となる走査
線データ相互の間の差を抽出する減算回路と、該
減算回路により得られた差信号と外部から入力す
る基準データとを比較してその比較結果により前
記演算回路のうちの１つの出力を選択的に外部に
出力する出力選択回路とを備えることを特徴とす
る画像情報平均化回路。[Claims for Utility Model Registration] A process of generating compressed image information by averaging the information of a plurality of consecutive scanning lines from image information obtained by A/D converting an image signal obtained by scanning an image. In a system that executes image processing including a circuit, the circuit executes averaging processing of the scanning line information, and includes a plurality of arithmetic circuits each performing averaging processing according to its own arithmetic method, and an object to be averaged. a subtraction circuit that extracts the difference between scanning line data, and compares the difference signal obtained by the subtraction circuit with reference data input from the outside, and outputs one of the arithmetic circuits based on the comparison result. and an output selection circuit that selectively outputs the image information to the outside.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5078489U JP2504755Y2 (en) | 1989-04-28 | 1989-04-28 | Image information averaging circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5078489U JP2504755Y2 (en) | 1989-04-28 | 1989-04-28 | Image information averaging circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02143664U true JPH02143664U (en) | 1990-12-05 |
| JP2504755Y2 JP2504755Y2 (en) | 1996-07-10 |
Family
ID=31569633
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5078489U Expired - Lifetime JP2504755Y2 (en) | 1989-04-28 | 1989-04-28 | Image information averaging circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2504755Y2 (en) |
-
1989
- 1989-04-28 JP JP5078489U patent/JP2504755Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2504755Y2 (en) | 1996-07-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR950035441A (en) | Frame to Frequency Inverter | |
| CA2210502A1 (en) | Logic filters for resolution conversion of digital images | |
| JPH02132965A (en) | Image processing device | |
| JPH0444769U (en) | ||
| JPS61161609U (en) | ||
| JPS6189955U (en) | ||
| JPH0444771U (en) | ||
| JP3006308B2 (en) | Digital filter circuit | |
| JPS59115650U (en) | logic array integrated circuit | |
| JPS58105651U (en) | Pattern center position detection device | |
| JP2504755Y2 (en) | Image information averaging circuit | |
| JPH0415071U (en) | ||
| JPS5857159U (en) | Binary image smoothing circuit | |
| JPH042193U (en) | ||
| JPH03113538U (en) | ||
| JPH03101077U (en) | ||
| JPS63126960U (en) | ||
| JPS61146048U (en) | ||
| JPH0172645U (en) | ||
| JPH0399368U (en) | ||
| JPS6335164U (en) | ||
| JPS61187159U (en) | ||
| JPH0225223B2 (en) | ||
| JPH0397239U (en) | ||
| JPH03127949U (en) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |