JPH02151114A - square operator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to communication technology used in home automation equipment and the like.

2. Description of the Related Art When a spread spectrum method is used for communication between terminals in home automation, if the spread spectrum method is direct spread, square law detection is used as a method for despreading the spectrum on the receiving side.

As a receiving device that uses square law detection of digital signals,
The one shown in FIG. 4 can be considered. Here the original carrier frequency f. A spread spectrum wave with a spectrum distributed symmetrically on both sides of the center is supplied to the input, and the spread spectrum wave is supplied to two input terminals of an analog multiplier 2 via a bandpass filter 1, It is squared. As a result, a signal having a peak at 2fO, that is, a despread signal appears at the output of the analog multiplier 2. This despread signal is passed through a bandpass filter 3 to 2
Unnecessary frequency components other than fo are removed, and a demodulated data output is obtained by the detection means 4.

Problems to be Solved by the Invention In this configuration, an analog multiplier 2 is used as a multiplier, and it is necessary to adjust the bias of the multiplier during production. Furthermore, even in the case of integrated circuits, a large number of external components are required, which increases the circuit scale.

An object of the present invention is to provide a multiplier that can be constructed from a digital circuit, and in particular, to provide a square arithmetic unit.

Means for Solving the Problems The square calculator of the present invention includes a delay means for delaying and outputting the highest frequency component included in a digitally converted input signal by about half a cycle, and the digitally converted input signal and the delay means. and a calculation means for calculating an exclusive OR with the output signal of the input signal, and the output signal of the calculation means is an output of the square calculation of the input signal.

Effect: According to this configuration, a squaring operation is executed by the arithmetic means that calculates the exclusive OR of two inputs.

It is generally known that the exclusive OR has the same function as a multiplier, but even if the same signal is applied to the two inputs of the exclusive OR, the output of the exclusive OR will always be You can't get anything at low level. Here, instead of applying the same signal to both of the calculation means that calculates the exclusive OR of two inputs, a digitally converted input signal is applied to one input, and the delay means is applied to the other input. A double signal with a slight phase shift is applied to realize the square calculation.

EXAMPLE An example of the present invention will be described below with reference to FIGS. 1 to 3. Components having the same functions as those in FIG. 4 showing the conventional example will be described with the same reference numerals.

FIG. 1 shows a square calculator of the present invention. The digitally converted input signal 5 is supplied to one input gate of an exclusive OR gate (hereinafter referred to as an Ex-OR gate) 6 as an arithmetic means and to an input 9 of a delay means 8. The output signal of the delay means 8 is supplied to the other input IO of the Ex-OR gate 6. The amount of delay of the delay means 8 is approximately half a period of the highest frequency component in the input signal 5, and specifically, the delay means 8 is constructed as shown in FIG.

Oscillator II generates a clock whose frequency is more than twice the highest frequency component of input signal 5, and this clock is applied to clock input CK of shift register 12. An input signal 5 is supplied to the data input of the shift register 12. The output Q of the shift register 12 becomes the output signal of the delay means 8, and the output Q becomes the output signal of the Ex-OR gate 6.
is connected to said other input IO of.

In FIG. 2, the shift register 12 delays the input signal 5 by one clock period and outputs it to the Ex-OR gate 6. The exclusive OR of the signal and the input signal 5, that is, the result of squaring the input signal 5, is generated.

FIG. 3 shows a configuration in which the above-mentioned square calculator 13 is used in a receiving apparatus in a spread spectrum system. The received spread spectrum signal that has passed through the bandpass filter 1 is binarized via the voltage comparator 14, and the binarized signal is supplied to the input of the square calculator 13. Square calculator 1
In 3, the input spread spectrum signal is squared,
The original carrier frequency f of the spread spectrum signal. A despread signal having a peak at 2fo is output. The output signal of this square calculator 13 is passed through a bandpass filter 3 to remove unnecessary frequency components other than 2 f o , and the detection means 4 obtains a demodulated data output.

This square calculator I3 does not require external parts unlike the case of the analog multiplier 2, and also does not require bias adjustment.

Furthermore, the Ex/OR gate 6 and the shift register 12 have an extremely small number of gates and can be implemented as a digital integrated circuit. Further, the delay means 8 is connected to an oscillator 11 and a shift register 12.
However, it is also possible to implement it with a small number of passive elements such as capacitors, coils, and resistors, and incorporate these passive elements inside the integrated circuit.

Therefore, the circuit scale can be reduced, and productivity can also be improved.

Effects of the Invention According to the present invention, as described above, the calculation means calculates the exclusive OR of the digitally converted input signal and the signal obtained by delaying the highest frequency component included in the input signal by about half a period in the delay means. Since the output signal of the calculation means is used as the square calculation output, it can be integrated into an integrated circuit, eliminating the need for external components and eliminating the need for bias adjustment as seen in analog multipliers. Therefore, it is possible to reduce the size of the circuit and improve productivity.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the square calculator of the present invention, Fig. 2 is a block diagram of an embodiment of the same device, Fig. 3 is a block diagram of a receiving device using the same device, and Fig. 4 is the solution solved by the invention. FIG. 2 is a configuration diagram of a receiving device for explaining the problem to be solved. 5... Input signal, 6... Ex/OR gate [calculating means] 8... Delay means, 11... Oscillator, 12...
Shift register, 13...square calculator.

Claims (1)

[Claims] 1. Delay means for delaying and outputting the highest frequency component included in the digitally converted input signal by about half a cycle, and an operation for calculating the exclusive OR of the digitally converted input signal and the output signal of the delay means. means, and the output signal of the calculation means is a square calculation output of the input signal.