JPH02152249A - Automatic prober for ic wafer test - Google Patents

Abstract

PURPOSE:To change a probing method according to whether a tested chip is good or defective by a method wherein a received GO/NG signal is used to control a probing operation of an automatic prober and the following function is provided: in the case of a defective chip, a peripheral chip of the defective ship is probed and, in the case of the good chip, a test is finished. CONSTITUTION:Chips 1 to 5 are sampled and tested from all chips on an IC wafer 6. During this process, an automatic prober 8 receives a GO/NG signal 16 of the chips from a tester 7. After the chip 1 has been tested, a controller 10 controls a prober station 13 if the GO/NG signal 16 from the tester indicates a good product; the chip 2 is probed. After the chip 2 has been tested and if it is a good product, the chip 3 is probed; the chips up to the chip 5 are tested one after another; if the five chips are all good, a test of this IC wafer is finished. When any of the chips 1 to 5 is defective, the controller 10 controls the probe station 13 in such a way that any chip in the upper or lower part and in the left or right part is probed. When the chip 1 is defective, chips A, B, C, D are probed and tested.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field 1] This invention relates to an automatic propper for IC wafer testing.

[Prior Art j Figure 4 is a conceptual diagram of the connection between a conventional automatic prober and a tester. External interface (9) of automatic properr (8)
is the start signal (14) from the tester (7) at the start of the test.
05/NG signal (16) when the test is completed.
is received, and the end signal (
15) to the tester (7). This exchange is performed for each chip on the IC wafer. External ink face (9) is a star) No. I (14) T controller (1
0), and the controller (10) controls the loader (12) and probe station (13). In addition, the external interface (9) is connected to Gr at the end of each chip test.
6/NG signal (16) is sent to the RAM memory (11), and each
) Store the LDGo/NG information.

Normally, all chips on an IC wafer are tested, but when testing a specific chip on an IC wafer, it is necessary to change the probing method.

FIG. 5 is an explanatory diagram showing the probing method when testing chips on an IC wafer by skipping one row. After testing from the start to chip (A), chip (B) is skipped, and the probe is moved to chip ( Move to c) and perform probing in the direction of the arrow shown in the figure. Probing in the Y-axis direction is normally performed one chip at a time, and a program for skipping one chip when moving to the X-axis direction is incorporated into the controller (10) on the automatic prober (8) to control the probing.

[Problem to be solved by the invention 1] In high-yield IC wafers, the peripheral chips on the IC wafer are often defective, but the chips on the inside are mostly good, so all chips are not tested, and the chips on the inside are Testing by sampling has the effect of shortening test time. However, when testing a specific chip on an IC wafer using the conventional automatic blow μ, it was necessary to control the blowing method using a test program, a special program on the automatic prober, or the like.

This invention was made in order to solve the above problems, and the purpose is to obtain an automatic blowing μ that can change the blowing method depending on whether the chip is good or defective without performing any program processing. shall be.

[Means and effects for solving the problem j The automatic blow μ according to the present invention uses the Gf5/NG signal received from the tester after testing the chip to control the blowing of the automatic blow μ. It has a function to blow the chips around the defective chip and terminate the test if the chips are good.

[Example 1 An embodiment of the present invention will be described below with reference to the drawings.

Fig. 1 is a conceptual diagram of the connection between an automatic blow μ and a tester showing an embodiment of the present invention, and Fig. 2 is an I diagram showing an embodiment of the invention.
Figure 1 and Figure 3 of the probing method for C wafers are shown in Figure 2.
It is an explanatory view showing each procedure by the brobbing method of the figure.

When testing a chip on an IC wafer, the tester (7) sends a start signal (14) to the external interface (9) of the automatic blow μ (8), as shown in FIG. ) transmits a start signal (14) to the controller (lO). When the controller (10) receives the start signal (14), the loader (12) and 1
0-7"; l Chi VB (13) is operated to control the blow bin. When the test is completed, the GO/NG signal (16) is sent from the tester (7) to the external interface (9).
However, the external interface (9) not only stores the Go/NG signal in the memory (11) but also transmits it to the controller (10), which in turn sends the Go/NG signal to the Gf5/NG signal.
Depending on the contents of ## (16), the probing method is changed and the probe station (13) is controlled.

For IC wafers with a low defective rate, it is possible to sample and test several chips without testing all the chips.

For example, as shown in FIG. 2, chips (1) to (5) are sampled from all the chips on an IC wafer (6) and tested. At this time, the automatic blow μ (8) receives the chip Gin/NG signal (16) from the tester (7). After testing the chip (1), if the G signal (16) from the tester is good, the controller (10) controls the glove station (13) and tests the chip (2).
Hederoping. After testing the chip (2), if it is a good product, the test is performed on the chip (3), and then the test is continued up to the chip (5), and if all five chips are good, the test for this IC wafer is completed.

If there is a defective chip among the chips (1) to (5), the controller (10) causes the probe station (
13). For example, if chip (1) is defective, chips (A) (B) (
C)) Probe and test each. Chip (A) CB) t, if the DJ is defective, the chip marked Q in Figure 3 etc., that is, the chip (A) (B)
Test the top, bottom, left and right chips of ). Testing is carried out in this manner until there are no defective chips as shown in FIGS. 3(C), (d), and (e). The chips marked with 0 in FIG. 3 are the chips to be tested, and the diagonally shaded chips are defective chips.

Note that although the above embodiment shows the case where chips (1) to (5) are sampled, the sampling chip may be any chip on the IC wafer, and is selected according to the defect distribution characteristics of the IC wafer. Just do it like this.

[Effect of the invention j As described above, according to the present invention, the a5/n from the tester
Since it is configured to control the automatic blow μ blowing using the o signal, there is no need to process a test program to control the blowing, and it is especially effective when defects are distributed in island shapes on the IC wafer. do.

[Brief explanation of the drawing]

Fig. 1 is a conceptual diagram of the connection between an automatic prober and a tester showing an embodiment of the present invention, and Fig. 2 is an I diagram showing an embodiment of the invention.
An explanatory diagram of the probing method for C wafers, Fig. 3G), (
b), (c), (d), and (e) are explanatory diagrams showing each probing procedure in Fig. 2, Fig. 4 is a conceptual diagram of the connection between a conventional automatic prober and a tester, and Fig. 5 is a conventional FIG. 2 is an explanatory diagram showing an IC wafer probing method. In the figure, (1) to (5) are chips, (6) are IC wafers, (7) are testers, (8) are automatic probers, and (9)
is an external interface, (10) is a controller, (
11) is the memory, (12) is the loader, (13) is the probe station, (14) is the start signal, (15) is the end signal, (16) is the aQ/No signal, (a) (b) (
C) is a chip. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] An automatic prober for testing IC wafers, which performs probing around defective chips based on the test results of representative chips on the IC wafer.