JPH02155759A - Clock signal transmission method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a reference signal sending method for a laser beam printer, and particularly to a reference signal sending method that is effective even during high-speed operation.

[Conventional technology]

FIG. 2 is a schematic basic configuration diagram showing the operating principle of a laser beam printer.

In FIG. 2, a video signal from a video signal generating device 11, which is a video signal generating means for generating data information to be printed, is amplified by a video amplifier 1 and drives a laser diode 2.

The laser beam modulated by the video signal is shaped by a coupling lens 3, reflected by a polygon mirror 5 which is rotated at high speed by a scanner motor 4, passes through an f-theta lens 6, and passes onto a photoreceptor drum 7. Print data is imaged on the drum surface by scanning at a constant speed. The created image is transferred and printed onto plain paper printing paper by a xerographic process (not shown).

The configuration from this modulation to transfer printing is related to a printing means that prints a laser beam signal modulated by a video signal on printing paper as a light and shaded color, and also includes a scanner motor 4. Polygon mirror 5. f-
The lens 6 and the like are related to deflection means that scans the laser beam in the width direction (horizontal direction) of the printing paper indicated by the arrow in the figure using a rotating polygon mirror or the like. Therefore, the video signal of such a laser beam printer is scanned in the horizontal direction (raster) and rotated in the drum rotation direction by the rotation of the photosensitive drum 7, as shown in FIG. It is generated as dot information in synchronization with vertical scanning.

The timing of the video signal output start position for each raster is generally determined by detecting when the laser light reaches the writing start position in the horizontal scanning direction, that is, the horizontal printing start position.

That is, an analog signal (BDT signal, raster phase synchronization circuit 10 based on the beam detector signal)
Normally, positional deviations are digitally minimized by using a clock that is an integral multiple of the basic clock frequency used in the video signal generator 11, which is generated through a circuit that operates digitally. .

Note that the photosensitive drum 7 is equipped with a normal paper feeding mechanism for transporting printing paper in a direction perpendicular to the horizontal scanning direction.

Here, FIG. 4 is a print example diagram showing print examples when the writing timings of horizontal scanning correctly match and when they do not match, and as an example, the character rl? This is a case where J is printed, and (a) is an example where the writing start positions of each raster are aligned.

(b) is an example in which the writing start position of each raster is shifted,
If the writing start position is shifted, normal printing will not be possible.

In the above, as mentioned above, the video signal generator 11 uses a clock that is an integer multiple of the basic clock frequency used to minimize the deviation of the printing position, and the clock that is an integer multiple of the used basic clock frequency is generally used. Usually, it is selected to be 6 to 8 times higher.

FIG. 5 shows an example of a general raster phase synchronization circuit in which an integer multiple clock is multiplied by 8, and FIG. 6 shows a timing chart of FIG. 5.

In FIG. 5, the divide-by-8 counter 12 is set when the BDT signal is L.
It is cleared when the BDT signal is at the H level, and after the BDT signal becomes the H level, frequency division by 8 is started by the output signal CP from 08C13. The timing chart in FIG. 6 shows this operation. In Fig. 6, the divide-by-8 counter 1 in Fig. 5
Assuming that 2 operates on the rising edge, the rising edge of the BDT signal (timing at which clearing of the divide-by-8 counter 12 is released) is within one cycle of the CP multiplication signal (in the figure, it is 1).

If the hatched part of the BDT signal), then fs times the signal CP
The double signal is compared and output from a certain position.

Here, if the BDT signal is the physical position of the printer body, the phase of the signal will be shifted fs times compared to the physical position. In this example, one period of the CP times signal is one period of the fs times signal. By being 8 times as large as , a maximum deviation of 1/8 of one period of the fs times signal occurs.

In this way, the physical scanning position of the laser is detected using the BDT signal, and the raster phase synchronization circuit 10 creates the basic clock frequency used in the video signal generator 11 based on the BDT signal.

Here, if we consider the case where the video signal generator 11 and the raster phase synchronization circuit 11 are separated from each other as shown in FIG. A line receiver 16.17 is used on the receiving side. However, when a laser beam printer is operated at high speed, the frequency of the tarock signal increases, and as shown in the time chart of FIG. 8, the phase of the BDT signal and clock signal in the transmission system becomes a problem. Figure 8 shows B based on the clock signal.
This shows the phase difference of the DT signal. When the phase difference (t2 or shi3) between the BDT signal and the clock signal becomes larger than the half period t4 of the clock signal, the video signal generator 1i11 generates a position shift of the video data. When this is printed, a deviation of an integral multiple of one dot occurs, which is larger than the deviation corrected by the raster phase synchronization circuit described above (in Fig. 8, the deviation of the video signal generator 11
An example of a configuration in which the raster phase synchronization circuit 10 side transmits at the rising edge of the clock signal so that the BDT signal, which is the reference position signal, can be accurately detected on the side, and the video signal generator 11 side detects it at the rising edge of the clock signal. ).

[Issues that Hatsugo tries to solve]

The above-mentioned conventional technology does not take into account the speeding up of the clock signal, and there is a problem in that the printed image is distorted due to the phase shift.

[Means to solve the problem]

The above object is achieved by halving the frequency of the clock signal and making the phase difference negligible.

〔Example〕

FIG. 1 shows a frequency divider circuit 18 according to an embodiment of the present invention.
The basic clock) signal is frequency-divided by two, and the line driver 17 sends the clock output signal to the video signal generator 11. The flip-flop 19 samples the BDT input using the clock signal divided by the frequency dividing circuit 18 and outputs the BD signal.
It is sent to the video signal generator 11 by the line driver 16 as a T output. In addition, the BDT input signal is input to the CLR (clear) terminal of the frequency dividing circuit 18 to eliminate the phase difference between the fsC basic clock) signal and the BDT input signal.

To explain the operation in detail using FIGS. 1 and 9, the CLR (clear) terminal of the divide-by-1 circuit 18 has a BDT input signal and
is input, and the clock output signal which is the output of the frequency dividing circuit 18 is at L level while the BDT input signal is at L level, and the first fsc basic clock after the BDT input signal changes to H level) (: At the falling edge of the i signal, the frequency dividing circuit 18
starts operating and creates a clock output signal by dividing the frequency of the fsc (basic clock) signal by two. This clock output signal whose frequency has been divided by two is input to the CLK (clock input) terminal of the flip-flop 19, and the BDT signal connected to the D (data) input terminal is sampled. Create a BDT output signal without the

FIG. 10 shows the waveforms of the clock signal and BDT signal on the video signal generator W111 side. Similar to FIG. 8, this shows the phase difference of the BDT signal with respect to the tarok signal.

Similarly to FIG. 8, tz and ta in FIG. 10 are phase differences in the transmission system between the raster phase synchronization circuit 10 and the video signal generator 11. t6 is about twice the conventional phase tolerance value 4. Using the clock signal sent out in this way, the video signal generator 11 creates video data from the first falling edge of the clock signal, and by using the falling edge and rising edge of the clock signal in order, the same video data as before A signal can be created.

〔Effect of the invention〕

According to the present invention, it is possible to approximately double the allowable phase difference in the transmission system between the raster phase synchronization circuit 10 and the video signal generator 11, and it is possible to transmit a faster clock signal than in the past. .

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a schematic basic configuration diagram of a laser beam printer, FIG. 3 is a diagram showing an example of printed characters, and FIG. 4 is a diagram showing an example of printing. , FIG. 5 is a raster phase synchronization circuit diagram, FIG. 6 is a time chart showing the operation of FIG. 5, FIG. 7 is a diagram showing the signal transmission system, FIG. 8 is a time chart of FIG. 5, and FIG. The figure is the time chart of FIG. 1, and FIG. 10 is the time chart of FIG. 1. 1...Video amplifier, 2...Laser diode-1.
, 3... Combined lens, 4... Scanner motor, 5...
・Polygon mirror, 6...f-theta lens, 7...photosensitive drum, 8...photo sensor, 9...sensor amplifier, 1
0... Raster phase synchronization circuit, 11... Video signal generator, 12... 8 frequency division counter, 13... OSC (
Oscillator), 14°15... Line driver, 16.1
7...Line ratio Figure 4 Cause Horizontal F, Dansui Sembiki Bean factor Figure 5 Figure 6 Diagram a Flood n Figure 7 Figure 9 Figure 8 Figure 10 factor

Claims (1)

[Scope of Claims] 1. A clock signal transmission method that transmits a clock signal and a reference signal for the clock signal, the clock signal being transmitted with the frequency of the clock signal halved. 2. The clock signal transmission system according to claim 1, characterized in that the rising and falling edges of the clock signal are utilized on the receiving side of the transmitted signal.