JPH0216480A - Tracked signal deciding circuit for radar countermeasuring equipment - Google Patents

Tracked signal deciding circuit for radar countermeasuring equipment

Info

Publication number
JPH0216480A
JPH0216480A JP16575688A JP16575688A JPH0216480A JP H0216480 A JPH0216480 A JP H0216480A JP 16575688 A JP16575688 A JP 16575688A JP 16575688 A JP16575688 A JP 16575688A JP H0216480 A JPH0216480 A JP H0216480A
Authority
JP
Japan
Prior art keywords
input
pulse
signal
radar
tracked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16575688A
Other languages
Japanese (ja)
Inventor
Shigeru Imai
茂 今井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16575688A priority Critical patent/JPH0216480A/en
Publication of JPH0216480A publication Critical patent/JPH0216480A/en
Pending legal-status Critical Current

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  • Radar Systems Or Details Thereof (AREA)

Abstract

PURPOSE:To correctly decide whether a signal is tracked or not even with respect to a signal whose input level is high by controlling the input data by amplitude. CONSTITUTION:When pulse data having data of pulse width and pulse amplitude is inputted from an input terminal, an input controller 2 allows only a pulse having pulse amplitude exceeding a threshold level to pass through, and eliminated a pulse being under the threshold level. A signal detecting circuit 3 detects a pulse train radiated from the same radar, as a signal by a frequency, a pulse arrival time and pulse width data with regard to the pulse passing through the input controller 2. A continuous input deciding circuit 4 measures the frequency of a signal, decides whether the signal is a continuous input or not, and controls a threshold level of the input controller 2 in accordance with its result. A deciding circuit 5 outputs whether the signal is tracked or not a in accordance with whether the threshold level for controlling the input controller 2 is the upper limit value or not.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、電波探知の分野に関し、特にレーダ逆探知
装置の被追尾判定回路の改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the field of radio wave detection, and particularly to an improvement of a tracked determination circuit of a radar reverse detection device.

〔従来の技術〕[Conventional technology]

従来のレーダ逆探知装置の被追尾判定回路は第5図に示
すように構成されていた。図において、1は入力端であ
り、3は信号検出回路、4は連続入力判定回路、6は判
定結果を出方する出方端である。
A tracking determination circuit of a conventional radar reverse detection device is configured as shown in FIG. In the figure, 1 is an input end, 3 is a signal detection circuit, 4 is a continuous input determination circuit, and 6 is an output end for outputting determination results.

次に動作について説明する。周波数、パルス到来時刻、
パルス幅、およびパルス振幅のデータを持ったパルスデ
ータが入力端1がら入力されると、信号検出回路3は周
波数、パルス到来時刻、パルス幅データにより、同一レ
ーダがら放射されたパルス列を信号として検出する。連
続入力判定回路4は信号を検出する頻度を測定し、信号
が時間的に連続して入力されたが否かを判定し、連続久
方ならば、被追尾である旨を出力端6がら出力する。
Next, the operation will be explained. frequency, pulse arrival time,
When pulse data with pulse width and pulse amplitude data is input from the input terminal 1, the signal detection circuit 3 detects the pulse train emitted from the same radar as a signal based on the frequency, pulse arrival time, and pulse width data. do. The continuous input determination circuit 4 measures the frequency of signal detection, determines whether the signals are input continuously over time, and if the signals are input continuously for a long time, outputs a message indicating that the signal is being tracked from the output terminal 6. do.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のレーダ逆探知装置の被追尾判定回路は以上のよう
に構成されているので、逆探知しようとするレーダが近
接している場合、そのサイドローブを受信してしまうた
め、被追尾の状態でなくとも入力信号は第2図に示すよ
うに連続となってしまい、誤って被追尾と判定してしま
うという問題点があった。
The tracking determination circuit of the conventional radar reverse detection device is configured as described above, so if the radar that is attempting reverse detection is nearby, its side lobe will be received, so it will not be possible to detect the tracked state. At the very least, there is a problem in that the input signal becomes continuous as shown in FIG. 2, and it is erroneously determined that the object is being tracked.

この発明は、上記のような従来のものの問題点を解消す
るためになされたもので、近接しているレーダに対して
も、被追尾か否かの判定が正しくできるレーダ逆探知装
置の被追尾判定回路を得ることを目的としている。
This invention was made in order to solve the problems of the conventional ones as described above, and it is possible to accurately determine whether or not the radar is being tracked even when the radar is in close proximity. The purpose is to obtain a judgment circuit.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係るレーダ逆探知装置の被追尾判定回路は、
被追尾判定回路にパルス入力制御器を追加し、パルス振
幅により入力パルスを制御し、そのスレッショルドレベ
ルにより被追尾か否かの判定を行なうようにしたもので
ある。
The tracked determination circuit of the radar reverse detection device according to the present invention includes:
A pulse input controller is added to the tracked target determination circuit, the input pulse is controlled by the pulse amplitude, and whether or not the tracked target is determined is determined based on the threshold level.

〔作用〕[Effect]

この発明における被追尾判定回路は、入力信号が連続か
間欠かを判定し、その結果に応じて入力信号のスレッシ
ョルドレベルを制御し、スレッショルドレベルと(入力
信号の最大振幅−規定値)とを比較することにより、被
追尾の判定を行なうようにしたので、被追尾状態にない
レーダ信号が高レベルで常時入力されたとしても被追尾
状態でない旨正しく判定できる。
The tracked determination circuit in this invention determines whether the input signal is continuous or intermittent, controls the threshold level of the input signal according to the result, and compares the threshold level with (maximum amplitude of input signal - specified value). By doing this, it is determined whether the vehicle is being tracked, so even if a radar signal that is not in the tracked state is constantly input at a high level, it can be correctly determined that the vehicle is not in the tracked state.

〔実施例〕〔Example〕

以下、この発明の実施例を図について説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図は本発明の一実施例によるレーダ逆探知装置の被
追尾判定回路を示し、図において、第5図と同一符号は
同一のものを示す。1はパルスレーダの入力端であり、
2は入力端1から入力したデータを振幅に応じて入力制
御する入力制御器、5は判定回路である。また、3,4
.6はそれぞれ従来のものと同様の信号検出回路、連続
入力判定回路、出力端である。
FIG. 1 shows a tracking determination circuit of a radar reverse detection device according to an embodiment of the present invention, and in the figure, the same reference numerals as in FIG. 5 indicate the same parts. 1 is the input terminal of the pulse radar,
Reference numeral 2 represents an input controller that controls the input of data input from the input terminal 1 according to the amplitude, and 5 represents a determination circuit. Also, 3,4
.. Reference numerals 6 denote a signal detection circuit, a continuous input determination circuit, and an output terminal, respectively, which are similar to the conventional ones.

次に動作について説明する。周波数、パルス到来時刻、
パルス幅およびパルス振幅のデータを持ったパルスデー
タが入力端1から入力されると、入力IJ?B12はス
レッショルドレベル以上のパルス振幅をもつパルスのみ
を通過させ、スレッショルドレベル未満のパルスを除去
する。信号検出回路3は入力制御器2を通過したパルス
について周波数、パルス到来時刻、パルス幅データによ
り同一レーダから放射されたパルス列を信号として検出
する。連続入力判定回路4は信号を検出する頻度を測定
し、信号が連続入力であるか否かを判定し、その結果に
応じて、入力制御器2のスレッショルドレベルを制御す
る。
Next, the operation will be explained. frequency, pulse arrival time,
When pulse data having pulse width and pulse amplitude data is input from input terminal 1, input IJ? B12 allows only pulses with pulse amplitudes above the threshold level to pass through, and removes pulses below the threshold level. The signal detection circuit 3 detects a pulse train emitted from the same radar as a signal based on the frequency, pulse arrival time, and pulse width data of the pulses that have passed through the input controller 2. The continuous input determination circuit 4 measures the frequency of signal detection, determines whether the signal is a continuous input, and controls the threshold level of the input controller 2 according to the result.

すなわち、判定回路4が連続入力と判定している間は、
入力制御器2は規定時間毎にスレッショルドレベルを規
定レベルずつ上げてゆき、連続入力でないと判定してい
る間は規定レベルずつ下げて行く。ただしスレッショル
ドレベルの上限は信号検出回路において検出された信号
の最大振幅値からある規定値を減じた値とする。判定回
路5では入力制御器2を制御するスレッショルドレベル
が上限値である場合、被追尾である旨を出力端6に出力
し、上限値でない場合、被追尾でない旨を出力する。
That is, while the determination circuit 4 determines that the input is continuous,
The input controller 2 increases the threshold level by a specified level at specified time intervals, and decreases the threshold level by a specified level while determining that the input is not continuous. However, the upper limit of the threshold level is set to a value obtained by subtracting a certain specified value from the maximum amplitude value of the signal detected by the signal detection circuit. In the determination circuit 5, when the threshold level for controlling the input controller 2 is the upper limit value, it outputs to the output end 6 that the object is being tracked, and when it is not the upper limit value, it outputs that the object is not being tracked.

以下、第3図を用いて具体的に説明する。同図(a)は
近接している被追尾でないレーダからの入力信号を示す
、この場合、初期のスレッショルドレベルは下限値であ
るため連続入力と判定し、このため、その結果によりス
レッショルドレベルは徐々に上がり、やがて平衡点に達
するが、スレッショルドレベル−上限値でないので、被
追尾でない旨を出力する。また同図(b)に被追尾のレ
ーダがらの入力信号を示す、この場合、初期のスレッシ
ョルドレベルは下限値であるが、常に連続入力と判定さ
れるので、やがてスレッショルドレベル−上限値となり
、被追尾の旨を出力する。
A detailed explanation will be given below using FIG. 3. Figure (a) shows an input signal from a nearby radar that is not being tracked. In this case, since the initial threshold level is the lower limit value, it is determined to be a continuous input, and as a result, the threshold level gradually increases. , and eventually reaches an equilibrium point, but since it is not the threshold level - the upper limit value, a message indicating that it is not being tracked is output. In addition, the input signal from the radar being tracked is shown in FIG. Outputs tracking information.

なお、被追尾でない場合、入力制御器2を制御するスレ
ッショルドレベルは平均サイドローブの入力レベルと等
しくなるので、第4図に示すように距離算出回路7を付
加することにより、レーダとの距離を算出することがで
きる。
Note that when not being tracked, the threshold level for controlling the input controller 2 is equal to the average sidelobe input level, so by adding a distance calculation circuit 7 as shown in FIG. 4, the distance to the radar can be calculated. It can be calculated.

その際の算出式は下記に示すものである。ただし、レー
ダ実効放射電力とサイドローブレベル比およびレーダ波
の波長はプリセットされているものとする。
The calculation formula at that time is shown below. However, it is assumed that the radar effective radiation power, sidelobe level ratio, and radar wave wavelength are preset.

距離=(λ/4π)・ (ERP  −5L/PA)”
”(1/L) 但しERP: レーダ実効放射電力 SL: サイドローブレベル比 λ: レーダ波の波長 PA:平均サイドローブ入力レベル L:受信系損失(定数) 〔発明の効果〕 以上のように、この発明に係るレーダ逆探知装置の被追
尾判定回路によれば、入力データを振幅により制御する
ように構成したので、入力レベルの高い信号に対しても
、被追尾か否かの判定が正しくできるという効果がある
Distance = (λ/4π)・ (ERP -5L/PA)”
” (1/L) However, ERP: Radar effective radiation power SL: Sidelobe level ratio λ: Radar wave wavelength PA: Average sidelobe input level L: Receiving system loss (constant) [Effects of the invention] As described above, According to the tracked target determination circuit of the radar reverse detection device according to the present invention, since the input data is controlled by the amplitude, it is possible to correctly determine whether or not the tracked target is being tracked even for a signal with a high input level. There is an effect.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例によるレーダ逆探知装置の
被追尾判定回路の構成図、第2図は近接レーダ信号の入
力例を示す図、第3図は信号入力とスレッショルドレベ
ルとの対応を示す図、第4図は本発明の他の実施例を示
す図、第5図は従来のレーダ逆探知装置の被追尾判定回
路の構成図である。 図において、1は入力端、2は入力制御器、3は信号検
出回路、4は連続入力判定回路、5は判定回路、6は出
力端である。
FIG. 1 is a configuration diagram of a tracking determination circuit of a radar reverse detection device according to an embodiment of the present invention, FIG. 2 is a diagram showing an example of inputting a proximity radar signal, and FIG. 3 is a correspondence between signal input and threshold level. FIG. 4 is a diagram showing another embodiment of the present invention, and FIG. 5 is a configuration diagram of a tracked determination circuit of a conventional radar reverse detection device. In the figure, 1 is an input end, 2 is an input controller, 3 is a signal detection circuit, 4 is a continuous input determination circuit, 5 is a determination circuit, and 6 is an output end.

Claims (1)

【特許請求の範囲】[Claims] (1)レーダ信号を受信し認識処理して出力するレーダ
逆探知装置に設けられ、被探知レーダから追尾されてい
るか否かの判定を行なう回路であって、 レーダ信号が時間的に連続して入力されたか否かを判定
する連続入力判定回路と、 該連続入力判定回路の判定結果に応じて閾値を変化させ
て入力レーダ信号を制限する入力制限器と、 上記閾値と入力レーダ信号の最大振幅に応じた値とが一
致しているか否かに応じて被追尾か否かを判定する判定
回路とを備えたことを特徴とするレーダ逆探知装置の被
追尾判定回路。
(1) A circuit that is installed in a radar reverse detection device that receives radar signals, performs recognition processing, and outputs them, and that determines whether or not the radar being detected is tracking the radar signal. a continuous input determination circuit that determines whether or not an input has been input; an input limiter that limits the input radar signal by changing a threshold according to the determination result of the continuous input determination circuit; and the threshold and the maximum amplitude of the input radar signal. What is claimed is: 1. A tracking determination circuit for a radar reverse detection device, comprising: a determination circuit for determining whether or not a target is being tracked depending on whether or not a value corresponding to .
JP16575688A 1988-07-01 1988-07-01 Tracked signal deciding circuit for radar countermeasuring equipment Pending JPH0216480A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16575688A JPH0216480A (en) 1988-07-01 1988-07-01 Tracked signal deciding circuit for radar countermeasuring equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16575688A JPH0216480A (en) 1988-07-01 1988-07-01 Tracked signal deciding circuit for radar countermeasuring equipment

Publications (1)

Publication Number Publication Date
JPH0216480A true JPH0216480A (en) 1990-01-19

Family

ID=15818460

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16575688A Pending JPH0216480A (en) 1988-07-01 1988-07-01 Tracked signal deciding circuit for radar countermeasuring equipment

Country Status (1)

Country Link
JP (1) JPH0216480A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04143687A (en) * 1990-10-04 1992-05-18 Nec Corp Radar signal processor
JP2007225377A (en) * 2006-02-22 2007-09-06 Mitsubishi Electric Corp Radio wave detector

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04143687A (en) * 1990-10-04 1992-05-18 Nec Corp Radar signal processor
JP2007225377A (en) * 2006-02-22 2007-09-06 Mitsubishi Electric Corp Radio wave detector

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