JPH02165655A - Manufacture of semiconductor device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a semiconductor device that is effective for reducing inter-wiring capacitance in electrodes and wiring, the present invention provides a structure in which the interconnects can be insulated and separated by air, and furthermore, the structure is obtained. The purpose of this method is to eliminate the need for complicated processes, and the process involves forming electrodes and wiring on the surface of an insulating film on a semiconductor substrate, and then tilting the semiconductor substrate with a target made of an insulating material. forming an interlayer insulating film on the surface with a space interposed between the electrodes and wirings by depositing a film by sputtering or vapor deposition while facing the semiconductor substrates and rotating the semiconductor substrates; The structure includes a step of forming an insulating film to fill in the unevenness of the surface and flattening the surface.

[Industrial application field]

The present invention relates to a method of manufacturing a semiconductor device that is effective in reducing inter-wiring capacitance between electrodes and wiring.

As semiconductor devices become more highly integrated and faster, signal delays due to wiring resistance and inter-wiring capacitance have become a problem.

One way to reduce wiring resistance is to use a low-resistance material, but in this case, there are restrictions on the process, so what can be achieved is limited.

In order to reduce the capacitance between interconnects, the relative permittivity of the material intervening between the interconnects is a problem, but in recent years, interconnects have become multilayered, and in that case, flattening the interlayer insulating film is important. ,
Various techniques have been proposed for reliably embedding between wires. However, the materials used are often silicon dioxide (SiOz), which has a dielectric constant of about 4.
In order to reduce the inter-wiring capacitance, it is necessary to use a material with an even lower dielectric constant.

[Conventional technology]

The interlayer insulating film in conventional semiconductor devices achieves flattening by reliably burying the spaces between the interconnects, so unless an interlayer insulating film with a low dielectric constant is used,
Inter-wiring capacitance cannot be reduced.

Therefore, for example, polyimide (relative permittivity: 3.4
~4), or 5iBN (relative permittivity: 3.2~3.8
), but even if you do that,
The inter-wiring capacitance decreases by only about 374 points.

Furthermore, as a means to actively reduce the inter-wiring capacitance, a structure in which the wiring is separated from the interlayer insulating film and suspended in the air (relative dielectric constant of air: 1) has been proposed, but the manufacturing method is extremely difficult. It is complex and does not align well with current processes.

[Problem to be solved by the invention]

As described above, the conventional techniques have problems such as not being able to achieve a sufficient reduction in inter-wiring capacitance, or being subject to significant process constraints.

The present invention provides a structure in which wiring can be insulated and separated by air, and does not require a complicated process to obtain this structure.

[Means to solve the problem]

1 and 2 are cross-sectional side views of a semiconductor device and necessary parts at key points in the process for detailed explanation of the present invention. Incidentally, when implementing the present invention, it is preferable to use a sputtering apparatus.

In the figure, l is a silicon semiconductor substrate, 2 is a phosphosilicate glass
3 is an electrode/wiring made of aluminum alloy, 4 is an insulating film made of silicon dioxide, 5 is a space between the wirings, 6 is SOG (spin o
TG represents a target made of an insulating material such as silicon dioxide, PL represents plasma, and PC represents sputtered silicon dioxide particles flying from the target.

In the present invention, as seen in FIG. 1, the silicon semiconductor substrate 1 and the target TG are arranged in a relatively inclined state, and the silicon semiconductor substrate 1 is configured to rotate. Incidentally, it is preferable that this inclination is, for example, about 60'' to 80@.

It is now assumed that an interlayer insulating film 2 made of PSG has been formed on a silicon semiconductor substrate 1, and that electrodes and interconnections 3 have been formed on the interlayer insulating film 2.

Next, the silicon semiconductor substrate 1 is set in a sputtering device, and an interlayer insulating film 4 is formed by a sputtering method.

In general, in the sputtering method, the number (mTOr')
In many cases, a pressure of It flies only from

In such a situation, the sputtered particles PC
The number of layers that reach the exposed interlayer insulation WAz is very small compared to the number that reaches the top surface of the electrode/wiring 3, so the interlayer insulation film 4 gradually forms an eaves-like structure over the electrode/wiring 3. It is formed so as to overhang and close the entire surface while leaving a space 5 between the electrodes and the wiring 3.

After this, as shown in FIG. 2, an SOG film 6 is formed and planarized.

The illustrated SOG film 6 is formed using a normal spin coating method.

For this reason, in the method for manufacturing a semiconductor device according to the present invention, an insulating film (for example, an interlayer insulating film 2 made of PSG) on a semiconductor substrate (for example, a silicon semiconductor substrate 1) is used.
A step of forming electrodes/wirings (for example, electrodes/wirings 3 made of aluminum alloy) on the surface, and then facing the semiconductor substrate at an angle with a target made of an insulating material (for example, target TG made of silicon dioxide), In addition, a film is deposited by sputtering or vapor deposition while rotating the semiconductor substrate, and an interlayer insulating film (for example, an interlayer insulating film made of silicon dioxide) is formed on the surface with a space (for example, a space 5) interposed between the electrodes and wirings. The structure includes a step of forming a film 4), and a step of forming and planarizing an insulating film (for example, an SOC film 6) to fill in the irregularities on the surface of the core interlayer insulating film.

[Effect]

By adopting the above method, most of the space between the electrodes and the wiring is insulated and separated by air, which has a dielectric constant of 1.
The capacitance between electrodes and wiring is small, so signal delay can be reduced, and no special process is required to form the structure, so it can be easily implemented. Since it is planarized, it is possible to easily realize a multilayer electrode/wiring structure, which is effective for increasing the integration and density of semiconductor devices, as well as increasing their speed.

〔Example〕

FIG. 3 shows an explanatory view of the main parts of a high frequency sputtering apparatus used when forming an interlayer insulating film according to the present invention.

In the figure, RC is a reaction chamber, IM is a gas inlet pipe, EX is a gas exhaust pipe, ST is a stage, TG is a target made of silicon dioxide, MG is a magnet, RG is a high frequency power supply, and WF is a semiconductor wafer. It shows.

In this high frequency sputtering device, the semiconductor wafer WF
rotates at an angle with respect to the target TG. The material of the target TG is here silicon dioxide, and although not shown, a high frequency magnetron type sputtering gun is used to generate sputtered particles.

4 to 6 are cross-sectional side views of essential parts of a semiconductor device at key points in the process for explaining one embodiment of the present invention.

See Figure 4 (1) Chemical vapor deposition (chemical vap).

By applying a deposition (CVD) method, a thickness of, for example, 500 mm is deposited on a silicon semiconductor substrate.
An interlayer insulating film 2 made of PSG of approximately 0 (person) is formed.

(2) By applying a sputtering method, an aluminum alloy film having a thickness of, for example, about 7,000 mm is formed.

(3) By using ordinary photolithography technology, the aluminum alloy film is patterned so that the lines and spaces are 0. 5 [μm] electrode/wiring 3 is formed.

See FIG. 5 (4) A silicon semiconductor substrate 1 is set in the high frequency sputtering apparatus shown in FIG. 3, and sputtering is performed in the same manner as described above to form an insulating film 4 made of silicon dioxide.

The thickness of the insulating film 4 formed here is, for example, about 5 mm on the surface of the electrode/wiring 3.

Refer to FIG. 6. (5) By applying a spin coating method, a SOG film 6 having a thickness of, for example, 3000 mm is formed and planarized.

In the embodiment described above, aluminum alloy was used as the material for the electrode and wiring A3; however, other suitable materials such as
A high melting point metal such as tungsten or its silicide can be used, and sputtering to form the interlayer insulating film 4 can be performed using a facing target type high frequency sputtering device, or an electron beam (rather than sputtering method) can be used. EB) A vapor deposition method may be applied.

〔Effect of the invention〕

In the method for manufacturing a semiconductor device according to the present invention, electrodes and wiring are formed on a semiconductor substrate, and a film is deposited while the semiconductor substrate is tilted to face a target made of an insulating material and the semiconductor substrate is rotated. to form an interlayer insulating film on the surface with a space interposed between the electrode and wiring,
An insulating film is formed to fill in the irregularities on the surface of the interlayer insulating film to flatten it.

By adopting the above configuration, most of the electrodes and wiring are insulated and separated by air, which has a relative permittivity of 1.
The capacitance between electrodes and wiring is small (therefore, signal delay can be reduced, and no special process is required to form the structure, so it can be easily implemented. Since the surface is flattened, it is possible to easily realize a multilayer electrode/wiring structure, which is effective for increasing the integration and density of semiconductor devices, as well as increasing their speed.

[Brief explanation of the drawing]

1 and 2 are cross-sectional side views of a semiconductor device and necessary parts at key points in the process for detailed explanation of the present invention;
FIG. 3 is an explanatory diagram of the main parts of a high frequency sputtering apparatus used when forming an interlayer insulating film according to the present invention, and FIGS. 4 to 6 are diagrams showing important parts of the process for explaining one embodiment of the present invention. 3A and 3B each represent a cutaway side view of a main part of a semiconductor device. In the figure, RC is a reaction chamber, IM is a gas inlet pipe, EX is a gas exhaust pipe, ST is a stage, TG is a target made of silicon dioxide, MG is a magnet, RG is a high frequency power supply, WF is a semiconductor wafer, 1 is a silicon semiconductor substrate, 2
3 indicates an interlayer insulating film, 3 an electrode/wiring, 4 an interlayer insulating film, 5 a space, and 6 an SOG film. Patent Applicant: Fujitsu Ltd. Representative Patent Attorney Shoji Aitani Representative Patent Attorney Hiroshi Watanabe - Cutaway side view of semiconductor device and essential parts of essential parts Figure 1 Figure 3 Process outline for detailed explanation of the present invention 7i81) A cutaway side view of the main part of the semiconductor device and its necessary parts; FIG. 2; FIG. 4;

Claims (1)

[Claims] A step of forming electrodes and wiring on the surface of an insulating film on a semiconductor substrate, and then sputtering while the semiconductor substrate is tilted to face a target made of an insulator and the semiconductor substrate is rotated. Alternatively, there is a step of depositing a film such as vapor deposition to form an interlayer insulating film on the surface with a space interposed between the electrodes and wiring, and then forming an insulating film to fill in the irregularities on the surface of the interlayer insulating film to make it flat. 1. A method of manufacturing a semiconductor device, the method comprising: