JPH0216622B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to an automatic equalization method that detects solitary wave components from random input signals and performs equalization processing.

Prior Art and Problems The conventional bridged tap equalization method that equalizes an input signal with transmission distortion sets a training period and transmits a solitary wave signal as a training period within this period to reduce the waveform distortion of the solitary wave signal. The tap coefficients were corrected so as to equalize the data, communication was started at the end of the training period, and the corrected tap coefficients were held during the communication. At the time of this tap coefficient correction, since the amount of correction at one time is small even for a large equalization error amount, it is necessary to lengthen the training period in advance. That is, a training period must be set prior to communication, and it is not possible to correct equalization errors that vary during communication.

Purpose of the Invention An object of the present invention is to make it possible to omit the training period, to automatically perform tap coefficient correction even during communication, and to enable even faster equalization. That is. Examples will be described in detail below.

Composition of the Invention The present invention detects a solitary wave signal from a random input signal using the coding rules of the AMI signal, corrects the tap coefficient using this solitary wave signal, and sets a constant threshold of the equalization error amount. The amount of correction is made variable depending on the magnitude of the difference.

Embodiment of the Invention FIG. 1 is a block diagram of the main part of an embodiment of the present invention, and shows the case of two taps.
In the figure, 1 is an input terminal, 2 is an output terminal, 3 is a synthesis circuit, 4 and 5 are delay circuits, 6 and 7 are coefficient units,
8 is a coefficient setting circuit. The input signal applied to input terminal 1 is an AMI signal, and this AMI signal is
As a coding rule, a negative polarity signal follows a positive polarity signal, and a positive polarity signal follows a negative polarity signal, and coding is performed so that signals of the same polarity do not continue. For example, if the original signal is "101101", the transmitted signals are +1, 0, -1, +
1, 0, -1 to prevent signals of the same polarity from continuing. Therefore, even if a solitary wave signal in a random input signal changes into a continuous signal of the same polarity due to an echo component, the solitary wave signal can be detected.

The solitary wave signal is n before and after the +1 or -1 signal.
This is the case where the bit is 0, for example, 0, +1, 0,
If +1 of 0 is a solitary wave signal, it may become 0, +1, +1, 0 due to echo components, but since the same polarity signals should not be continuous, this is detected as a solitary wave signal. It is something.

The coefficient setting circuit 8 determines the polarity of the output signal of the combining circuit 3, detects whether it is a solitary wave signal or a distorted signal, and when a solitary wave signal is detected, converts the solitary wave signal into the same as the training signal. The tap coefficient is corrected using the tap coefficient, and the magnitude of the equalization error amount is determined by comparing it with a fixed threshold value, and when the equalization error amount is large, the correction amount is increased.

The output signal is delayed by the delay circuits 4 and 5, multiplied by the tap coefficient set by the coefficient setting circuit 8 by the coefficient multipliers 6 and 7, and the signal of the multiplication result and the input signal are synthesized by the synthesis circuit. The output signal equalized by step 3 is output from output terminal 2.

FIG. 2 is an explanatory diagram of a solitary wave signal and coefficient correction, and shows 0, +1, 0,
0 and 0, -1, 0, 0 signals are shown. Note that L is a threshold value, [ad] is an absolute value, and 1 indicates that it is larger than the threshold L at times (-T), (0), (T), and (2T), and 0 indicates that it is smaller. ]
is the polarity, with positive polarity being 1 and negative polarity being 0, ×
Since this is a case where the signal at time (-T) is sufficiently small compared to the threshold value L (corresponding to a signal of 0), this shows that any polarity is sufficient. Also, Δ is the coefficient correction book, t is the coefficient correction period, and the coefficient correction period is
By setting it to 2t, the coefficient correction amount becomes equivalently 2Δ. In each column (a) to (d), the upper row shows the first tap, and the lower row shows the second tap.

For example, the time (-T), (0), in column (a),
The absolute value [ad] of (T), (2T) is 0, 1, 1, 1
and the polarity [pol] is ×, 1, 1, 1 or ×, 0,
0, 0, so if we take time (0) as the bit of interest and compare the previous 1 bit and the subsequent 2 bits, the input signal will be 0, +1, +1, +1 or 0, -1,
This indicates a signal with a polarity of -1, -1, and since the next two bits from time (0) have the same polarity, the signal at time (0) is determined to be a solitary wave. Since the last two bits are larger than the threshold L, the coefficient correction periods for the first and second taps are set to 2t.
If the coefficient correction period is t, which is a unit time, and the coefficient correction amount is Δ, then the coefficient correction amount is Δ.If the coefficient correction period is 2t, which is twice the unit time, the coefficient is calculated for twice the period. Since the correction amount is Δ, the coefficient correction amount is equivalently 2Δ.

In column (b), the absolute value [ab] at each equalization point is 0, 1, 1, 0, the polarity [pol] is the same as column (a), and the coefficient correction period is is set to 2t for the first tap and t for the second tap. Therefore, the coefficient correction amount for the first tap is 2Δ, and the coefficient correction amount for the second tap is 2Δ.
The tap coefficient correction amount is Δ. In column (c), the absolute value [ab] at each equalization point is 0, 1,
0, 1, and the coefficient correction period of the first tap is t,
The coefficient correction period of the second tap is set to 2t. or
In column (d), the absolute value [ab] is 0, 1, 0,
0, and the coefficient correction periods of the first and second taps are set to t. No coefficient correction is performed for signal waveforms other than those in columns (a) to (d). In other words, coefficient correction is not performed when a solitary wave component is not detected, and coefficient correction is performed only when a solitary wave component is detected.In that case, if the equalization error amount is smaller than the threshold L, the coefficient correction amount is If the equalization error amount is larger than the threshold value L, the coefficient correction amount is increased.

As mentioned above, if the two below-mentioned bits of interest are larger than the threshold L, the coefficient correction amount of the first and second taps is set to 2Δ, and if only the following one bit is larger than the threshold value L, the coefficient correction amount of the first tap is set. 2Δ,
The coefficient correction amount of the second tap is Δ, and the following 1 bit is smaller than the threshold L, but the next 1 bit is smaller than the threshold L.
If it is larger than that, change the coefficient correction amount of the first tap to Δ,
The coefficient correction for the second tap is set to 2Δ, and if the subsequent two bits are both smaller than the threshold value L, the coefficient correction amounts for the first and second taps are set to Δ.

FIG. 3 is a block diagram of the main parts of the embodiment of the present invention, COMP1 is a comparison circuit that determines the polarity of a signal and outputs a polarity signal PL, COMP2 is a comparison circuit that compares the signal with a threshold L and outputs an absolute value signal. REG1 is a shift register that shifts the polarity signal PL from the comparator circuit COMP1 according to the clock signal CLK, and REG2 is a shift register that shifts the polarity signal PL from the comparator circuit COMP1 according to the clock signal CLK. Shift register shifted by signal CLK, FF1 to FF3 are flip-flops, CK in the shift register and flip-flop
is a clock terminal, D is a data terminal, Q is an output terminal, A1 and A2 are input terminals, and QA to QD are output terminals. Also, G1 to G20 are gate circuits, and G1 to G20 are gate circuits.
1 to G2 are exclusive NOR circuits, G3, G4, G8,
G9, G11 to G16 are AND circuits, G5, G
6, G17 to G20 are OR circuits, G7 is a NAND circuit, and G10 is a NOR circuit.

Also, the output signal H of the OR circuit G19 is the second tap coefficient correction signal, and the output signal I of the OR circuit G20 is the first tap coefficient correction signal.
The tap coefficient correction signal, the output signal J of the OR circuit G17, is the second tap coefficient correction period signal, the OR circuit G1
The output signal K of 8 becomes the first tap coefficient correction period signal.

The absolute value signal AB of the output of the comparator circuit COMP2 is
When the output signal D of the NAND circuit G7 is "1", the shift register is used as the output signal B of the AND circuit G8.
It is applied to the input terminal A2 of REG2 and is shifted by the clock signal CLK applied to the clock terminal CK. In the NAND circuit G7, when the output signals A and C of the OR circuit G5 and the OR circuit G6 are "1" and the absolute value signal AB is "1", the output signal D becomes "0", and the AND circuit G8 is closed and the absolute value is "1". value signal
AB will not be input to shift register REG2. When the output terminals QA to QD of shift register REG2 become "0100", NOR circuit G1
The output signal E of 0 becomes "1". In addition, flip-flops FF1 to FF3 receive the output signal D of the NAND circuit G7.
"0" is stored according to the clock signal CLK,
This is to set the coefficient correction period, and when the output terminal QD of shift register REG2 is "1", the output terminals Q of flip-flops FF2 and FF3 are "1".
Then, the output signal G of the AND circuit G11 and the output signal F of the AND circuit G12 become "1".

In FIG. 4, signals of various parts when the input signal IN corresponds to the signal waveform in column (a) of FIG. 2 are shown with the same symbols as the signals in FIG. 3. In this case, the input signal IN corresponds to the case where it is larger than the threshold value L at times (0), (T), and (2T), and the polarity signal PL and absolute value signal AB are PL and AB in Fig. 4, respectively. It will be shown. The polarity signal at each time is p
(i), the absolute value signal is denoted by y(i), (where i=-1,
0, 1, 2, ...), positive polarity is 1, negative polarity is 0, and if the absolute value signal greater than the threshold L is 1 and the signal smaller is 0, then the shift register REG1,
The contents of REG2 are REG1-QA~QD and REG2-
It will be as shown in QA~QD. For example, time (0)
, the polarity signal p(0); 1 and the absolute value signal y
(0); 1 is shifted to shift registers REG1 and REG2 at the rising edge of clock signal CLK, the timing of the next clock signal CLK is the equalization point of (T), and polarity signal p(1); 1 is shifted. register
It is shifted to REG1, but the shift register REG
1. Since each output terminal QA of REG2 is "1", the output signal D of the NAND circuit G7 is "0", and even if the absolute value signal y(1) is "1", the AND circuit G8 is It is closed and shifted into shift register REG2 as y(1);0.

The same applies to the timing of the next clock signal CLK, and at time (2T), the output terminals QA to QD of the shift register REG2 are y(2);0,y
(1);0,y(0);1,y(-1);0, which indicates "0100" of the solitary wave signal. At that timing, the output terminals QA to QC of shift register REG1 are p(2); 1, p(1); 1, p
(0); becomes 1.

Furthermore, the output terminals Q and Q of flip-flops FF1 to FF3 follow the timing of the clock signal CLK, as shown by FF1 to FF3Q in FIG.
Therefore, the output signal G of the AND circuit G11 and the output signal F of the AND circuit G12 become as shown in G and F in FIG. 4. Also, the output signal E of the NOR circuit G10 is the output terminal of the shift register REG2.
E in Figure 4 when QA~QD is “0010”
It becomes "1" as shown in . Therefore, the first and second tap coefficient correction period signals J and K become "1" for two clock periods. In other words, it indicates a coefficient correction period of 2t. Furthermore, when the first and second tap coefficient correction period signals H and I become "1", the correction amount Δ of one step is set. Since the coefficient correction period is 2t, the coefficient correction amount is 2Δ. This shows that the distortion of the solitary wave signal is large due to the large echo component, and in order to equalize it, the coefficient correction amount can be doubled to quickly reduce the equalization error.

As mentioned above, in the two-tap bridged tap equalization method, a solitary wave signal is detected by determining the polarity of the first bit and the last two bits of the signal at time (0). Depending on whether the latter two bits are larger or smaller than the threshold L, it is determined whether the coefficient correction amount is .DELTA. or 2.DELTA., and the random input signal is automatically equalized. It should be noted that the number of taps in the equalizer is not limited to two, and it goes without saying that it can also be applied to cases where the equalizer has more taps. When the number of taps is two or more,
In order to increase the number of stages of the shift register and increase the amount of coefficient correction per time, it is sufficient to increase the number of stages of flip-flops and the number of stages of shift registers, and if a gate circuit is provided accordingly, the desired coefficient can be adjusted. This means that the amount of correction can be set.

Effects of the Invention As explained above, the present invention detects a solitary wave signal included in a random input signal during communication based on the AMI signal coding rule, and calculates the influence of the echo component of the solitary wave signal at the time ( 0), and the equalization error amount is determined based on the absolute value signal at another time relative to time (0), and the coefficient correction amount is adjusted by one step.
This is a variable setting such as 2 steps, etc., and automatic equalization can be performed even during communication, so communication can be performed without a training period. There is an advantage that automatic equalization can be performed for various fluctuations in the temperature. Furthermore, by making the amount of coefficient correction at one time variable, automatic equalization can be performed at high speed.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the main part of an embodiment of the present invention, Fig. 2 is an explanatory diagram of the signal waveform and tap coefficient correction, and Fig. 3 is a block diagram of the main part of the tap coefficient setting circuit part of the embodiment of the invention. , FIG. 4 shows an example of a time chart for explaining the operation of FIG. 3. 1 is an input terminal, 2 is an output terminal, 3 is a synthesis circuit,
4 and 5 are delay circuits, 6 and 7 are coefficient units, 8 is a tap coefficient setting circuit, COMP1 and COMP2 are comparison circuits,
REG1 and REG2 are shift registers, G1 to G2
0 is a gate circuit, and FF1 to FF3 are flip-flops.

Claims (1)

[Claims] 1. In a bridged tap equalization method in which a delayed output signal is multiplied by a tap coefficient and combined with an input signal, and the tap coefficient is automatically set according to the equalization error, The polarity of the solitary wave component from the random input signal is compared with the bit of interest, one bit before the bit of interest, and at least one bit after the bit of interest, according to the coding rules for AMI signals where the signal is not continuous. and means for correcting the tap coefficient by comparing the magnitude of the equalization error amount with respect to a certain threshold value only when a solitary wave component is detected by the means, An automatic equalization method characterized in that the tap coefficient is increased when the error amount is larger than the threshold value, and the tap coefficient is decreased when the equalization error amount is smaller than the threshold value.