JPH02172385A - image restoration device - Google Patents

Abstract

PURPOSE:To minimize the picture quality deterioration attended with the presence of a block disabled of decoding by using 1st and 2nd interpolation means adaptively based on the result of discrimination of a movement discrimination means. CONSTITUTION:The timing of a block movement data outputted from a movement detection circuit 32 is adjusted by a BF 34 so as to correspond to a picture element block outputted from a post-stage delay circuit(DL) 44. Then a picture element data outputted from the DL 44 is fed to a terminal A of a switch 48 and a mean value between a picture element data outputted from a DL 46 and a picture element data outputted from a frame memory 18 is obtained by an arithmetic unit 47. Thus, if the reproduction of the picture element block is disabled, while the DL 44 gives an output, and when the switch 48 is connected to the position of a terminal B, in-frame interpolation is attained. Moreover, when no movement exists in the reproduction disable block, the picture element block of the same position on a preceding pattern outputted from the frame memory 18 is used without modification to attain inter-frame interpolation. Thus, the reproduction deterioration attended with the interpolation is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image reproducing apparatus, and more particularly, to an apparatus for reproducing image signals digitally recorded using a so-called block encoding method.

[Conventional technology] The configuration of this type of conventional playback device is shown in FIG.

A reproduction signal from a recording medium, for example a videotape, is applied from an input terminal 10 to a data reproduction circuit 12. The data reproducing circuit 12 uses a sync code (synchronization code) in the reproduced signal.
is detected and all data is reproduced according to the clock synchronized with this sync code.

The data reproduced by the data reproduction circuit 12 is subjected to error correction (
(ECC) circuit 14, code errors are corrected as is well known, and the signal is input to the subsequent data separation circuit 16. The data separation circuit 16 supplies address data in the reproduced data to the memory control circuit 20 and image data to the frame memory 18.

The memory control circuit 20 transfers each image data to the frame memory 1 according to the address data separated by the data separation circuit 16.
Write it down to 8. Additionally, error flags corresponding to each image data are transmitted from the ECC circuit 14 to the memory control circuit board 20.
The image data that cannot be corrected by the ECC circuit 14 is not written into the frame memory. That is, the memory control circuit 20 generates a write address based on the address data from the data separation circuit 16, and generates a write enable signal based on the error flag from the ECC circuit 14.

Reading from the frame memory 18 is performed in a predetermined order at frame intervals, and a reproduced digital image signal is obtained from the terminal 22. At this time, since the data of the pixel where the error occurred is not written to the frame memory 18, the data of the pixel previously written to the same address in the frame memory 18 is read out. Address data is determined according to the position of the pixel on the screen, so
Eventually, the erroneous (uncorrectable) pixel will be replaced by a pixel at the same position in the past screen. That is,
This means that inter-frame interpolation is being performed.

On the other hand, in recent years, so-called block coding has been proposed as a high-efficiency coding method. This utilizes the fact that each pixel has a high correlation within a pixel block consisting of an (n x m) pixel matrix (n and m are integers of 2 or more), and performs high-efficiency encoding for each pixel block. That is what it is. An example of this block encoding is JP-A-62-1.5
As disclosed in No. 1090, there is a method that converts the maximum value and minimum value among all the pixels of each pixel block, and each pixel between these into quantized data.

Such block encoding can be said to be a very effective and highly efficient encoding method in that the propagation of errors can be suppressed within each pixel block.

[Problems to be Solved by the Invention] By the way, when image data encoded by this block encoding is reproduced from a recording medium, it is often impossible to restore it in units of pixel blocks.

This is because, for example, if an error occurs in data such as the maximum value and minimum value mentioned above, or in the address data indicating the position of each pixel block on the screen, all pixels in the block will become unrecoverable. be. Therefore, the area on the screen that cannot be restored becomes extremely large.

Therefore, when attempting to perform interpolation using the reproducing circuit shown in Figure 6 when reproducing block-encoded image data from a recording medium, there is a high possibility that the same position on the screen will not be reproduced for a long period of time, resulting in poor image quality. leading to deterioration. especially,
When reproducing at a speed different from that during recording, image quality deterioration due to this cause will occur more frequently.

SUMMARY OF THE INVENTION An object of the present invention is to provide an image reproducing apparatus that can minimize image quality deterioration caused by the presence of unrecoverable blocks when reproducing a block-encoded image signal.

[Means for Solving the Problems] An image reproducing device according to the present invention generates an image that is highly efficiently encoded in units of pixel blocks consisting of (n×m) pixel matrices (n and m are integers of 2 or more). A device for reproducing a signal from a recording medium, comprising: a determination means for determining whether each reproduced pixel block can be reproduced; a decoding means for decoding each pixel block; and an image movement for each pixel block. a first interpolation means that interpolates each pixel of the pixel block determined to be unreproducible by the possibility determination means using other pixel blocks in the same screen; a second interpolation means for interpolating each pixel of the determined pixel block using a pixel block of another screen having the same position on the screen; and second interpolation means are used adaptively.

[Operation] With the above means, each pixel block can be interpolated with an interpolation pixel block suitable for each block, so it has become possible to obtain an extremely good reproduced image.

[Example code] Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a block diagram of an embodiment of the present invention. The same components as in FIG. 4 are given the same reference numerals. A block error detection circuit 15 generates a block error flag indicating whether or not each pixel block can be restored based on the error flag from the ECC circuit 14. FIG. 2 shows the data format for one block to be reproduced by the reproduction apparatus of this embodiment. In FIG. 2, 5ynC is a link code, ID is an additional code containing block address data,
min indicates the minimum value, max indicates the maximum value, and d1 to d9 indicate the quantization code of each pixel. The block error detection circuit 15 detects the error flags ID9m1n, m from the ECC circuit 14.
If any of aX is set, a block error flag indicating that the block cannot be reproduced is set.

The data separation circuit 16 receives data from the ECC circuit 14 and sends block address data to the memory control circuit 21.
Image data is applied to each block decoding circuit core. The block decoding circuit 17 outputs decoded pixel data in units of blocks. The memory control circuit 21 is the data separation circuit 16
The write address of the decoded pixel data of each pixel block to the frame memory 18 is determined based on the block address data from It is determined whether to write to the memory 18 or not.

Images of each frame are read out from the frame memory 18 in block units in the order of the Lasque scan, and for pixel blocks that cannot be restored at this time, the restored pixel data of the past screen is output.

The block error flag from the block error detection circuit 15 is also supplied to the flag memory 26.

The address control circuit 24 determines the write address of this block error flag into the flag memory 26 in accordance with the block address data from the data separation circuit 16. The flag memory 26 reads each error flag in the order in which they are read from the frame memory 18, and stores them in the buffer (BF) 2.
8 to match the timing with the data from the frame memory 18.

30 is a frame delay circuit that delays pixel data output from the frame memory 18 for one frame period;
The motion detection circuit 32 calculates the difference between the pixel data output from the frame delay circuit 30 and the pixel data from the frame memory 18, and sums the difference for each block. If this total value is less than a predetermined value, this pixel block is assumed to have no movement, and a low level ("o") output is generated; if it is greater than a predetermined value, it is assumed that there is movement, and a high level ("1") output is generated.
This data is hereinafter referred to as block motion data. The timing of the block motion data is adjusted by the BF 34 so as to correspond to the pixel block output from the subsequent delay circuit (DL) 44.

FIG. 3 is a diagram for explaining the operation of the interpolation circuit of this embodiment. In the diagram, each square represents one pixel block, and the arrangement in the diagram shows the arrangement on each screen.

Now, the frame memory 18 has pixel block B1. )++
DL44, 46 are respectively outputting data of pixel blocks B31. A delay time is set to output pixel data of B+ and j-1. At this time again,
BF28 outputs the block error flag of pixel block B+, Ill, and DL38, 40 outputs the block error flag of pixel block B1.
．． llB1. A delay time is set to output the block error flag of I-1. Furthermore, at this time BF
A delay time is set so that 34 outputs block motion data of pixel blocks B, , , and D L 36 outputs block motion data of pixel block B.

The pixel data output from the DL 44 is supplied to the A terminal of the switch 48, and the average value of the pixel data output from the DL 46 and the pixel data output from the frame memory 18 is determined by the calculator 47. Therefore, the A terminal of the switch 48 is connected to the pixel block B3. ．． When pixel data of pixel blocks B1 . l-
1 pixel data and pixel block B1. This is the average value of pixel data of l+1. That is, when pixel blocks B, .
With l+1, it is possible to perform sleeve spacing within the frame.

Next, control of the switch 48 will be explained. The AND gate 42 outputs a high level under the conditions that the output of BF28 is "0", the output of D L38 is "0", and the output of BF34 is "1", and the switch 48 is set to the B terminal. Connecting. That is, the intra-frame spacing is performed for pixel blocks B, . . . for pixel blocks B1. I cannot be reproduced, and pixel block B1. I-1 and B1
0° and can be reproduced only when motion occurs in pixel block B.

However, regarding block motion data, pixel block B,
If , , cannot be played, no signal can be sent, so DL3
By connecting the switch 35 to the Y side by the output of 8, the block motion data for the pixel block Bl+ is used.

Now, pixel block B14. cannot be reproduced and there is movement, and the pixel blocks Bl, j-1 and B1. If l+1 is reproducible, these upper and lower pixel blocks are used to reproduce pixel blocks B, 1. It can be used well between sleeves within the frame. Furthermore, when there is no movement in the unreproducible block, extremely natural interframe interpolation is possible by using the pixel block at the same position in the previous screen output from the frame memory 18 as is. According to the above configuration, The most desirable interpolation is possible regardless of the presence or absence of motion and the number of unreproducible blocks. The switch 48 thus obtained
The output is converted into a raster scanning signal by a scan conversion circuit 50 and outputted from an output terminal 52.

In addition, in the two series of examples, the pixel block with the average value of the upper and lower pixel blocks is used as the intra-frame sleeve opening method, and the pixel block at the same position in the previous screen is used as is as the interframe interpolation method. However, the present invention is not limited to this, and it is possible to have a configuration that adaptively uses other intra-frame sleeve opening methods and inter-frame interpolation methods.

“Effects of the Invention” As can be easily understood from the above explanation, according to the present invention, it is possible to always perform optimal interpolation of pixel blocks depending on the presence or absence of image movement, and to minimize reproduction deterioration caused by interpolation. It became possible.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the configuration of an embodiment of the present invention, FIG. 2 is a data format of a signal reproduced by the device shown in FIG. 1, FIG. 3 is an explanatory diagram of the interpolation operation shown in FIG. 1, and FIG. The figure is a configuration diagram of a conventional playback device. 15 Niblock error detection circuit 17: Block decoding circuit 18: Frame memory 26: Flag memory 32
: Motion detection circuit 36, 38, 40□44.46: Delay circuit 42: AND gate 47: Average value calculation circuit procedure amendment C method) Incident display Patent application No. 326288 of 1988 Name of invention Image reproducing device correction Relationship with the case involving a person who does

Claims (1)

[Claims] A device that reproduces an image signal encoded with high efficiency in units of pixel blocks consisting of (n×m) pixel matrices (n and m are integers of 2 or more) from a recording medium, in which each reproduced pixel block a decoding means for decoding each pixel block; a motion determining means for determining whether or not there is movement in the image for each pixel block; a first interpolation means for interpolating each pixel of the determined pixel block using another pixel block within the same screen; and a first interpolation means for interpolating each pixel of the determined pixel block using another pixel block within the same screen; and a second interpolation means for interpolating using pixel blocks of a screen, and adaptively using the first and second interpolation means based on the determination result of the motion determination means. Device.