JPH02181535A - Microprocessor - Google Patents

Abstract

PURPOSE:To add a function capable of deleting byte resending to a microprocessor by providing a mode register directly connected to a data bus in the microprocessor and setting up a bit or a flag in the register in accordance with the validity/invalidity of byte resending. CONSTITUTION:The microprocessor confirms whether the byte resending function to/from the opposite side tor transmitting/receiving data is required or not by data transmission/reception at the time of starting operation. When the function is necessary, a flag '1' requesting byte resending is set up in the mode register 2. When it is unnecessary, '0' is set up. The validity/invalidity of byte resending is inspected by the flag '1' in the register 2 in each data transmission/ reception, and when the byte resending flag is not set up, byte resending request operation is not executed.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention relates to the presence/absence of error detection and data retransmission request functions in data transmission and reception between an input/output port of a microprocessor and another microprocessor or an equivalent terminal. It is something.

[Conventional technology]

FIG. 4 shows a conventional received data verification flowchart disclosed in, for example, Japanese Patent Laid-Open No. 57-111632.

The received data reading flowchart is loaded with a time value corresponding to the time required to read the flock or received 8 bits (CT4). If the duration of one bit is 1 mS, then CT is loaded with 8 ms. Each time one bit is received, bit IU from boat FA is stored in register R7, parity calculation is performed between the bit already received and the bit just received, and the parity calculation result is loaded into register Rg.

When the 8-bit received data has been transferred to R2, C
T is in the state °0゛. The received bits and pre-calculation (
A comparison is made with the bits that have been negotiated (negotiated) and stored in register Rg. If these two parity bits are different, a transmission error occurs and l is set to "0". Then, a retransmission request for port PA is made.

[Problem to be solved by the invention]

Conventional microprocessors are configured as described above, so when using a highly reliable transmission path, they are configured with blocks with a length of 1 byte or more for sending and receiving data (usually several tens' to several 1 bytes).
00 bytes), if the transmission/reception check is performed in byte units, the transmission/reception time becomes considerably long, resulting in poor transmission efficiency.

This invention was made in order to solve the above-mentioned problems. In communication systems that normally use block transmission, a one to several byte block check code is added to block data for transmission and reception. There is no need to add byte check and byte retransmission functions. In the case of such a transmission method, the purpose is to add a function that can eliminate byte retransmission.

[Means to solve the problem]

The microprocessor according to the present invention has a mode register directly connected to the data bus inside the microprocessor, sets a bit or a flag in this register depending on whether byte retransmission is necessary, and sets the flag when the byte retransmission function is required. If it is unnecessary, set the flag to 0°.

[Operation] Immediately after receiving data, the microprocessor of the present invention reads (monitors) the mode register, determines whether the byte retransmission request flag is active, and activates the byte retransmission function.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, (1) is a data bus inside the microprocessor, (2) is a mode register that stores a flag indicating whether or not a byte retransmission request is required, (3) is an I10 port of an external terminal of the microprocessor, and (4) is a mode register that stores a flag indicating whether a byte retransmission request is required. ) is the I10 port (3
) is a shift register internally connected to the I10 port (
3J performs serial data transmission and reception, and also - temporally stores data. (5) is an output buffer that stores data in units of bytes (parallel data) when the microprocessor sends it out, and the data is sent bit by bit to the shift register (4) for parallel-serial data conversion. (6) is an input buffer that converts the serial data received by the shift register (4) into parallel data and sends it internally.

FIG. 2 shows the data format that is transmitted and received in 1-byte data (serially) to the I10 port. H/L indicates a signal level of °1°0°, D0 to D represent 1 byte (8 bits) configuration data, and P represents a parity pit. When requesting a byte retransmission, the retransmission request is set to 1 bit period °L as shown in the figure, and the retransmission request is notified to the other party. If it is not needed, it remains at "H level."

At the start of operation, the microprocessor checks whether a byte retransmission function is required with the other party to which it is transmitting and receiving data, and if necessary, sets a byte retransmission type flag °1° in the mode register. ° if unnecessary
Set 0'. FIG. 3 is a program flowchart of the microprocessor of the present invention. As shown in the figure, the mode register Cζ flag is initially set. The operation flow is executed as an initial operation up to step (4), and after step (G), it is divided into operations and flows that are executed each time data is transmitted and received. At each execution, the mode register flag is set to °l°good/
If there is no byte retransmission request flag, the process jumps to the next flow without requesting a byte retransmission.

The data flow inside the microprocessor is such that serial data input from the 10th port (3) is transferred to the shift register (4).
) is converted into parallel data and sent to the input buffer (6), and if the mode register (2] flag is °l", this parallel data is sent internally and is verified by a parity check to check for parity errors. Immediately, a 1-bit transmission/reception period °L level output is sent via the 110 port (3).

In the above embodiment, a mode register (2) is provided inside the microprocessor to verify the presence/absence of a byte retransmission request by executing a program. W ) to Vcc
(H input) or GND (L input), after the microprocessor receives each byte, it verifies the input level of this input terminal, and if it reaches, for example, °H°, it determines that the transmission line requires a byte retransmission request. However, if there is an error in the received data, the program may send a byte retransmission request to the other party.

Furthermore, the mode register (21) does not need to be provided exclusively for byte retransmission requests; if another register directly connected to the internal bus has an empty flag, it may be used also.

〔Effect of the invention〕

As described above, according to the present invention, a flag register is provided in the microprocessor, and the execution flow is assembled as a condition flag on the program, thereby eliminating the need for byte retransmission. It is enough to communicate.

[Brief explanation of the drawing]

FIG. 1 is a functional block diagram of a microprocessor that is an embodiment of the present invention, FIG. 2 is a diagram showing a 1-byte format for data transmission and reception in the first factor, and FIG. 3 is a flowchart of a program that executes the present invention. , FIG. 4 is a flow chart of received data verification of a conventional microprocessor. In the figure, (1) is the data bus, (2) is the mode register, (3) is the I10 port, and is the shift register (April). (5) is the output buffer, and (6) is the input buffer. In the figures, the same symbols indicate the same or equivalent parts.

Claims (1)

[Claims] A microprocessor having a data communication function, characterized in that the microprocessor is equipped with a function to add or not add a data retransmission request function to a transmitting side as necessary when an error in received data is detected.