JPH02185133A - Clock switching circuit - Google Patents

Abstract

PURPOSE:To switch a clock without instantaneous interruption by holding plural original clocks in the level of an output clock after switching for a prescribed time based on the phase where the level of the output clock is switched in a prescribed direction. CONSTITUTION:A switching protection means 2 is constituted with OR circuits 21 and 22 and a monostable multivibrator circuit 23. The output clock just after switching, namely, an original clock 2 is held at the high level for a time T after a time t0 of the rise of the output clock just after switching by taking OR between the monostable multivibrator circuit 23 which outputs a pulse having the width T at the time t0 of the rise of the output clock and the original clock 2. Consequently, the duty ratio of the output clock is also kept before and after clock switching.

Description

[Detailed Description of the Invention] [Summary] Regarding a clock switching circuit that selects and outputs one of a plurality of original clocks according to a control signal given from the outside, it is unnecessary to adjust the phase relationship between the clocks before and after switching. ,and,
The purpose is to switch clocks without any momentary interruption without causing errors, and it has a selector that selects and outputs one of a plurality of original clocks according to a control signal given from the outside. In the clock switching circuit, switching protection means is provided for holding each of the plurality of original clocks at the level of the output clock after the transition for a predetermined time based on a phase in which the level of the output clock changes in a predetermined direction. Configure.

[Industrial application field]

The present invention relates to a clock switching circuit that selects and outputs one of a plurality of original clocks according to an externally applied control signal.

In recent years, particularly high reliability has been required for transmission equipment in the communications field, and it has become common to have two clock systems, one for working and one for backup, for the clock that provides the timing to operate the transmission equipment. .

Furthermore, in such transmission equipment, when switching the clock from the working system to the backup system, reliability can be further improved by making it possible to switch without momentary interruption, regardless of the phase relationship between the two systems' clocks. There are demands to do so.

[Prior art and problems to be solved by the invention]

The places where clocks are used in transmission equipment are:
For example, it may be used as a data read clock in a buffer memory provided in a data receiving section.

Conventionally, in a transmission device, the clock has been simply switched from the active system to the protection system using a selector or the like. Therefore, when the read clock is switched in the above-mentioned buffer memory or the like, depending on the phase difference between the clocks before and after switching, omissions may occur in the output data, causing a transmission path error.

Alternatively, conventionally, in order to prevent the occurrence of transmission path errors as described above, the phase difference between the clocks before and after switching has been matched, but the phase relationship of the clocks is, for example,
This changes depending on the position of the package on the circuit, etc., and there is a problem in that it takes time and effort to adjust.

The present invention has been made in view of the above-mentioned problems, and does not require adjustment of the phase relationship between clocks before and after switching, and can switch clocks without any momentary interruption without causing errors. The purpose of this invention is to provide a clock switching circuit.

[Means to solve the problem]

FIG. 1 is a basic configuration diagram of the present invention. In this figure, 1
is a selector, and 2 is a switching protection means.

Selector 1 follows a control signal given from the outside.
One of the plurality of original clocks is selected and output.

Then, the switching protection means 2 operates for a predetermined time based on a phase in which the level of the output clock changes in a predetermined direction.
Each of the plurality of original clocks is held at the level of the output clock after the transition.

[For production]

The switching protection means 2 provided in accordance with the present invention allows each of the plurality of original clocks to be switched to the output clock after the transition for a predetermined time based on the phase in which the level of the output clock changes in a predetermined direction. level. Therefore, if the predetermined time is appropriately selected, the duty ratio of the output clock can be maintained at a predetermined value or higher no matter which original clock is switched.

Therefore, according to the switching circuit of the present invention, there is no need to adjust the phase relationship between the clocks before and after switching, and the clocks can be switched without causing an error (without interruption).

〔Example〕

FIG. 2 is a configuration diagram of an embodiment of the present invention.

In FIG. 2, 10 is a selector, 21 and 22 are O
R circuit, 23 is monostable multi-vibrator circuit, 30
4 is a clock switching circuit of the present invention, and 40 is an elastic memory that uses the output clock of the clock switching circuit of the present invention as a read clock.

The selector 1 having the configuration shown in FIG. 1 described above is the same as the selector 1 shown in FIG.
0, the switching protection means 2 is the OR circuit 21 of FIG.
．． 22 and a monostable multi-pie break circuit 23.

That is, the OR circuits 21 and 22 use the original clocks ■ and ■ as their respective human inputs, and the output of the monostable multi-pie break circuit 23 whose trigger input is the output of the selector 10, that is, the output clock, respectively. The other side is human power.

Here, it is assumed that the monostable multi-pie break circuit 23 has a width T corresponding to a predetermined duty ratio required for the output clock.

The operation of the arrangement of FIG. 2 is made clear by the timing diagram of FIG.

In the example of FIG. 3, the switching control signal selects the original clock ■ until time t1, but at time t1 the switching control signal is switched to select the original clock ■.

Here, the rising edge of the output clock immediately before time t1 is time t0, and at time t1, the original clock ■
is still at the L level, so if the switching protection means of the present invention does not work, the duty ratio of the output clock will be:
If it becomes very small, there is a risk that a transmission path error will occur.

However, due to the effect of the switching protection means of the present invention, specifically, at time t. The monostable multi-vibrator circuit 23 that outputs a pulse of width T from the rising edge of the output clock is logically ORed with the original clock ■, so that the output clock immediately after switching, that is, the original clock ■, is changed to It is held at the H level for a period of T from the rising edge of the previous output clock (time t).

Therefore, the duty ratio of the output clock is maintained even before and after switching the clock.

〔Effect of the invention〕

According to the clock switching circuit of the present invention, there is no need to adjust the phase relationship between the clocks before and after switching, and the clocks can be switched without interruption without causing an error.

[Brief explanation of the drawing]

Figure 1 is a basic configuration diagram of the present invention, Figure 2 is a configuration diagram of an embodiment of the present invention, and Figure 3 is a diagram of the second embodiment.
FIG. 3 is a timing diagram of the configuration shown in the figure. [Explanation of symbols] l...Selector, 2...Switching protection means, 10
...Selector, 21.22...OR circuit, 2
3... Monostable multi-pie break circuit, 30...
Clock switching circuit, 40...Elastic memory.

Claims (1)

[Claims] 1. A clock switching circuit comprising a selector (1) that selects and outputs one of a plurality of original clocks according to a control signal applied from the outside, comprising: A clock switching circuit characterized in that a switching protection means (2) is provided for holding each of the plurality of original clocks at the level of the output clock after the transition for a predetermined time based on a phase in which the clock changes in a predetermined direction. .