JPH02189637A - Microprogram control device - Google Patents

Abstract

PURPOSE:To continue operation without requiring restart processing by reading out a microinstruction in a main storage by hardware control at the time of generating an uncorrectable error in data read out from a control storage, rewriting the data in the control storage, and executing the instruction. CONSTITUTION:The control device is provided with the control storage 10 for storing a microprogram, an error detecting circuit 11 for detecting the error of data read out from the control storage 10 and a sequence counter 12 for actuating at the time of detecting the error by the circuit 11 and for successively sending a main storage reading instruction signal to a main storage access device, a main storage data storing instruction signal to the control storage and a control storage reading main storage data setting instruction signal. When there is no error in the data read out from the control storage 10, the data are executed as a microinstruction, and when an error is detected in the read data, a microinstruction is read out from a main storage area corresponding to the control storage 10 and rewritten in the control storage 10 and the execution of the microinstruction are executed. Consequently, the restart of the microprogram control device can be omitted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprogram control device, and more particularly to a microprogram control device that performs data correction when an error is detected in data read from a control memory.

[Conventional technology]

In conventional microprogram control devices, error correction codes are stored in the control memory, and errors such as 1-bit errors are corrected, but errors that cannot be corrected with error correction codes such as 2-bit errors are corrected. When an error occurs, the microprogram cannot continue, so it stops operating as soon as the error is reported to the service processor.

[Problem to be solved by the invention]

In the conventional microprogram control device described above, if an error that cannot be corrected by the error correction code occurs in the control memory read data, the operation of the microprogram control device will stop. The disadvantage is that it requires restarting.

[Means to solve the problem]

The microprogram control device of the present invention includes a control memory for storing a microprogram, an error detection circuit for detecting errors in successive data from the control memory, and an error detection circuit activated when the error detection circuit detects an error to access main memory. It has a sequence counter that sequentially sends out a main memory read instruction signal to the device, a main memory data storage instruction signal to the control memory, and a main memory data set instruction signal to the control memory read register.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. 1st
In the figure, one embodiment of the present invention includes a control memory 10 that stores a microprogram, an error detection circuit 11 that detects errors in data read from the control memory 10, and an error detection circuit 11 that starts when the error detection circuit 11 detects an error. It includes a sequence counter 12 that sequentially sends out a main memory read instruction signal to a main memory access device (not shown), a main memory data storage instruction signal to the control memory, and a control memory read main memory data set instruction signal.

The control memory 10 is accessed by an address signal from an address register, and the read data is sent to an error detection circuit 11.
is output to the data selection circuit 14, and a write enable signal W is output to the data selection circuit 14.
When E is input, main memory read data is stored. If there is an error in the read data, the error detection circuit 11
An error detection signal is output to a microinstruction execution unit (not shown) and a sequence counter 12. The microinstruction execution unit suppresses execution of the next instruction when the error detection signal is input. The sequence counter 12 sequentially sets bits So, S1, S2, s, and +S when the error detection signal is input. The output of bit So of the sequence counter 12 is connected as a main memory read request signal to a main memory access (not shown). The control memory address is also connected to the main memory access device as part of the main memory read address. The main memory access device is a sequence counter 12
S. Based on the bit request signal, a microinstruction identical to the data in the control memory prepared in advance is read from the main memory address corresponding to the control memory address.The main memory read data is sent to the S3 bit of the sequence counter 12.
'' is input to the data selection circuit 14 at the same timing as the point is set. The microinstruction is also input to the control memory 10 at the same timing, and the microinstruction is rewritten to the control memory 10 by the WE signal from 83 bits. The data selection circuit 14 includes a sequence counter 12
The main memory read data is selected and output to the microinstruction register 13 based on the 83-bit output. The microinstruction register 15 sets input data according to the 84-bit output of the sequence counter 12. The output of the micro-instruction register 13 is connected to a micro-instruction execution section, and the instructions are executed.

With the above configuration, if there is no error in the read data from the control memory 10, the data is executed as a microinstruction, and if an error is detected in the read data, the data is executed in the main memory corresponding to the control memory. A microinstruction is read from the area, rewritten to the control memory, and executed.

〔Effect of the invention〕

As explained above, the present invention enables, when an uncorrectable error occurs in control memory read data, to read a microinstruction from the main memory under hardware control, rewrite it to the control memory, and execute the instruction. By doing so, there is an effect that operation can be continued without requiring restart processing of the microprogram control device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. 10... Control memory, 11... Error detection circuit, 12... Sequence counter, 13...
...Microinstruction register, 14...Data selection circuit.

Claims (1)

[Claims] a control memory that stores a microprogram; an error detection circuit that detects errors in data read from the control memory;
When the error detection circuit detects an error, it is activated and sequentially sends a main memory read instruction signal to the main memory access device, a main memory data storage instruction signal to the control memory, and a main memory data set instruction signal to the control memory read register. It has a sequence counter that sends out data, and when read data from the control memory is detected, it retrieves the microprogram prepared in the main memory, rewrites it to the control memory, and executes the instruction. microprogram controller.