JPH02190031A - Noise suppression circuit - Google Patents

Abstract

PURPOSE:To prevent the deterioration in the S/N at a weak input even when the interference signal detection sensitivity optimized at a medium input level is set by providing a signal level detection circuit obtaining a control signal corresponding to a reception signal level received by an FM radio receiver and a comparator circuit comparing an output signal of the signal level detection circuit with a prescribed reference value. CONSTITUTION:An interference signal detection circuit 8 is a circuit which receives an intermediate frequency signal as its input and detects the amplitude distortion of the intermediate frequency signal to detect a interference signal by detecting the amplitude distortion. A comparator circuit 12 compares a reference signal of a bias circuit 13 supplying a prescribed reference signal to the comparator circuit with an output signal of a reception level detection circuit 11 and supplies a comparison output signal to a control input C of a pulse shaping circuit 9 when the reception level reaches a prescribed value to allow the pulse shaping circuit 9 to open a gate circuit 6. Thus, even when the sensitivity of the circuit 8 is increased to detect the interference signal even at a medium input, the deterioration in the sound quality due to the elimination of a detection output signal at a weak input is prevented.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a noise suppression circuit for an FM radio receiver, and in particular for suppressing noise caused by pulsed interference signals such as ignition noise in a vehicle-mounted FM radio receiver. related to circuits.

[Conventional technology]

Conventionally, a noise suppression circuit for an FM radio receiver has a configuration as shown in a block diagram in FIG. That is, the noise suppression circuit includes an intermediate frequency amplifier circuit 3. to which the output of the FM front end 2 connected to the antenna l is supplied. FM detection circuit 4.
Delay amplification circuit 5. Gate circuit 6. and output circuit 7 are connected in this order.

Further, from the output of the FM detection circuit 4, a disturbance signal detection circuit 8 is detected.
'Pulse shaping circuit 9' and gate circuit 6 control human power C
are connected in this order. Moreover, at the output end of the gate circuit 6,
During the period when the gate circuit 6 is cutting off the signal, a signal holding circuit 10 is connected which holds the signal level immediately before the signal is cut off.

In this circuit, when an FM detection output signal containing pulse noise appears, on the one hand, the delay amplifier circuit 5, the gate circuit 6. The signal is output through the path of the output circuit 7. On the other hand,
The signal is input to a disturbance signal detection circuit 8', where the disturbance signal is detected and the detected signal is sent to a pulse shaping circuit 9', in which an edge-stable multivibrator is generally used.
It outputs a constant width pulse to its output. The output pulse closes the gate of gate circuit 6.

The FM detection output signal containing the pulsed noise is delayed for a certain period of time in the delay amplifier circuit 5, and when the pulsed noise appears in the gate circuit 6, the gate is closed and does not appear in the output circuit.

[Problem to be solved by the invention]

In the previously mentioned conventional noise suppression circuit, setting of the detection sensitivity of the interference signal detection circuit 8' poses a problem.

At weak input, the interference signal level is high because the interference signal is not suppressed by the FM radio receiver and is guided to the interference signal detection circuit 8'. At medium inputs, interference is suppressed by the limiter characteristics of the FM radio receiver, so the signal level becomes small. When the input becomes strong, the interfering signal is completely suppressed, and no pulse noise appears in the FM detection output.

Now, if we increase the sensitivity of the interference signal detection circuit 8' so that the interference signal can be detected at medium inputs where the interference signal 1 level is small, at weak inputs the interference signal level will increase, but the receiver's S/ As N decreases, background noise increases, and relatively there is almost no difference from the interfering signal level. Therefore, the gate circuit 6 opens and closes due to background noise, and the FM detection signal is cut out more than necessary, resulting in an increase in S/N.
becomes worse.

On the other hand, if the detection sensitivity of the interference signal detection circuit 8' is kept low so that the gate circuit 6 will not operate due to background noise at weak inputs, small level interference signals will not be detected at medium inputs, and the noise suppression effect will be sufficient. The disadvantage is that it cannot be obtained.

There are other noise suppression circuits in the prior art that improve the above-mentioned drawbacks.

FIG. 3 shows its block diagram. In FIG. 3, the same parts as in FIG. 2 are given the same numbers and their explanations are omitted. In the conventional example shown in FIG. 3, there is a reception 1 novel detection circuit 11 which obtains an output signal corresponding to the received signal level, and an interference signal detection circuit 8 whose interference signal detection sensitivity can be controlled by a signal applied to its control input 8'' C. '', and is configured to apply the output signal level of the received level detection circuit 11 to the control power C of the interference signal detection circuit 8''. With this configuration, when the received signal level is low, that is, when the input is weak, the interference signal is By lowering the detection sensitivity and increasing the sensitivity when the received signal level is high or medium input, the second
The drawbacks of the conventional example shown in the figure have been improved.

In the conventional example shown in Figure 3, when the received signal level is high, the interference signal detection sensitivity is increased, so even when the interference signal is suppressed and becomes extremely small when transitioning from medium input to strong input, it is detected. , performs opening/closing operations of the gate circuit 6. When the received signal level increases and the interference signal becomes smaller than a certain value, the interference signal is connected to the delay amplifier circuit 5 or the subsequent stage of the output circuit 7 even if the pulse noise is not removed by the gate circuit 6. Due to the de-emphasis circuit, etc., there is almost no noticeable deterioration in sound quality caused by interfering signals. Rather, there is a drawback that the detection output signal is cut off by the opening/closing operation of the gate circuit 6, which actually deteriorates the sound quality.

The present invention eliminates the drawbacks of the prior art as described above.

[Means for Solving the Problems] The present invention includes an FM signal detection circuit and a disturbance signal detection circuit, supplies an output signal of the FM signal detection circuit to a signal holding circuit via a gate circuit, and detects the disturbance signal. An FM radio receiver that controls a pulse shaping circuit by the output signal of the circuit, cuts off the gate circuit by the output pulse of the pulse shaping circuit during the disturbance signal generation period, and operates according to the output supplied by the signal holding circuit. In the noise suppression circuit,
The FM radio receiver includes a signal level detection circuit that obtains a control signal corresponding to the received signal level received by the FM radio receiver, and a comparison circuit that compares the output signal of the signal level detection circuit with a predetermined reference value.

〔Example〕

FIG. 1 is a block diagram of an embodiment of the present invention.

In FIG. 1, the same parts as in FIGS. 2 and 3 of the conventional example are designated by the same numbers and their explanations are omitted. Unlike the conventional example, the interference signal detection circuit 8 is a circuit that receives an intermediate frequency signal as its input and detects the amplitude distortion of the intermediate frequency signal, and detects the interference signal by detecting the amplitude distortion. Such a detection circuit can be configured with a normal amplitude modulation detection circuit.

It goes without saying that the intermediate frequency signals detected at this time, including the interfering signals, have a significant amplitude and must be extracted from a suitable, unrestricted location.

The comparison circuit 12 compares the pressure signal of the reception level detection circuit 11 with the reference value of the bias circuit 13 which provides a predetermined reference value to the comparison circuit, and when the reception level exceeds a certain value,
The comparison output signal is given to the control power C of the pulse shaping circuit 9 to control the operation of the pulse shaping circuit 9 so that the gate circuit 6 is in an open state.

〔Effect of the invention〕

As explained above, in the present invention, first of all, the interference signal is detected by detecting the amplitude distortion of the intermediate frequency signal. In the conventional example where the interference signal is detected from the FM detection output signal, when the input is weak, the interference signal and background noise are at a level that is not much different, whereas in the intermediate frequency signal stage, the background noise is
It is sufficiently smaller than the amplitude distortion of the intermediate frequency signal. Therefore, even if the interference signal detection sensitivity is set to be optimal at a medium input level, the drawbacks of the conventional example shown in FIG. 1 do not occur at weak inputs.

Second, by providing a comparator circuit 12 and opening the gate circuit 6 when the input level exceeds a certain value, it is possible to prevent medium to strong input as described in the conventional example shown in FIG. This has the advantage that the opening/closing operation of the gate circuit does not cause the disadvantage of deteriorating the sound quality.

Moth figure 1

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the present invention, FIG. 2 is a block diagram of a conventional example, and FIG. 3 is a block diagram of another conventional example. 1... Antenna, 2... FM front end, 3... Intermediate frequency amplification circuit, 4...
...FM detection circuit, 5...Delay amplification circuit, 6.
...Gate circuit, 7...Output circuit, 8.
8′・8″・・・・Interference signal detection circuit, 9・9′
...Pulse shaping circuit, lO... Signal holding circuit, 11... Reception level detection circuit, 12.
... Comparison circuit, 13 ... Bias circuit. Susumu Uchihara, Patent Attorney, Agent for Yasu 2 Zu

Claims (1)

[Claims] It is equipped with an FM signal detection circuit and a disturbance signal detection circuit, the output signal of the FM signal detection circuit is supplied to a signal holding circuit via a gate circuit, the pulse shaping circuit is controlled by the output signal of the disturbance signal detection circuit, and the disturbance signal is controlled. During the signal generation period, the gate circuit is cut off by the output pulse of the pulse shaping circuit, and the noise suppression circuit of the FM radio receiver is configured to operate according to the output supplied by the signal holding circuit. comprising a signal level detection circuit for obtaining a control signal corresponding to a received signal level received by the machine, and a comparison circuit for comparing the output signal of the signal level detection circuit with a reference value set to a predetermined value, A noise suppression circuit for an FM radio receiver, characterized in that the output signal of the comparison circuit is configured to stop the operation of at least one of the interference signal detection circuit and the pulse shaping circuit.