JPH021914Y2 - - Google Patents

Info

Publication number
JPH021914Y2
JPH021914Y2 JP1982197614U JP19761482U JPH021914Y2 JP H021914 Y2 JPH021914 Y2 JP H021914Y2 JP 1982197614 U JP1982197614 U JP 1982197614U JP 19761482 U JP19761482 U JP 19761482U JP H021914 Y2 JPH021914 Y2 JP H021914Y2
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
insulating layer
conductive layer
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982197614U
Other languages
Japanese (ja)
Other versions
JPS5999497U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1982197614U priority Critical patent/JPS5999497U/en
Publication of JPS5999497U publication Critical patent/JPS5999497U/en
Application granted granted Critical
Publication of JPH021914Y2 publication Critical patent/JPH021914Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Description

【考案の詳細な説明】 この考案は、例えばプリント基板上に配設され
る電気部品の電気的しやへいをするしやへい装置
に関するものである。
[Detailed Description of the Invention] This invention relates to a shielding device for electrically shielding electrical components disposed on, for example, a printed circuit board.

第1図は、この種の装置を示すもので、1はプ
リント基板、2,3および4はこのプリント基板
1上に配設された抵抗、高周波トランスおよび集
積回路で、この集積回路4の上面にはそのパツケ
ージの蓋機能とシールド機能を兼ねる金属性のシ
ールド蓋5が設けられている。また、このシール
ド板5は導線を介して集積回路4のアース端子6
aに接続されている第2図は、第1図A−A′断
面を示すもので集積回路4の入出力端子6b,6
cはプリント基板1を貫通し、その導体パターン
7にはんだ8により接続されている。また、この
プリント基板1の裏面側には、プリント基板1の
防湿および導体パターン7間の耐圧等を得るため
にソルダレジストを9が塗布形成されている。
FIG. 1 shows this type of device, in which 1 is a printed circuit board, 2, 3, and 4 are resistors, high-frequency transformers, and integrated circuits arranged on this printed circuit board 1, and the upper surface of this integrated circuit 4 is shown in FIG. is provided with a metal shield lid 5 that serves both the lid function of the package and the shield function. Further, this shield plate 5 is connected to the ground terminal 6 of the integrated circuit 4 via a conductive wire.
2 shows a cross section taken along the line A-A' in FIG.
c penetrates the printed circuit board 1 and is connected to the conductive pattern 7 by a solder 8. Furthermore, a solder resist 9 is coated on the back side of the printed circuit board 1 in order to prevent the printed circuit board 1 from moisture and to provide voltage resistance between the conductive patterns 7 and the like.

このような構成において、電源を印加して動作
させるとプリント基板1上に配置された抵抗2、
トランス3等により発生する内部雑音、また外部
から到来する外部雑音が、集積回路4に浸入し、
これが誤動作の原因となつていた。
In such a configuration, when power is applied and the resistor 2 disposed on the printed circuit board 1 is operated,
Internal noise generated by the transformer 3 etc. and external noise coming from outside enter the integrated circuit 4,
This caused malfunctions.

これら雑音の影響を小さくするため集積回路4
のシールド蓋5を導線を介してアース端子6aに
接続していた。しかし、このシールド蓋5は第1
図に示すように、しやへい範囲が小さく、またそ
の構造上しやへい範囲も制限を受けるので、十分
なしやへい効果は得られなかつた。また、この場
合プリント基板1裏面側の導体パターン7あるい
は集積回路4の端子6等により伝搬、ふく射され
る雑音の影響を防止することはできない。
In order to reduce the influence of these noises, the integrated circuit 4
The shield lid 5 was connected to the ground terminal 6a via a conductive wire. However, this shield lid 5
As shown in the figure, the shielding range is small and the shielding range is also limited due to its structure, so a sufficient shielding effect could not be obtained. Furthermore, in this case, it is not possible to prevent the influence of noise propagated and radiated by the conductor pattern 7 on the back side of the printed circuit board 1 or the terminals 6 of the integrated circuit 4.

また、従来から実施されているしやへい装置と
して、例えば第1図の電気回路全体を導体ケース
中へ入れ、その導体ケースをアース接地すること
により、外来雑音の影響を小さくする方法があ
る。しかし、この場合外来雑音に対するしやへい
効果は期待できるが、内部雑音すなわち抵抗2、
トランス3から発生する雑音が集積回路4に浸入
することを防止することはできず、この内部雑音
に対するしやへい効果はほとんど期待できない。
Furthermore, as a conventional shielding device, there is a method of reducing the influence of external noise by, for example, placing the entire electric circuit shown in FIG. 1 in a conductor case and grounding the conductor case. However, in this case, although the effect of suppressing external noise can be expected, internal noise, that is, resistance 2,
It is impossible to prevent the noise generated from the transformer 3 from entering the integrated circuit 4, and almost no effect on suppressing this internal noise can be expected.

この考案は上記のような従来のものの欠点を除
去するためになされたもので、各電気部品の表面
に絶縁層およびこの絶縁層上に導電層を設けるこ
とにより、特別なしやへい機構を設けることなく
電気的しやへいできる電気回路のしやへい装置を
提供することを目的としている。
This idea was made in order to eliminate the drawbacks of the conventional ones as mentioned above, and by providing an insulating layer on the surface of each electrical component and a conductive layer on this insulating layer, a special insulation mechanism is provided. The purpose of the present invention is to provide an electrical circuit shielding device that can be electrically shielded without any problems.

第3図は本考案の一実施例を示す断面図であ
り、第3図中の符号1〜9は従来の第2図のもの
と同じであるので説明は省略する。
FIG. 3 is a cross-sectional view showing one embodiment of the present invention, and since the symbols 1 to 9 in FIG. 3 are the same as those in the conventional device shown in FIG. 2, their explanation will be omitted.

12は従来の第1図に示したプリント基板1、
抵抗2、トランス3および集積回路4等、各電気
部品の外面を一様に覆う絶縁層、13はこの絶縁
層10の外面を一様に覆う導電層で、この導電層
は接地電位に保持されるよう接続構成されてい
る。
12 is the conventional printed circuit board 1 shown in FIG.
An insulating layer uniformly covers the outer surface of each electrical component such as the resistor 2, transformer 3, integrated circuit 4, etc., and 13 is a conductive layer uniformly covering the outer surface of this insulating layer 10, and this conductive layer is held at a ground potential. The connection is configured to

なお、これら絶縁層10および導電層11はス
プレーガン等により被着形成されるものである。
Note that the insulating layer 10 and the conductive layer 11 are deposited using a spray gun or the like.

このような構成において、外来雑音が到来した
としても、各電気部品1〜4は絶縁層10を介し
て導電層11により覆われているので、外来雑音
の浸入は阻止され、十分なしやへいがなされる。
In such a configuration, even if external noise arrives, each of the electrical components 1 to 4 is covered with the conductive layer 11 via the insulating layer 10, so the intrusion of external noise is prevented and sufficient noise and noise are prevented. It will be done.

一方、各電気部品1〜4の内部で発生する内部
雑音についても同様に、外方へのふく射は導電層
11により阻止され、十分なしやへいがなされ
る。
On the other hand, internal noise generated inside each of the electrical components 1 to 4 is similarly prevented from radiating outward by the conductive layer 11, and is sufficiently suppressed.

これにより、外部雑音だけでなく内部雑音に対
してもしやへいがなされ、従来のように集積回路
4が誤動作を起こすと言つた問題もなく、安定か
つ高信頼の電気回路を形成することができる。
Thereby, not only external noise but also internal noise is protected, and a stable and highly reliable electric circuit can be formed without the problem of the integrated circuit 4 malfunctioning as in the conventional case.

なお、上記実施例ではプリント基板に配設され
た電気部品の場合について説明したが、その他シ
ヤーシ配線、立体回路等に適用してもよく、また
電気部品も抵抗、トランス、集積回路に限らず、
その他の電気部品に適用しても同様の効果を奏す
る。
In addition, although the above embodiment describes the case of electrical components arranged on a printed circuit board, it may also be applied to other chassis wiring, three-dimensional circuits, etc., and electrical components are not limited to resistors, transformers, integrated circuits, etc.
Similar effects can be obtained even when applied to other electrical components.

以上のように、この考案によれば各電気部品の
外面に絶縁層を介して一様に被着形成された導電
層を設けたので、外部雑音のみならず上記各電気
部品自身が発生、ふく射する内部雑音に対しても
十分なしやへい効果を得ることができ、しかも安
価に構成できると言う利点がある。
As described above, according to this invention, since a conductive layer is uniformly deposited on the outer surface of each electrical component through an insulating layer, not only external noise but also each electrical component itself generates and radiates radiation. It has the advantage that it can provide sufficient immunity against internal noise and can be constructed at low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のしやへい装置を示す斜視図、第
2図は第1図のA−A′部の断面図、第3図は本
考案の一実施例を示す断面図である。 図中1はプリント基板、2は抵抗、3はトラン
ス、4は集積回路、10は絶縁層、11は導電層
である。なお、図中、同一符号は同一又は相当部
分を示す。
FIG. 1 is a perspective view showing a conventional shielding device, FIG. 2 is a sectional view taken along line A-A' in FIG. 1, and FIG. 3 is a sectional view showing an embodiment of the present invention. In the figure, 1 is a printed circuit board, 2 is a resistor, 3 is a transformer, 4 is an integrated circuit, 10 is an insulating layer, and 11 is a conductive layer. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プリント基板上に配置された集積回路パツケー
ジ、このパツケージから外部へ導出された端子及
びこの端子が上記プリント基板を貫通して固定さ
れた上記プリント基板の裏面側設けられた導体パ
ターンのいずれの外面にも一様に被着形成された
絶縁層と、この絶縁層の外面に一様に被着形成さ
れた導電層とを備え、この導電層を接地電位に維
持することを特徴とした電気回路しやへい装置。
An integrated circuit package arranged on a printed circuit board, a terminal led out from this package, and a conductive pattern provided on the back side of the printed circuit board to which the terminal is fixed by penetrating the printed circuit board. An electrical circuit comprising an insulating layer uniformly deposited on the outer surface of the insulating layer and a conductive layer uniformly deposited on the outer surface of the insulating layer, the conductive layer being maintained at a ground potential. Yahei device.
JP1982197614U 1982-12-23 1982-12-23 Electric circuit protection device Granted JPS5999497U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982197614U JPS5999497U (en) 1982-12-23 1982-12-23 Electric circuit protection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982197614U JPS5999497U (en) 1982-12-23 1982-12-23 Electric circuit protection device

Publications (2)

Publication Number Publication Date
JPS5999497U JPS5999497U (en) 1984-07-05
JPH021914Y2 true JPH021914Y2 (en) 1990-01-17

Family

ID=30423052

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982197614U Granted JPS5999497U (en) 1982-12-23 1982-12-23 Electric circuit protection device

Country Status (1)

Country Link
JP (1) JPS5999497U (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH079439Y2 (en) * 1987-10-08 1995-03-06 ティーディーケイ株式会社 Electronic circuit board shield structure
JP2908188B2 (en) * 1993-08-17 1999-06-21 日本電気株式会社 Shield structure
JP6414763B1 (en) * 2017-08-31 2018-10-31 日新イオン機器株式会社 Ion beam irradiation equipment

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53127167U (en) * 1977-03-17 1978-10-09
JPS5726899U (en) * 1980-07-21 1982-02-12

Also Published As

Publication number Publication date
JPS5999497U (en) 1984-07-05

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