JPH021989A - Switching diode of high breakdown voltage - Google Patents

Switching diode of high breakdown voltage

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Publication number
JPH021989A
JPH021989A JP14282388A JP14282388A JPH021989A JP H021989 A JPH021989 A JP H021989A JP 14282388 A JP14282388 A JP 14282388A JP 14282388 A JP14282388 A JP 14282388A JP H021989 A JPH021989 A JP H021989A
Authority
JP
Japan
Prior art keywords
substrate
semiconductor substrate
high concentration
opposite
silicon substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14282388A
Other languages
Japanese (ja)
Inventor
Mikio Hatakeyama
畠山 幹男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP14282388A priority Critical patent/JPH021989A/en
Publication of JPH021989A publication Critical patent/JPH021989A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To make the polarity of a heat dissipating plate positive using an N-type semiconductor substrate so as to obtain a semiconductor device, possessed of a polarity opposite to that of a conventional one, of a P<+>NN<+> structure by a method wherein an impurity layer penetrating vertically through the semiconductor substrate, a high concentration impurity layer possessed of a conductivity type opposite to that of a substrate formed on one principle face of a silicon substrate, a high concentration impurity layer of the same conductivity type as that of a substrate selectively formed on the opposite principal face of the above silicon substrate, and metal electrodes fixed to those high impurity layers are provided. CONSTITUTION:An N-type semiconductor substrate 1 has a specific resistance of 40OMEGA or so and a thickness of 200mum or so. A P-type insulating layer 2 is selectively formed through a planar diffusion method, performed onto the semiconductor substrate 1 from both the faces, so as to penetrate vertically through a silicon substrate. Next, a P<+> high concentration impurity layer 3 is formed from one primary face of the semiconductor substrate 1. A junction is 20mum or so in depth. Then, an N<+> high concentration impurity is formed from the other primary face of the semiconductor substrate 1. The junction is 10mum or so in depth. Next, metal electrodes 5 and 6 are formed through evaporation. By these processes, a diode, which is very similar to a conventional one and whose electrode polarity is opposite to that of it, can be obtained and has an advantage in application.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はプレーナ接合による高耐圧のスイッチングダイ
オードの構造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to the structure of a high voltage switching diode using a planar junction.

従来の技術 CC東、プレーナ接合によるスイッチングダイオードの
構造としては、N”NP’″又はP”))N”構造かr
p +li、す、N P+接合又はPN+接合における
接合曲率部で耐圧が決まる(第3図及び第4図参照)。
Conventional technology CC East, the structure of a switching diode using a planar junction is N"NP'" or P"))N" structure or
The breakdown voltage is determined by the junction curvature in the P+ junction or the PN+ junction (see FIGS. 3 and 4).

又これらのチップを放熱板にマウントする場合には、プ
レーナ接合部がマウント面と反対方向になる様にマウン
トするために、N“N P”fMjbの場合にはN+面
がカソードとなり、P”PN+構造の場合にはP+面が
アノードとなる。
Also, when mounting these chips on a heat sink, the planar joint is mounted in the opposite direction to the mounting surface, so in the case of N"N P"fMjb, the N+ surface becomes the cathode, and P" In the case of a PN+ structure, the P+ surface becomes the anode.

発明が解決しようとする課題 上述した従来構造のブレーナ形ダイオードでは、′r導
体J、1H板の導電型によって放熱板の極性が決ま−−
+てしまい、同一の半導体基板を使用して放熱板の極性
の異なる半導体装置を作ることはできなかった。即ち、
N゛型基板を使用した時には、放熱板の極性はカソード
となり、放熱板基板をアノードにすることはできない。
Problems to be Solved by the Invention In the Brehner diode of the conventional structure described above, the polarity of the heat sink is determined by the conductivity type of the conductor J and the plate H.
Therefore, it was not possible to manufacture semiconductor devices with heat sinks having different polarities using the same semiconductor substrate. That is,
When an N-type substrate is used, the polarity of the heat sink becomes a cathode, and the heat sink substrate cannot be used as an anode.

従って、逆極性の半導体装置を得るためには、異なる導
電型の半導体基板を使用する必要があり、半導体装置の
設計上制約となる。
Therefore, in order to obtain a semiconductor device with reverse polarity, it is necessary to use semiconductor substrates of different conductivity types, which is a constraint on the design of the semiconductor device.

本発明は従来の上記実情に鑑みてなされたものであり、
従って本発明の目的は、従来の技術に内在する上記課題
を解決することを可能と・した新規な高耐圧スイッチン
グダイオードを提供することにある。
The present invention has been made in view of the above-mentioned conventional situation,
Therefore, an object of the present invention is to provide a novel high-voltage switching diode that makes it possible to solve the above-mentioned problems inherent in the conventional technology.

発明の従来技術に対する相違点 上述した従来の1トーナ形ダイオードに対し、本発明は
同一の半導体基板を用いて極性の異なる半導体装置を提
供することが可能である。
Differences between the invention and the prior art In contrast to the conventional one-toner diode described above, the present invention can provide semiconductor devices with different polarities using the same semiconductor substrate.

課題を解決するための手段 前記目的を達成する為に、本発明に係る高耐圧スイッチ
ングダイオードは、半導体基板を垂直に貫通する不純物
層と、シリコン基板の一主面に形成された基板と反対の
導電型をもつ高濃度不純物層と、前記シリコン基板の反
対側の主面に選択的に形成された基板と同一の導電型の
高濃度不純物層と、それぞれの高不純物層に固着された
金属電極とを備えて構成される。
Means for Solving the Problems In order to achieve the above object, a high voltage switching diode according to the present invention includes an impurity layer that vertically penetrates a semiconductor substrate, and an impurity layer formed on one main surface of a silicon substrate opposite to the substrate. A high concentration impurity layer having a conductivity type, a high concentration impurity layer having the same conductivity type as that of the substrate selectively formed on the opposite main surface of the silicon substrate, and a metal electrode fixed to each high impurity layer. It is composed of:

実施例 次に本発明をその好ましい各実施例について図面を参j
jrj シなから具体的に説明する。
EXAMPLES Next, the present invention will be described with reference to the drawings for its preferred embodiments.
I will explain it specifically.

第114は本発明による第1の実施例を示す縦断1r+
i l]である。
No. 114 is a longitudinal section 1r+ showing the first embodiment according to the present invention.
i l].

第11At−を明するに、参照番号1はN型土シダ体基
板を;rzシ、31.N型半導体基板1は抵抗率約40
ΩでJゾさは約20U7Lmである 「)をの絶縁層2が半導体基板1の両面からプレー1−
1tn2法により選択的に形成され、シリコンに板の東
面左向に4通している。
To clarify the 11th At-, reference number 1 indicates an N type soil fern body substrate; rz shi, 31. N-type semiconductor substrate 1 has a resistivity of approximately 40
The insulating layer 2 of Ω is approximately 20U7Lm.
It is selectively formed by the 1tn2 method, and four holes are passed through the silicon to the left on the east face of the board.

次に半導体基板1の一主面からP+高1度不縄物層3か
形成される。接合深さは約21)8階である。
Next, a P+1 degree non-contour layer 3 is formed from one main surface of the semiconductor substrate 1. The joining depth is approximately 21) 8 stories.

次に゛¥導体JS板1の反対(11の而からN1高濃度
を純杓層4が形成される。接合深さは約1O)lIII
である。
Next, a pure layer 4 with a high concentration of N1 is formed on the opposite side of the conductor JS plate 1 (from 11. The junction depth is about 1O) lIII
It is.

次に金属電極5と6が蒸首によって形成される。Metal electrodes 5 and 6 are then formed by vaporization.

第5図は本発明に係る半導体チップを放熱板にマウント
し、リード線3を′)けな後、樹脂封止したll7i而
を示す。
FIG. 5 shows a semiconductor chip according to the present invention mounted on a heat sink, the lead wires 3') cut off, and then sealed with resin.

以上シ;l明した一実施例は半導体基板1としてN型判
導体分用いた場合であるが1代わりにP型半導体を用い
てもほぼ同様に実現可能である。
In the embodiment described above, an N-type conductor is used as the semiconductor substrate 1, but it is also possible to use a P-type semiconductor instead.

第2図は本発明による第2の実施例を示す縦断面図であ
る。
FIG. 2 is a longitudinal sectional view showing a second embodiment of the present invention.

第2図において、本第2の実施例では、同−N基板上に
P”NN”ダイオードを2固並列に形成し、共通の金属
電極で両者のP+ベース、Illを電気的に接続するこ
とにより、P千ベース層を共通の・接地とする。
In FIG. 2, in the second embodiment, two P"NN" diodes are formed in parallel on the same -N substrate, and the P+ bases and Ill of both are electrically connected with a common metal electrode. Therefore, the P,000 base layer is made a common ground.

発明の詳細 な説明したように、本発明によれば、N型半導体基板を
用いて放熱板の極性は陽極となり、従来と反対極性の半
導体装置をP”NN+構造で得るこ′とができる。
As described in detail, according to the present invention, by using an N-type semiconductor substrate, the polarity of the heat sink becomes an anode, and it is possible to obtain a semiconductor device having a P''NN+ structure with a polarity opposite to that of the conventional semiconductor device.

一方、従来の方法で上と同一の極性の半導体装置を得る
にはP型半導体基板を用いるので、■)+PN“構造と
なる。
On the other hand, in order to obtain a semiconductor device with the same polarity as above using the conventional method, a P-type semiconductor substrate is used, resulting in a +PN" structure.

これに対応する反χ・を極性の半導体装置はN4NP”
構造であるから、本発明による半導体装置はその電気的
特性が非常に似た特性をもつのに対して l) 1%g
基板を用いた従来の構造の場合には電気的特性が上とは
異なったものとなる。これはPハ“厚基板とN型基板で
は半導体中の担体の移動度が胃なるためである。
The corresponding semiconductor device with anti-χ polarity is N4NP.
Because of the structure, the semiconductor device according to the present invention has very similar electrical characteristics.l) 1%g
In the case of a conventional structure using a substrate, the electrical characteristics will be different from the above. This is because the mobility of carriers in the semiconductor is different between a P-thick substrate and an N-type substrate.

よって本発明により、電極の極性が反対で電気的1?性
が非常に似たダイオードが得られ、装置応用E在(jl
となる。
Therefore, according to the present invention, the polarity of the electrodes is opposite and the electrical level is 1? A diode with very similar properties was obtained, and it is suitable for device applications.
becomes.

又、rt nの価格面においては、N型基板の方が1)
をJk板より製造し鴇いたy)に、コストが安いのて 
N Il’l 、J5板を使用した方がコストの安い半
導体装置を提供できるという有利な点が得られる。
Also, in terms of the price of rtn, N-type substrates are better1).
It is manufactured from Jk board and is cheaper.
Using the N Il'l, J5 board has the advantage that a semiconductor device can be provided at a lower cost.

=1 、 、I:4面の簡噴な説明 第1[71は本発明による第1の実施例を示す縦断面図
(FJ“NN+構造)、第21Mは本発明による第2の
実施例を示す縦断面図、第3図は本発明に係る寥導体千
・1アをケースに封止した時の状態を示す縦断面図、第
、1図は従来におけるこの種の装置の構造の縦断面図(
N”NP+構造)、第5図は従来におけるこの種の装;
4の構造の縦断面図([け PN+構造)である。
=1, ,I: Brief explanation of 4 sides 1st [71 is a vertical cross-sectional view showing the first embodiment according to the present invention (FJ"NN+ structure), 21M is a longitudinal cross-sectional view showing the second embodiment according to the present invention Figure 3 is a vertical cross-sectional view showing the state when the large conductor according to the present invention is sealed in a case, and Figures 1 and 1 are vertical cross-sectional views of the structure of a conventional device of this type. figure(
Figure 5 shows a conventional device of this kind;
FIG. 4 is a vertical cross-sectional view of the structure of No. 4 ([ke PN+ structure)].

1・・・N型半導体基板、2・・・P型絶縁層、3・・
・P+ベース層、4・・・N+ベース層、5.6・・・
金属電極、11]・・・シリコンチ・ツブ、11・・・
金属放熱板、!3・・・危属ワイヤ、14・・・樹脂、
15・・・リード、21・・・N型半導体基板、23・
・・P“ベース層、24・・・N”ベース層、2526
・・・金属電極、11・・・P型半導体基板、31・・
・N+ヘース層、34・・・P+ベース層、35.36
・・・倉属電極第 図
1... N-type semiconductor substrate, 2... P-type insulating layer, 3...
・P+ base layer, 4...N+ base layer, 5.6...
Metal electrode, 11]...Silicon chip, 11...
Metal heat sink! 3... Dangerous wire, 14... Resin,
15... Lead, 21... N-type semiconductor substrate, 23...
...P "base layer, 24...N" base layer, 2526
...Metal electrode, 11...P-type semiconductor substrate, 31...
・N+Heath layer, 34...P+base layer, 35.36
...Kuragen electrode diagram

Claims (1)

【特許請求の範囲】[Claims] 高抵抗率(40Ω・cm以上)を有する一導電型シリコ
ン基板と、拡散層が該シリコン基板の垂直方向において
貫通した上記シリコン基板と反対の導電型の不純物層と
、上記シリコン基板の一表面に形成され上記シリコン基
板と反対導電型の高濃度不純物層と、上記シリコン基板
の反対表面に選択的に形成され上記シリコン基板と同一
の導電型の高濃度不純物層と、上記2つの高濃度不純物
層上にそれぞれ形成された金属電極層とをもち、上記シ
リコン基板と反対導電型の高濃度不純物層側を半導体装
置の接地とすることを特徴とする高耐圧スイッチングダ
イオード。
a silicon substrate of one conductivity type having a high resistivity (40 Ω cm or more); an impurity layer of the opposite conductivity type to the silicon substrate through which a diffusion layer penetrates in the vertical direction of the silicon substrate; a high concentration impurity layer formed and having a conductivity type opposite to that of the silicon substrate; a high concentration impurity layer selectively formed on the opposite surface of the silicon substrate and having the same conductivity type as the silicon substrate; and the two high concentration impurity layers. 1. A high voltage switching diode having metal electrode layers formed thereon, the side of the high concentration impurity layer having a conductivity type opposite to that of the silicon substrate being grounded for the semiconductor device.
JP14282388A 1988-06-10 1988-06-10 Switching diode of high breakdown voltage Pending JPH021989A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14282388A JPH021989A (en) 1988-06-10 1988-06-10 Switching diode of high breakdown voltage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14282388A JPH021989A (en) 1988-06-10 1988-06-10 Switching diode of high breakdown voltage

Publications (1)

Publication Number Publication Date
JPH021989A true JPH021989A (en) 1990-01-08

Family

ID=15324457

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14282388A Pending JPH021989A (en) 1988-06-10 1988-06-10 Switching diode of high breakdown voltage

Country Status (1)

Country Link
JP (1) JPH021989A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53126384A (en) * 1977-04-05 1978-11-04 Tsuneo Iwasaki Production of specific patterned article
US5588297A (en) * 1993-09-22 1996-12-31 Saga University Thermal power generator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53126384A (en) * 1977-04-05 1978-11-04 Tsuneo Iwasaki Production of specific patterned article
US5588297A (en) * 1993-09-22 1996-12-31 Saga University Thermal power generator

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