JPH0219962Y2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Industrial Application Field The present invention relates to a semiconductor integrated device having a structure that contributes to improving manufacturing yield.

(B) Prior Art In a typical semiconductor integrated device, a large number of devices are simultaneously formed on one semiconductor wafer, and each device is formed separately using a scribe area between each device. FIG. 2 shows a partial vertical sectional view of an intermediate product of this conventional device. In the figure, A indicates a device area, and B indicates a scribe area. In the device region A, an insulating film 2 formed by the LOCOS method on the semiconductor substrate 1 and a second insulating film 3 constituting an interlayer insulating film are formed on the semiconductor substrate 1 in a portion adjacent to the scribe region.
are being accumulated one after another. The surface 1a of the semiconductor substrate 1 in the scribe region B is formed higher than the surface 1b of the semiconductor substrate under the insulating film 2.
This is because wet etching was used to pattern the gate electrode (not shown) and to form contact holes in the interlayer insulating film 3, and RIE (reactive ion etching) technology, which is suitable for integration, was also applied. In this case, the surface 1a' of the semiconductor substrate 1 in this scribe area B is formed downward by a stroke 4 as shown in FIG. This is because in the RIE technique, the selectivity ratio between the material to be etched and the underlying material cannot be as large as in the wet etching technique.

When forming a wiring pattern made of aluminum on the intermediate product shown in FIG. A resist film 6 is further applied over the entire surface, and this resist film is exposed and etched to perform patterning. Then, in addition to the resist film 5a remaining on the portion of the aluminum film 5 that is desired to be left, unnecessary resist residue 5b remains without being removed due to the large step difference. This is thought to be because the thickness of the resist film 5 increases in this portion, resulting in partial underexposure. When the aluminum film 4 is dry etched in this state using the RIE technique, the etching is anisotropic and the presence of the residue 5b leaves behind the necessary wiring pattern 4a. A necessary conductor piece 4b may be formed. This conductor piece 4
There is a risk that the conductor pieces 4b may be separated from the semiconductor substrate 1 due to vibrations received during a subsequent process, for example, a cleaning process using ultrasonic waves, and the separated conductor pieces 4b are reattached to the second insulating film 3 and form a wiring pattern. There was a risk that the adjacent parts of 4a would be short-circuited.

(c) Problems to be solved by the invention In conventional devices, as mentioned above, there is a risk that the conductor pieces may short-circuit between adjacent wiring patterns, which reduces manufacturing yield and results in lower product prices. It was preventing the decline.

The present invention has been devised in view of this point, and it is an object of the present invention to provide a semiconductor integrated device having a structure that prevents the conductor pieces from coming loose.

(d) Means for solving the problem The present invention uses dummy wiring, which is electrically insulated from the wiring pattern, from the insulator film in the device area to the scribe area, and connects it to the material constituting the wiring pattern. These are semiconductor integrated devices made of the same material.

(E) Effect As described above, in the present invention, a dummy wiring is provided from the insulator film in the device area to the scribe area.In other words, this dummy wiring is connected to the pole of the semiconductor substrate constituting the scribe area, as in the conventional example. Unlike the case where the conductor piece is attached only to a limited area, the dummy wiring is attached over a wide area, so this dummy wiring will not come loose during the next cleaning process, etc., to prevent short-circuit accidents in the wiring pattern. Can be done.

(F) Embodiment FIG. 1 shows a sectional view of the main part of the device of the present invention. In the figure, A is a device area and B is a scribe area. The semiconductor substrate 1 includes a main body portion 11 belonging to the device region and an adjacent portion 12 extending from the main body portion and belonging to the scribe region B. Although silicon single crystal is used as the substrate material, other compound semiconductors such as GaAs crystal substrates may also be used.

Reference numeral 2 denotes an insulating film for element isolation formed on the main body portion 11, and is usually formed by the well-known Locos method. This insulator film 2 is made of SiO ₂ . 3 is a second insulating film for interlayer insulation formed on this insulating film 2, and for example, when this device is used,
In the case of a MOSFET, this second insulating film is also formed on the gate electrode formed on the gate insulating film. A contact hole is provided in this second insulating film opposite to this gate electrode. 4
Reference character a denotes a wiring pattern formed on the second insulating film 3, and is made of aluminum. This wiring pattern 4a is formed by attaching an aluminum film 4 to the entire surface, leaving a resist film 5 on the portions of the aluminum film 4 that are desired to be left, and then etching this aluminum film using RIE technology to form a pattern along with the wiring pattern 4a. A dummy wiring 4b' is left from the device area A to the scribe area B. This dummy wiring 4b' is arranged apart from the wiring pattern 4a and is electrically insulated. Note that a mixed gas of chlorine (BCl ₃ , CCl ₄ ) and freon (CF ₄ ) gas is used as the etching gas for aluminum, and the etching ratio of aluminum to silicon is approximately 3.
Since this dummy wiring 4b' is attached to the semiconductor substrate and the insulating film over a wider area than the conventional conductor piece, it will not fall off due to external forces received in the next process and subsequent steps, and will not fall off in the final product. left behind. Incidentally, the resist film 5 is removed after the wiring pattern is attached, and necessary post-processing is then performed to complete the device, but the explanation thereof will be omitted since it is outside the scope of the present invention.

(g) Effects of the invention Since the device of the present invention is constructed as described above,
Even when etching is performed using RIE technology for miniaturization, it is possible to remove minute conductor pieces and eliminate the drawback that these liberated conductor pieces short circuit the wiring pattern, improving device manufacturing yield. This can contribute to lower prices.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of essential parts of one embodiment of the device of the present invention;
2 and 3 are sectional views of main parts of intermediate products of different conventional devices, and FIGS. 4 and 5 are illustrations of subsequent steps in the conventional device of FIG. 3. 1...Semiconductor substrate, A...Device area, B...
...Scribe area, 2, 3...Insulator film, 4a...
...Wiring pattern, 4b'...Dummy wiring.

Claims (1)

[Scope of utility model registration request] A semiconductor integrated device comprising a device region having a portion formed by sequentially stacking an insulating film and a wiring pattern on a main portion of a semiconductor substrate, and a scribe region including an adjacent portion extending from the main portion of the semiconductor substrate. In the apparatus, a dummy wiring electrically insulated from the wiring pattern is formed from the same material as the wiring pattern from the insulating film in the device region to the adjacent part of the scribe region. A semiconductor integrated device characterized by being attached with.