JPH02200067A - Picture quality improving circuit - Google Patents

Abstract

PURPOSE:To prevent a black vertical line or point from being crushed on a picture with high luminance by providing a delay signal generation circuit, and deviating a timing to sharpen the contour part of a video signal. CONSTITUTION:A subtraction circuit 8 subtracts the video signal (c) delayed by delay circuits 2 and 3 from the video signal (a), and full-wave rectification is applied on the signal at a rectifier circuit 9. The output (f) of the rectifier circuit 9 is added on a contour signal (d) outputted from a subtraction circuit 6 at an adder circuit 10, and supplied to a contour formation circuit 7 as a control signal, and the subtraction circuits 4, 5, and 6 constitute a first contour signal generation circuit, and the subtraction circuit 8 and the rectifier circuit 9 constitute a second contour signal generation circuit. At such a case, the timing to sharpen the contour part of the video signal outputted from the contour formation circuit 7 can be deviated by generating the contour signal (f) consisting of the subtraction circuit 8 and the rectifier circuit 9 and generating a control signal (g) by adding the signal (f) on a 2nd-order differentiation signal (d). In such a manner, it is possible to prevent a white signal from being recognized as being swollen on a screen.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention sharpens a portion of a video signal corresponding to the contour of an image (hereinafter referred to as the contour of the video signal) to improve the sharpness of a reproduced image. This invention relates to an image quality improvement circuit that improves image quality.

[Conventional technology]

As a way to improve image sharpness, the video signal is
A well-known method is to perform second-order differentiation, invert and amplify the result, and add it to the original video signal. However, there is an upper limit to the transmission band of video signals in television receivers, etc., and wide-band components are attenuated, so the above method causes wide preshoots and overshoots in the contours of the video signal. In many cases, this actually reduces the image quality. Therefore, a method has been proposed in which the contour of the video signal is made steeper without adding preshoot or overshoot, and an example thereof is shown in FIG.

As this type of device, for example, the Japanese Patent Publication No. 62-353
Publication No. 13 and PP22 of the October 1985 issue of TV Technology
For example, there is a time compression shadow contour correction circuit shown in No.-26.

Hereinafter, FIG. 20 will be briefly explained.

In FIG. 20, 1 is an image quality improvement circuit, T1 is an input terminal, 2 and 3 are delay circuits that sequentially delay the video signal input from the input terminal T1, 4, 5.6 are subtraction circuits, and 7 is a subtraction circuit 6. a delay circuit 2 which is controlled by the output signal of and sequentially delays the video signal input from the input terminal T1 and the video signal input from the input terminal T1;
T2 is an output terminal, 21 is an image quality adjustment circuit, and VS is an image quality adjustment voltage that controls the image quality adjustment circuit 21. This is a circuit that generates

Next, the operation will be explained using FIG. 18.

FIG. 21 shows the signal waveforms of each part a to e shown in FIG.
Assuming that the delay times of 3 are equal, the results will be as shown in a-C shown in FIG. 21.

The subtracting circuits 4, 5.6 constitute a contour signal generation circuit that extracts a contour signal d indicating the contour portion of the video signal from the three signals a'' and Q described above, and the contour signal d is expressed by the following formula. .

d = (b-c) - (a-b) = -0) The contour signal d is supplied as a control signal to the contour forming circuit 7, and the contour forming circuit 7 is controlled by the contour signal d and outputs each signal a to c. A video signal with steep contours as shown in FIG. 21 is output.

Furthermore, in television receivers, it is used in combination with an image quality adjustment circuit 21 that amplifies (peaks) high-frequency signals and adds shots, so that the image quality can be controlled according to the user's preference, and the amount of shots added. is controlled by the image quality saving voltage vS. In this case, since the image quality improvement circuit 1 increases high frequency components in the contour part of the video signal, the image quality adjustment circuit 21 increases the peaking frequency band to a higher level, as shown in waveform E' in FIG. A narrow chute can be added.

In FIG. 19, the waveform of the broken line A is the input video signal, the waveform of the solid line E is the video signal output from the contour forming circuit 1, and the waveform of the broken line A' is the image quality of the input video signal A with peaking of the conventional high frequency signal. Waveform when processed by adjustment circuit, solid line E
' is a waveform obtained when the output of the image quality improvement circuit 1 is processed by the image quality adjustment circuit 21 that peaks signals in higher frequency bands.

[The problem that the invention attempts to solve]

It is generally known that a cathode ray tube has a phenomenon in which the beam spot diameter increases as the beam current increases. As shown in waveform E' in Fig. 19, if a shoot is added by the image quality adjustment circuit after making the contour of the video signal steep, the peak point of the shoot in the white direction will be reached without the conventional process of making the contour sharp. Compared to the waveform A' when the image quality is adjusted to , the waveform is closer to the nail side. Moreover, since the beam spot diameter increases at the peak point, the white part on the screen appears to bulge out toward the nail, causing the problem that, for example, thin vertical black lines or black dots are crushed and the image quality deteriorates. 6 [Means for solving the problem] The above purpose is achieved by at least the first method of sequentially delaying the human video signal. Second. Third. a delay signal generation circuit that generates a fourth delay signal; and a delay signal generation circuit that generates the input video signal and the second . Fourth
a first contour signal generation circuit for generating a first contour signal from a delayed signal of the input video signal and the second contour signal; and a contour forming circuit which receives a fourth delay signal and forms and outputs a video signal having a steep contour under the control of the control signal. a second contour signal generation circuit that generates a second contour signal from the third delayed signal; This is achieved by providing an adder circuit for adding the second contour signals and using the output signal of the adder circuit as a control signal for the contour forming circuit.

[Effect]

The first contour signal generation circuit outputs a signal obtained by second-order differentiation of the video signal, and the second contour signal generation circuit generates a pulse having a constant polarity for the contour portion of the video signal. Conventionally, the contour forming circuit was controlled by the first contour signal, but in the present invention, by adding the second contour signal to this control signal, the timing at which the contour portion of the video signal is made steeper is shifted.

This timing shift has the effect of delaying the rise point of the contour portion changing from black to white and hastening the fall point of the contour portion changing from white to black in the video signal.

As a result, a video signal in which the white signal width of the video signal is reduced and the contour portion is made steep is output from the contour forming circuit.

That is, by reducing the white signal width in advance, it is possible to prevent the white signal from appearing bulged on the screen.

〔Example〕

Examples of the present invention will be described below.

FIG. 1 is a block diagram showing an embodiment of the image quality improvement circuit according to the present invention. Components that are the same as the conventional example shown in FIG. , a detailed explanation thereof will be omitted.

In Figure 1, 8 is a subtraction circuit, 9 is a rectification circuit, 10 is a rectification circuit, and 10 is a subtraction circuit.
is an adder circuit. The subtraction circuit 8 subtracts the video signal C delayed by the delay circuits 2 and 3 from the video signal a input from the input terminal T1, and the output thereof is full-wave rectified in the rectifier circuit 9. The output f of the rectifier circuit 9 and the contour signal d output from the subtraction circuit 6 are added in an adder circuit IO, and the output g is supplied as a control signal to the contour forming circuit 7, and the output g is supplied to the contour forming circuit 7 as a control signal. 6 constitutes a first contour signal generation circuit, and subtraction circuit 8. The rectifier circuit 9 constitutes a second contour signal generating circuit. In addition, the configuration example of the contour forming circuit 7 is shown in the second example.
As shown in the figure. In FIG. 2, T3. T4. T5. T6 is an input terminal, T7 is an output terminal, and 11 is an input terminal T3. T4
The maximum value circuit 12, which extracts and outputs the largest signal (the whitest signal on the screen) from the video signals a, b, and a supplied from T5, is connected to the input terminal T3. T4. A minimum value circuit extracts and outputs the lowest level signal (the blackest signal on the screen) from the video signals c, b, and a supplied from T5, and 13 is the output signal Max of the maximum value circuit 11 and the minimum value. This is an adding circuit that adds the output signals Min of the circuit 12, and the addition ratio is controlled by the control signal g supplied from the input terminal T6, and the output signal e of the adding circuit 13 is added to the output terminal T.
7 as the output of the contour forming circuit 7.

Next, FIG. 3 shows the operating waveforms of each part of the embodiment according to the present invention shown in FIGS. 1 and 2. It is given the same symbol as the symbol. In FIG. 1, a subtracting circuit 8 subtracts a delayed video signal C from a video signal a to output a first-order differentiated contour signal, which is full-wave rectified in a rectifier circuit 9 to produce a third-order differentiated contour signal. A contour signal having a unidirectional polarity pulse as shown in waveform f in the figure is obtained. As shown in FIG. 3, the control signal I obtained by adding the output f of the rectifier circuit 9 and the output d of the subtractor circuit 6 is minus The result is a signal with a wider pulse width of directional polarity. The adder circuit 13 of the contour forming circuit 7 shown in FIG. 2 is controlled by this control signal 9.

When the control signal 2 is approximately at the reference level, the output signal Max of the maximum value circuit 13 and the minimum value signal Min are added by approximately 172 and output, and when the control signal level is negative than the reference level, the maximum value circuit The addition ratio of the output signal Max of 11 is made small, so that the output signal e of the addition port j@13 becomes almost only the output signal Min of the minimum value circuit 12,
Conversely, when the control signal level is more positive than the reference level, the addition ratio of the output signal Min of the minimum value circuit 12 is reduced, and the output signal e of the adder circuit 13 is almost equal to the output signal Max of the maximum value circuit 11. It works as expected. As a result, the third
As shown in the figure, the output e of the contour forming circuit rises sharply at time t2 when the control signal level changes from the negative side to the positive side relative to the reference level, and the control signal 8 changes from the positive side to the negative side relative to the reference level. It falls sharply at the point t□. Here, if the contour signal d in the conventional circuit is used as the control signal for the contour forming circuit 7, the output signal e rises at time t1 and falls at time t4, as shown in FIG.

That is, in the present invention, in contrast to the conventional circuit, a contour signal f consisting of a subtraction circuit 8 and a rectification circuit 9 is generated, and this signal f is
By adding it to the second differential signal d to create the control signal g,
The timing at which the contour portion of the video signal output from the contour forming circuit 7 is made steep is shifted. Moreover, this timing shift acts to reduce the width of the signal that appears white on the screen, so even when a shoot is added in combination with an image quality adjustment circuit, it is effective in preventing black vertical lines and dots from being crushed on the screen. is obtained. In other words, the present invention subtracts in advance from the video signal the amount by which a white signal at a high luminance level appears to swell on the screen, and at the same time sharpens the contour.

FIG. 4 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention. Components that are the same or have the same functions as those described in FIG. Omitted. In the same figure, lzu, 15, 16.17
is a delay circuit which sequentially delays the video signal input from the input terminal T1.

Generate b, i, a. Output signal of delay circuit 14.

The output signal i of the delay circuit 16 is supplied to a subtraction circuit 8, and the subtraction circuit 8 outputs a signal obtained by subtracting the signal i from the signal i. In the embodiment shown in FIG. 4, by changing the delay time of the video signal supplied to the subtraction port N18, it is possible to change the frequency characteristics of the contour signal obtained by firstly differentiating the video signal output from the subtraction circuit 8. This has the effect that the frequency at which the white signal cutting effect described in FIG. 1 works can be set to any band.

FIG. 5 is a block diagram showing still another embodiment of the image quality improvement circuit according to the present invention. Components that are the same or have the same functions as those described in FIG. is omitted. In the same figure, T8 is an input terminal;
18 is a variable gain amplifier circuit. Variable gain amplifier circuit 18
is input from input terminal T8.

The amplification gain is controlled by the input signal to amplify the contour signal f of the rectifier circuit 9, and the output f' is sent to the adder circuit 1.
0 is added to the output contour signal d of the subtraction circuit 6. Fifth
In the embodiment shown in the figure, since the magnitude of the contour signal f output from the rectifier circuit 9 is controlled by the variable gain amplifier circuit 18, the white signal of the video signal is controlled by the signal supplied from the input terminal T8. You can control the amount of width removed. For example, as a signal to be supplied to this input terminal T8,
When the image quality adjustment voltage of the image quality adjustment circuit that controls image quality is applied to a color television receiver, the image quality increases (
It is possible to perform operations in accordance with the image quality setting, such as increasing the size of the added chute (increasing the added chute) and increasing the white signal width in the contour forming circuit 7 in conjunction with this. This is shown in FIG.

FIG. 6 is a block diagram showing an example of a color television receiver using the image quality improvement circuit 1 shown in FIG. In the figure, T9 is an input terminal into which a color video signal is input, and 19 is an input terminal from which a color video signal is input.

20 demodulates the color signal separated by the y-c separation port 1819 to produce three color difference signals (R-Y) and (G-Y).

This is a color demodulation circuit that outputs (B-Y). The luminance signal separated by the Y-C separation circuit 19 is sent to the image quality improvement circuit 1 to form a luminance signal with steep contours, and the output thereof is supplied to the image quality adjustment circuit 21.

In the image quality adjustment circuit 21, 22 and 23 are delay circuits that sequentially delay the output signals of the image quality improvement circuit, 24 is a subtraction circuit that subtracts the output of the delay circuit 22 from the output of the image quality improvement circuit, and 25 is a subtraction circuit that subtracts the output of the delay circuit 22 from the output of the image quality improvement circuit. 26 is a subtraction circuit that subtracts the output of the delay circuit 23, 26 is a subtraction circuit that subtracts the output of the subtraction circuit 24 from the output of the subtraction circuit 25, and outputs a contour signal obtained by second-order differentiation of the video signal; 27 is the output of the subtraction circuit 26. A variable gain amplifier circuit 28 that controls the magnitude of the signal is an addition circuit that adds the output of the delay circuit 22 and the output of the variable gain amplifier circuit, and outputs this as the output of the image quality adjustment circuit 21. 29 is a luminance signal processing circuit into which the output of the image quality adjustment circuit 21 is input and performs adjustment of brightness and contrast on one screen; 30 is a 3M color signal from the output of the color demodulation circuit 20 and the output of the luminance signal processing circuit 29; A matrix circuit outputting R, G, and B, and 31 are color cathode ray tubes. vs is a circuit that generates an image quality adjustment voltage that controls image quality, and its output is sent to the variable gain amplifier circuit 27 of the image quality adjustment circuit 21.
At the same time, it is supplied to the input terminal T8 of the image quality improvement circuit 1. In addition, the image quality improvement port l1j1. In order to change the control operation of the image quality adjustment circuit 21, weighted control voltages may be applied to each of them, and variable gain amplifier circuits 18. The variable rate in and 27 may be changed.

FIG. 7 is a circuit diagram showing a specific circuit example of the image quality improvement circuit shown in FIG. 5. Components that are the same or have the same functions as those shown in FIG. Further explanation will be omitted. In Fig. 7, Q to Q are transistors, R1 to R are resistors, and ■.

-I is a current source, VBIy VBx is a voltage source, Vcc is a circuit power supply, and the circuit 32 surrounded by a broken line is a contour signal generation circuit composed of the subtraction circuits 4, 5.6 in FIG. .

Transistors Ql, Q2 . The resistors RL and R2 form a differential pair, and the input video signal a and the output signal C of the delay circuit 3 are input to the bases of the transistors Ql and Q2, respectively. A resistor 'hlR4 serving as a load is connected to the collectors of the transistors Ql and Q2, and from this connection point, the output signal C of the delay port $3 is subtracted from the input video signal a to derive two signals with different polarities, and the rectifier circuit 9 transistor Q4. It is input to the base of Q5. transistor Q
4. The emitters of Q5 are commonly connected, and a full-wave rectified signal is derived from this connection point, and the signal is connected to the base of transistor 07 of variable gain amplifier circuit 18. Further, the resistor R5 and current source I2 of the subtraction circuit 8 generate a bias voltage, which is input to the base of the transistor Q8 of the variable gain amplifier circuit 18 via the emitter follower of the transistor Q6.

In the variable gain amplifier circuit 18, the signal supplied from the rectifier circuit 9 is transmitted through transistors Q7, Q8, and resistor R.
It is converted into a current signal by a differential pair consisting of 6°R7, and is transmitted to a current signal by transistors Q7. Connected to Q8 collector. 09~
The magnitude of the current signal is controlled by the control signal supplied from the input terminal T8 in the two differential pairs consisting of 012, and the signal current whose magnitude is controlled is applied to the resistors R12 and R13 of the adder circuit 10. converted back into a voltage signal.

The input video signal a is input to the base of the transistor 013 of the contour signal generation circuit 32, and the transistor Q14゜Q1
The output signal C of the delay circuit 2 is input to the base of the transistor 016, and the output signal C of the delay circuit 3 is input to the base of the transistor 016. Transistor Q13. The collector of Q16 is connected to R13, transistor Q14. The collector of Q15 is connected to R12 and added to the output of the variable gain amplifier circuit, and the voltage signal g derived from R13 is applied to the contour forming port 17.
Eight control signals are provided.

In this embodiment as well, the same operation and effect as explained in FIG. 5 can be obtained.

FIG. 8 is a circuit diagram showing a specific circuit example of the adder circuit 13 in FIG. 2, in which TIO, Tit, T12. T13 is an input terminal, T14 is an output terminal, and Q17 to Q32 are transistors.

R14-R17 are resistors, CI is capacitors, T8-II
3 is a current source, and VO2 is a voltage source.

A control signal g input to the contour forming circuit 7 is supplied from the input terminal TIO, and the transistors 017. R15, Q2
The signal is supplied to the base of one transistor 029 forming the differential pair via 2°Q23. The base of the other transistor Q25 of the differential pair is connected to R14, Q18 . Q1
9゜Q20. A signal obtained by sampling the level of the control signal 2 input from the input terminal TIO without the contour signal is supplied via the transistor Q21 by the sample and hold circuit composed of C1. The sample and hold circuit is controlled by a sampling pulse inputted from the input terminal T1, performs sampling during a horizontal retrace period when there is no video signal, and holds it during the video signal period.

The output signal Max of the maximum value circuit 11 is output from the input terminal T12.
is input and supplied to the 026 base. Further, the output Min of the maximum/h value circuit 12 is inputted from the input terminal TI3, and is supplied to the 028 base. Q26. Q27 and Q
28°Q29 constitute a differential pair, and the commonly connected emitters have Q24. The collector of Q25 is connected. In addition, the collectors of 026, 02B are connected to the Q30 collector, the Q27, 29 collectors are connected to the Q31 collector, and the 030 base is connected to the Q30 collector.
31 base to form a current mirror circuit. The signal derived from the point where the collectors of Q27゜Q29 are commonly connected is output to the output terminal T14 via the emitter follower of the transistor Q32, and is also fed back to the base of the transistor 029 and the base of the transistor 029 that constitute the differential pair. Ru.

Here, transistor Q26. The mutual conductance of the differential pair consisting of Q27 is 9.1- Transistor Q28
゜The mutual conductance of the differential pair consisting of Q29 is / m
z, and the transistor Q27. is viewed from the base side of the transistor Q32. Q29. If the impedance at the point where the Q30 collectors are commonly connected is R6, and the signal output from the output terminal T14 is e, then e = Ro ((Max-e)z,, + (Min-
e) g, z ) - (2) holds, and by transforming the above equation, the following equation can be obtained.

Here, (>-++2□2)RO is sufficiently larger than 1, and if we set K = i), / (9-+ + 9-x), the above equation becomes e = K-Max+ (1-K) Min
-(4). From this, the mutual conductance of the differential pair is 4.

&. The signal Ma that occupies the output signal e according to the ratio of
The levels of x and signal Min change. Further, the transconductance %119U2 is proportional to the value of the current flowing through the commonly connected emitters of the differential pair, and the transconductance %119U2 is proportional to the value of the current flowing through the commonly connected emitters of the differential pair.
Since the current ratio flowing through the two differential pairs is controlled by Q25, as explained in FIG.
3 controls two signals Max and Min by control signal 2.
The addition ratio of is controlled.

FIG. 9 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention. Components that are the same or have the same functions as those described in each of the above-mentioned embodiments are given the same reference numerals, and detailed explanations thereof are given. Explanation will be omitted. In the same figure, 33
, 34 and 35 are subtraction circuits, and 36 is an addition circuit. It is assumed that the delay times of delay circuits 14 and 17 are equal, and that the delay times of delay circuits 15 and 16 are also equal, τ2. Furthermore, the sum of the delay times of delay circuits 14 and 15 is set equal to the delay time of delay circuit 2 explained with reference to FIG. In other words, τ=τ□+τ. Subtraction circuits 33, 34
．． 35 is a delay circuit 14, 1 similar to the subtraction circuit 4゜5.6.
5.16 output signal b.

A third contour signal generation circuit is configured to extract a contour signal j from i, and the contour signal j is expressed by the following formula.

j= (b-i) (h-b) ... (5
) Contour signal d output from the subtraction circuit 6 in FIG.
The frequency characteristic is a comb-shaped characteristic in which points where the signal level is maximum and points where it is minimum occur alternately with respect to the frequency, as shown by fid in FIG. In FIG. 10, the frequency f9 at which the signal level is maximum is determined by the delay circuit 2 shown in FIG.
, 3, and assuming that the delay times of delay circuits 2 and 3 are equal as described above, it is expressed as follows. The frequency f at which the contour signal d is maximum is generally set to approximately 2 to 3 M1lz, which is visually noticeable. Then, as shown in Fig. 10, the point where the frequency becomes 2f,
That is, the contour signal d becomes zero near 4 to 6 M)lx, and the video signal in this frequency band causes the disadvantage that the contour portion cannot be sharpened. Therefore, the subtraction circuit 33,
Adding a third contour signal generation circuit consisting of 34.35,
By adding the output signal d of the subtraction circuit 6 and the output signal j of the subtraction circuit 35 in an addition circuit 36, the contour signal is made to have a wide band.

Now, the delay time is 0. If the ratio of T2 is set to τ, :τ2=1:2, each contour signal d+j has the frequency characteristic shown in FIG. In FIG. 10, the contour signal d
The frequency f at which the signal level of
), it is expressed as ``2r=2(τ,+τJ'''(7), and the frequency f, / at which the signal level of the contour signal j is maximum is similarly f''=2t, ...(8). Furthermore, the frequencies at which the contour signals d and j are minimum are frequencies that are even multiples of the values shown in equations (7) and (8) above.Therefore, the delay time is 0.
When the ratio of T2 is 1=2, the frequency f at which both contour signals d and j are minimum. is f, = 6f, = 4f,
'...(9). This is the contour signal d, j
The added contour signal k is the minimum frequency, and by using this contour signal k as a control signal for the contour forming circuit 7, the frequency range in which the contour can be sharpened can be expanded six times.

FIG. 11 is a block diagram showing another embodiment of the picture quality improvement circuit according to the present invention. Components that are the same as or have the same functions as those of the above embodiments of the picture quality improvement circuit according to the present invention are denoted by the same reference numerals. Detailed explanation will be omitted. In the figure, 37 is an adder circuit into which the output signal of the delay circuit 2 and the output signal e of the contour forming circuit 7 are input, and the addition ratio of the two signals is controlled by a control signal, and TI5 is an adder of the adder circuit 37. This is the input terminal for the control voltage that controls the ratio.

Conventional image quality improvement circuits sharpen the contours of a video signal to improve sharpness, but on the other hand, on a noisy screen, the noise may be emphasized and the image quality may be degraded. In addition, the image quality improvement circuit does not reproduce signals lost in the transmission path, but artificially generates and adds signals that are presumed to have been lost, so some images may appear unnatural. It may happen. So the 11th
In the embodiment shown in the figure, the adding circuit 37
At step 67, the output signal e is switched between an output signal e with a steep outline and a signal S which is a delayed input video signal. The addition circuit 37 is capable of varying the addition ratio of the two input signals.

The addition ratio is controlled by the control voltage input through the input terminal T15. Now, if this addition ratio is α and the output signal of the addition circuit 37 is e', then e' = a ・e+
(1-a) ・b − (10) However, O≦α≦
It becomes 1. That is, by controlling the addition ratio α, the output signal e' of the addition circuit 37 can be switched between a signal e with a sharpened contour and a signal with a delay of the input video signal, thereby reducing noise in the input signal. If there is a large amount of noise, by using a signal obtained by delaying the input signal as the output signal e' of the adder circuit 37, the noise will not be emphasized more than necessary.

Next, FIG. 12 is a block diagram showing an embodiment of a color television receiver using the image quality improvement circuit 1 shown in FIG. are given the same reference numerals and detailed explanation thereof will be omitted.

In FIG. 12, 38 is a video signal generation circuit, T16
is an input terminal, the video signal generated by the video signal generation circuit 38 is inputted to the input terminal T9, the control signal outputted from the video signal generation circuit 38 is inputted to the input terminal T16, and is input to the input terminal of the image quality improvement circuit 1. It is input to T15.

The device connected as the video signal generation circuit 38 is a television tuner, a VTR, or the like. For example, in the case of a television tuner, when the radio waves received from the antenna become weak, noise in the reproduced video signal increases. Therefore, by generating a voltage according to the strength of radio waves received from the antenna and inputting this as a control signal from the input terminal T16, it is possible to solve the problem that noise is emphasized in the image quality improvement circuit 1. In addition, in the case of a VTR, the jitter of the signal during playback emphasizes the unevenness that occurs in the vertical line, so in such a case, it is preferable to apply the playback operation signal of the VTR to the input terminal T16. Furthermore, in addition to inputting the control signal from the video signal generation circuit 38, the input terminal T16 may also be provided with a signal generation circuit that allows the user to switch signals according to his or her preference. .

FIG. 13 is a block diagram showing another embodiment of a color television receiver using the image quality improvement circuit 1 shown in FIG. 11, which is the same as that shown in FIG. 12 or has the same function. are given the same reference numerals and detailed explanation thereof will be omitted. In FIG. 13, 39 is a microcomputer, 40 is a sensor 541 is a remote control device. In recent years, with modern television receivers, users can change the picture quality to suit their tastes, switch input devices, etc., and in most cases use a remote control device to control operations from a remote location away from the television receiver. Do more. FIG. 13 shows such a device, in which a signal from a remote control device 41 is received and inputted by a sensor 40 to a microcomputer 39, and a control signal inputted from an input terminal T16 is also supplied. 9. Various control signals are output from the microcomputer 39. Here, the control signal input from the microcomputer 39 to the brightness signal processing circuit 29 is a signal for adjusting brightness and contrast. In this embodiment, by using a microcomputer, it is possible to perform not only simple control but also programmed and complex processing control.

FIG. 14 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention, in which 42, 43, and 44 are delay circuits;
45, 46, and 47 are subtraction circuits, 48 is a variable gain amplification circuit, and 49 is an addition circuit. Items that are the same as those described in each embodiment or have the same functions are given the same reference numerals, and their details will be described. Further explanation will be omitted. In FIG. 14, the video signal input from the input terminal T1 is sent to the delay circuit 42.
, 43 and 44, the subtraction circuit 45 subtracts the input video signal C from the output n of the delay circuit 43, and the subtraction circuit 46 subtracts the input video signal C from the output m of the delay circuit 42.
Subtract. The subtraction circuit 47 subtracts the output O of the delay circuit 44 from the input video signal Q, and the variable gain amplification port N48 adjusts the magnitude of the output signal of the subtraction circuit 47 under the control of a control signal supplied from the input terminal T8. . The outputs p and q of the subtraction circuits 45 and 46 are input to the adder circuit 49, the addition ratio of the two input signals is controlled by the output γ of the variable gain amplifier circuit 48, and the output S of the adder circuit 49 is input to the contour forming circuit 7. is supplied as a control signal. FIG. 15 shows the operating waveforms of each part.

If the addition ratio of the addition circuit 49 controlled by the output γ of the variable gain amplification port 144B is β, the output S of the addition circuit 49 is S=β・P+ (1−β)・q (11) However, It is expressed as O≦β≦1. Now, the value of the output γ of the variable gain amplifier circuit 48 is a level with no contour signal (this is set as the first reference level)
When , β = 0.5, and when it is more positive than the 1'th $ level, β > 0.5. If it is more negative than the first reference level, β<0.5.

First, by the control signal input from the input terminal T8.

The output γ of the variable gain amplifier circuit 48 is the minimum, that is, the 15th
When the waveform γ has a constant value almost equal to the reference level as shown by the broken line in the figure, the output S of the adder circuit 49 is S = 0.5 p + 0.5 q (1
2), and as shown by the broken line in the waveform S of FIG. 15, the waveform becomes vertically balanced around the level where there is no contour signal (this is taken as the second reference level). Next, the gain of the variable gain amplifier circuit 48 is amplified, and when the signal is as shown in the solid line of the waveform γ in FIG. The ratio of the output p of the subtraction circuit 45 increases, and as shown by the solid line in the waveform S in FIG. 15, the signal on the negative side becomes larger than the second reference level, and when the signal γ is negative than the first reference level, Output q of the subtraction circuit 46 in the output signal S of the addition circuit 49
The ratio becomes larger, and as shown in FIG. 15, the negative side becomes larger than the second reference level. From this, when the contour forming port 1Ir7 is controlled by the output signal S of the adder circuit 49, as explained in FIG.
Depending on the magnitude of the output signal γ, the rising time is between t and t.
2, the falling point changes from t4 to t3, and as shown in FIG. 1, the white signal width can be reduced and at the same time the contour can be made steeper.

FIG. 16 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention. Components that are the same or have the same functions as those shown in FIG. Omitted. In FIG. 16, 50 is a first-order differentiation circuit that outputs a contour signal obtained by first-order differentiation of the video signal inputted from the input terminal T1, and 51 is a rectification circuit 9 that outputs a signal obtained by delaying the output of the first-order differentiation circuit. This is a delay circuit that supplies

The embodiment shown in FIG. 16 uses a subtraction circuit that subtracts signals with different delay times to obtain a first-order differentiated signal from the video signal in FIG.
As a first-order differential circuit that performs second-order differentiation, it has the advantage that it can be designed independently of the delay times of the delay circuits 2 and 3. This is a circuit for adjusting the delay time.

FIG. 17 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention. Components that are the same as those of the conventional circuit shown in FIG. 20 are given the same reference numerals, and detailed explanation thereof will be omitted. In FIG. 17, 52 is a white signal width compression circuit that removes one white signal from the input video signal and outputs it, 53 is a delay circuit, and 54 is the signal with the lowest level among the input signals (on the screen). The signal e outputted from the contour forming circuit 7 is delayed for a certain period of time by the delay circuit 53, and the minimum value circuit 7 extracts and outputs the output signal e of the contour forming circuit 7. The output signal V of the delay circuit 53 is input, the signal with the lowest level is extracted from these two signals, and this is output as the output e' of the white signal width compression circuit 52.
The signal is supplied to the output terminal T2 as a signal. The operation waveforms of each part of the white signal width compression circuit 52 are shown in FIG. In comparison, the white signal width of the output signal e' of the white signal width compression circuit is reduced by 3 due to the delay time of the delay circuit 153. In other words, this embodiment also has the effect of preventing black vertical lines and dots from being crushed on the screen, as in the embodiment shown in FIG. This is determined by the delay time τ3.

Further, in the embodiment shown in FIG. 17, the white signal width compression circuit 5
2 is placed after the contour forming circuit 7 to process a video signal with a sharp contour. However, as shown in FIG. 19, a white signal compression circuit 52 is placed immediately after the input terminal T1. It is clear that the same effect as explained in FIG. 17 can be obtained. Furthermore, in FIG. 18, since the white signal width compression circuit 52 uses a signal before making the contour part steep,
Since the delay signal band of the delay circuit 53 can be narrowed compared to the embodiment shown in FIG. 17, the configuration of the delay circuit 53 becomes easier.

This is because the output of the contour forming circuit 7 has a steeper contour than the video signal input from the input terminal T1, so higher frequency components are generated. A delay circuit for delaying this must have a considerably wide delay signal band, and generally speaking, the wider the delay signal band, the more complicated the configuration of the delay circuit becomes.

〔Effect of the invention〕

According to the present invention, it is possible to sharpen the contour of the video signal and at the same time reduce the width of the white signal, which has the effect of preventing black vertical lines and dots from being crushed in a high-brightness screen.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of the image quality improvement circuit according to the present invention, FIG. 2 is a block diagram showing an example of the configuration of the contour forming circuit in the first step, and FIG. 3 is a waveform of each part in FIG. 1. FIG. 4 is a waveform diagram showing . FIG. 5 is a block diagram showing another embodiment of the picture quality improvement circuit according to the present invention, and FIG. 6 is a block diagram showing an example of a color television receiver using the picture quality improvement circuit according to the present invention shown in FIG. 7 is a circuit diagram showing a specific circuit example of the image quality improvement circuit according to the present invention, FIG. 8 is a circuit diagram showing a specific circuit example of the adder circuit 13 in FIG. 2, and FIG.
The figure is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention, FIG. 10 is a characteristic diagram showing the frequency characteristics of the contour signal in FIG. 9, and FIG. 11 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention. 12 and 13 are block diagrams showing an embodiment of a color television receiver using the image quality improvement circuit according to the present invention shown in FIG. 11, and FIG. 14 is a block diagram showing an embodiment of the present invention. 15 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention, FIG. 15 is a waveform diagram showing waveforms of each part in FIG. 14, and FIG. 16 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention. figure,
FIG. 17 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention, FIG. 18 is a waveform diagram showing waveforms of various parts of the embodiment shown in FIG. 17, and FIG. 19 is a block diagram showing another embodiment of the image quality improvement circuit according to the present invention. Block diagram showing another embodiment of the circuit, 2nd
FIG. 21 is a block diagram showing an example of a conventional circuit. FIG. 22 is a waveform diagram showing operating waveforms of a conventional circuit. ■...Image quality improvement circuit, 2, 3...Delay circuit, 4
．． 5.6...Subtraction circuit, 7...Contour formation circuit. 8... Subtraction circuit, 10... Addition circuit.・Rectifier circuit, No. 1121 A-5th stick kei 乍 1-1 PI (2nd 34th hard) (3) 'l (4) Akira/7rome (・Putsukihiikui (Den most/θ mouth t. Mo2 Mut4 Taku/41!] Fumishita +7 (/2) Departure/cT13 Earth 4 row σ5) L +'
J 21 Enki no ￥ Sensho de noro dent 'I work girl size) Akira/de decoy *liquid example (15) Akira 220 ・Kusu 1 i wo r! L-+many

Claims (1)

[Claims] 1. First, second, third, and fourth signals that delay the input video signal
a first contour signal generating circuit that generates a first contour signal from the input video signal and the second and fourth delayed signals; a first contour signal generating circuit that generates a first contour signal from the input video signal and the second and fourth delayed signals;
a second contour signal generation circuit that generates a second contour signal from the delayed signal; and an adder circuit that adds at least the first contour signal and the second contour signal and outputs a third contour signal. and at least the input video signal and the second
, a contour forming circuit to which a fourth delayed signal is input, and which is controlled by the third contour signal to form and output a video signal in which the contour portion of the image is steeper than the input video signal. Features an image quality improvement circuit. 2. The image quality improvement circuit according to claim 1, wherein the first
The contour signal generating circuit is configured to input the supplied input video signal as a, the second delayed signal as b, and the fourth delayed signal as c.
An image quality improvement circuit that satisfies the following relationship: d=(b−c)−(ab), where d is the first contour signal that is an output signal. 3. The image quality improvement circuit according to claim 1, wherein the second
The contour signal generation circuit includes a subtraction circuit that subtracts the third delayed signal from the first delayed signal, and full-wave rectification of the output signal of the subtraction circuit, and outputs this as the second contour signal. An image quality improvement circuit comprising a rectifier circuit. 4. The image quality improvement circuit according to claim 1, wherein the second
The contour signal generation circuit includes a subtraction circuit that subtracts the third delayed signal from the first delayed signal, a rectification circuit that performs full-wave rectification of the output signal of the subtraction circuit, and a gain controlled by a gain control signal. and a variable gain amplification circuit that amplifies the output signal of the rectifier circuit and outputs it as the second contour signal, and a first input terminal to which the gain control signal is supplied. Image quality improvement circuit. 5. The image quality improvement circuit according to claim 1, wherein the first
, the delay times of the second, third, and fourth delay signals are t_1, t_2, t_3, respectively, based on the input video signal.
An image quality improvement circuit characterized in that, when t_4, the following relationship is satisfied: 0≦t_1<t_2<t_3≦t_4. 6. a delayed signal generation circuit that generates first, second, and third delayed signals obtained by delaying an input video signal, and a first subtraction circuit that subtracts the input video signal from the second delayed signal;
a second subtraction circuit that subtracts the third delayed signal from the first delayed signal; and a first contour signal generation circuit that generates a first contour signal from the input video signal and the third delayed signal. and an addition circuit whose addition ratio is controlled by the first contour signal, adds the output signal of the first subtraction circuit and the output of the second subtraction circuit, and outputs this as a second contour signal. and contour formation, in which at least the input video signal and the third delayed signal are input, and a video signal in which the contour portion of the image is steeper than the input video signal is formed and outputted under the control of the second contour signal. An image quality improvement circuit characterized by comprising a circuit. 7. The image quality improvement circuit according to claim 6, wherein the first
The contour signal generating circuit extracts the third contour signal from the input video signal.
An image quality improvement circuit comprising a subtraction circuit that subtracts a delayed signal of and outputs the delayed signal as the first contour signal. 8. The image quality improvement circuit according to claim 6, wherein the first
The contour signal generating circuit extracts the third contour signal from the input video signal.
a third subtraction circuit that subtracts the delayed signal; and a variable gain amplification circuit whose gain is controlled by a gain control signal to amplify the output signal of the third subtraction circuit and output it as the first contour signal. and a first one to which the gain control signal is supplied.
An image quality improvement circuit comprising: an input terminal; 9. The image quality improvement circuit according to claim 6, wherein the first
, when the delay times of the second and third delayed signals are respectively t_1, t_2, and t_3 with respect to the input video signal as a reference, the image quality improvement is characterized in that the following relationship is satisfied: 0<t_1<t_2<t_3 circuit. 10. A delayed signal generation circuit that generates n delayed signals obtained by delaying an input video signal, and a contour that generates a contour signal from at least two different delayed signals from among the input video signal and the n delayed signals. A signal generation circuit receives input video signals and at least two delay signals having different delay times from among the n delay signals, and is controlled by the contour signal so that the contour portion of the image is larger than the input signal. An image quality improvement circuit comprising: a contour forming circuit that forms and outputs a steep video signal; one delayed signal among the n delayed signals and the output of the contour forming circuit are input;
An image quality improvement circuit comprising: an addition circuit whose addition ratio of the two signals is controlled by a control signal; and an input terminal into which the control signal is input. 11. At least a delayed signal generation circuit that generates a plurality of delayed signals obtained by delaying an input video signal, and generates a contour signal by inputting one or more signals from the input video signal and the output of the delayed signal generation circuit. a contour signal generation circuit that outputs a plurality of signals from the input video signal and the output of the delayed signal generation circuit, and is controlled by the contour signal to generate an image in which the contour portion of the video signal is steeper than the input video signal. a contour forming circuit that forms and outputs a signal, and a white signal width compression circuit that receives the video signal output from the contour forming circuit as an input and narrows the white signal width of the input video signal. An image quality improvement circuit characterized by being provided with. 12. The image quality improvement circuit according to claim 11, wherein the white signal width compression circuit includes a delay circuit that delays the supplied video signal, and receives the output of the delay circuit and the supplied video signal as inputs. A minimum value circuit extracts and outputs the signal with the lowest signal level (the blackest signal on the screen of the television receiver) from two signals, and the output of the minimum value circuit is used as the output of the white signal compression circuit. An image quality improvement circuit characterized by: 13. In the image quality improvement circuit according to claim 11, the white signal width compression circuit is arranged before the delayed signal generation circuit, and the output of the white signal width compression circuit is used as the input of the delayed signal generation circuit. An image quality improvement circuit featuring: