JPH02201132A - Optical fiber system distribution type temperature sensor - Google Patents

Abstract

PURPOSE:To accomplish averaging whose sampling time is short by dividing an addition circuit in an averaging processor to prestage and poststage circuits and making the number of processing bits of the prestage circuit larger than the number of output bits of an A/D converter and smaller than the number of processing bits of the poststage circuit. CONSTITUTION:The addition circuit 600 of an averaging processing circuit is divided to a prestage addition circuit 601 and a poststage addition circuit 602. The circuit 601 is constituted of an adder 62a and a memory 63a and the circuit 602 is constituted of an adder 62b and a memory 63b. The value converted into a digital quantity by the A/D converter 61 is inputted into the circuit 601, where each measuring input information is added. When a heating circuit attains some times No, the added result is inputted in the circuit 602 and storage in the memory 63a is erased. Then, in the circuit 602, the added result of the circuit 601 is inputted every addition No and added to the previously stored value, then it is inputted in the memory 63b. By repeating such operations, the final result becomes the output of the entire circuit 600.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a temperature sensor, and particularly to an optical fiber type distributed temperature sensor.

[Prior Art] Optical fiber type distributed temperature sensors utilize the fact that the intensity of scattered light such as Raman scattered light and Ray scattered light in an optical fiber changes depending on the temperature, and this change is detected by the well-known 0TDR (O
ptical tine DoIla+nRefiec
temperature distribution along the longitudinal direction of the optical fiber.

The measurement concept of an optical fiber distributed temperature sensor (hereinafter simply referred to as a Raman temperature sensor) using Raman scattered light will be explained below using FIG.

When pulsed light (pulse 'kA T *, pulse period Tp) is guided from a light source to a sensor optical fiber, backscattered light (reflected light) such as anti-Stokes light and Stokes light is excited within the optical fiber, and one of the The section returns to the measuring device. When this reflected light is measured at a sampling time interval T s with the pulsed light incident time being 1=0, the time function of the intensity of the anti-Stokes light and Stokes light is 1 a (t), I
s (t) is determined as a function of the sampling time interval Ts. At this time, these ratios 1 a (t) / I
s (j) is purely a function of temperature, and the time it takes for the reflected light generated at a distance X within the optical fiber to return to the optical pulse input end (reflected light measurement section) By utilizing the fact that the time is 2XX/'Co (CO: the speed of light in an optical fiber), the linear temperature distribution along the optical fiber can be measured.

In addition, the time width 'r' during which the reflected light is reflected is 2xL/C.
o (L: optical fiber length), and during this time, the measured value within the Tr provides effective temperature distribution information.

Next, the outline of the Raman type temperature sensor will be explained using FIG.

This Raman temperature sensor is composed of a measuring device 10 and a sensor optical fiber 20. When pulsed light is guided from the light source 2 to the sensor optical fiber 20, backscattered light (reflected light) is excited within the optical fiber, and a part of the excited reflected light returns to the measurement device 10 side and is sent to the optical splitter. 31, optical fiber 2
2 to the optical splitter 32.

Of the reflected light split by the optical splitter 32, the optical fiber 2
3a enters the anti-Stokes light/nOT D R measurement circuit 3Qa, which is composed of an optical filter 4a for anti-Stokes light, a light receiver 5a, and an averaging processing circuit 6a, and the light intensity is used to measure the anti-Stokes light. A time function J a(t) of light intensity is determined. On the other hand, of the backscattered light split into one part by the optical splitter 32, the optical fiber 23s
This is an optical filter for Stokes 4s.
, enters the Stokes light m0TDR measuring circuit 30s, which is composed of a light receiver 5s and an averaging processing circuit 6s, and from this light intensity, the time function of the Stokes light intensity! 5(t) is obtained. Pulse light source 2 and averaging process J'! ! ! times 1i136
The same m1 matching of a6s is performed by the synchronization signal of the trigger circuit I, and the sampling of the reflected light is performed by the averaging processing circuit 6a.
, 6s at constant time intervals Ts as shown in FIG.

The obtained time functions Ia(t) and l5(t) are input to the temperature distribution calculation circuit 7, and Ia(t)/I5(t)
By performing the calculation, the linear temperature distribution along the optical fiber of sensor m is measured.

Further, the averaging processing port 1i'36 includes an A/D conversion #A circuit 61, an adder 62, a memory circuit Ii'36, as shown in FIG.
f63 and a synchronization circuit 64. The averaging process is performed as follows.

The analog quantity input from the light receiver 5 is converted into an A/D conversion circuit 6.
1 into a digital quantity, and the adder 62 adds the sum of the digital quantity and the digital quantity stored in the memory circuit 63.
The results are stored in the memory circuit 63 again.

This operation is repeated for each pulse period T''P, and the value finally stored in the memory circuit 63 is divided by the number of repetitions to find the average value of the input information.When this averaging process is performed, the input information Since the noise included in the temperature is removed, the accuracy of temperature measurement is improved.

Also, an A/D conversion circuit 61, an adder 62, a memory circuit 6
3 is synchronized by a synchronization circuit 64.

This Raman temperature sensor can detect the temperature distribution in the longitudinal direction of the power cable by laying a sensor optical fiber along the power cable, for example, and can be used to control the power transmission capacity, etc. It is possible to detect areas where the temperature is partially high due to deterioration or the like. Also,
If used for fire detection in buildings, tunnels, etc., it can also be used to locate the location of a fire outbreak.

[Issues to be solved by the invention] The Raman temperature sensor or Rayleigh temperature sensor is a promising method that can measure linear temperature distribution using the method described above. Studies are underway to improve this.

In order to improve temperature accuracy, it is necessary to significantly increase the number of processing times of the averaging processing circuit in order to remove the influence of noise from weak signals. The number of bits must also be increased.

Furthermore, in order to improve the distance resolution, it is necessary to shorten the sampling time.

However, as shown in FIG. 6, as the number of processing bits Nb increases, the processing time t becomes longer, so even if high-speed circuit elements are used, the averaging process cannot be performed within the required sampling time interval Ts. A situation may arise. In particular, this tendency becomes more pronounced as the sampling time interval Ts becomes shorter.

From this point of view, it has been difficult to improve temperature accuracy and distance resolution in the distributed temperature sensor.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the prior art described above, and to provide an optical fiber type distributed temperature sensor that has high temperature accuracy and distance resolution and is inexpensive.

[Measures Pi for Solving the Problems] The optical fiber type distributed temperature sensor of the present invention allows a light pulse to be incident on a sensor optical fiber from a light source in a measurement system, and is formed by backscattered light generated in the fiber. The reflected light is guided to the measurement system, the light intensity of these reflected lights is sampled and averaged by an averaging processing device, the temperature of the optical fiber is determined from the data, and the incident light time of the optical pulse and the reflected light are sent to the measurement system. In an optical fiber type distributed temperature sensor that simultaneously measures temperature and position by determining the generation position of backscattered light from the difference in arrival times and measures the temperature distribution of the optical fiber, the averaging processing device is /D converter, front-stage addition circuit, and rear-stage addition circuit are connected in series, and the number of processing bits of the front-stage addition circuit is larger than the number of output bits of the A/D converter, and the number of processing bits of the rear-stage addition circuit is This is a configuration with a smaller number.

Instead of the averaging processing device, it is composed of an A/D converter and a plurality of sets of adding circuits that process the output thereof in parallel, and the processing time of each set of adding circuits is a time equal to the sampling time interval times the number of sets. An averaging processing device may be provided.

Further, in place of the averaging processing device, an A/D converter;
An averaging processing device may be provided that includes a front-stage addition circuit and a rear-stage addition circuit that perform parallel processing using a plurality of circuits.

Function 1 The main point of the present invention is that the adding circuit in the averaging processing device is divided into a front-stage circuit and a rear-stage circuit, and the number of processing bits of the front-stage circuit is reduced by A/D.
The reason is that the output of the converter and -y are larger than the number of bits and smaller than the number of bits processed by the subsequent circuit.

When selecting the number of processing bits for the pre-stage adder circuit, the following points should be considered: Since the post-adder circuit operates by receiving the output from the pre-stage adder circuit, the allowable processing time is relatively long. It is advantageous to reduce the number of bits Nb to be processed, and furthermore, it is advantageous to devise a method that eliminates the need to use high-speed circuit elements. This request requires that the number of bits processed by the pre-addition circuit be A,
/ It can be satisfied by making the number of output bits larger than the output bits of the D converter, but smaller than the number of processing bits of the post-addition circuit, and even if circuit elements with the same functions as conventional ones are used, the number of processing bits is high, and An averaging processing device with short sampling time can be realized.

If the number of processing bits can be increased in this way, the number of times of averaging processing can be increased, and the influence of noise can be removed to improve temperature accuracy. Furthermore, since the sampling time can be shortened, an optical fiber type distributed temperature sensor with high distance resolution can be realized.

In addition, by processing the entire adder circuit or the pre-adder circuit in parallel using multiple circuits, even if the number of processing bits of the averaging processing circuit is increased, the processing can be performed with a short sampling time interval, improving temperature accuracy and distance resolution. It can be significantly improved.

[Example] Hereinafter, an example of a fiber type distributed temperature sensor using Raman scattered light according to the present invention will be described with reference to FIG.

The basic concept and configuration of the optical fiber type distributed temperature sensor according to this embodiment is almost the same as the conventional example shown in FIGS. 7 to 9, and the difference is that the adder l? 86
00 is divided into a pre-stage adder #1601 and a post-stage adder circuit 602.

At this time, the front-stage addition circuit 601 is configured with the adder 62a and the memory 63a''C'', and the rear-stage addition circuit 602 is configured with the adder 62a and the memory 63a''C''.
! , a storage device 62b and a memory 63b''C'.

Next, the operation of adder circuit 600 will be described.

The R performance of the adder 1-1600 is the same as that of the conventional adder explained in FIG. 9, but the differences are as follows.

That is, the value converted into a digital quantity by the A/D converter 61 is input to the pre-stage addition circuit 601, where each piece of measurement input information is added, and when the number of additions reaches a certain number NO, the addition result is sent to the post-stage addition circuit 601. The signal is input to the addition circuit 602 and the storage in the memory 63a is cleared. The post-addition circuit 602 receives the addition result of the pre-stage addition circuit 601 for each addition number NO, adds it to the previously stored value, and inputs the result to the memory 63b. When this operation is repeated, the final result is added to the adder circuit 600.
This is the entire output of

Note that the number of additions NO may be set to a constant value, or may be set to a stage when the addition result of the pre-stage addition circuit 601 reaches the processing focus or higher.

Next, a method for selecting the number of processing bits Nb of the pre-stage addition circuit 601 will be explained. Here, a case will be described in which the sampling time interval Ts is T'5=2On, the number of processing bits of the S, A/D converter 61 is 8 bits, and the number of processing bits of the post-addition zero path 602 is 32 bits.

The processing time of the front-stage addition circuit 601 and the rear-stage addition circuit 602 (hereinafter referred to as "first stage" and "second stage" as necessary) is ta,
Let tb be the allowable processing time for each] a.

Let it be Tb.

Since the processing time ta of the previous stage increases linearly according to the number of processing bits Nb, its proportionality constant (slope) is expressed as b
, and if the delay when Nb=O is a constant a, the processing time ta of the previous stage is expressed by the following equation.

ta=a+b-Nb Furthermore, since the subsequent processing time b has nothing to do with the desired Nb, it is set as a constant tbo.

tb=tb.

Next, the first stage processing is performed at a sampling time interval Ts (20n
Although this is possible only within S), the processing allowable time Ta for the preceding stage is determined by the sampling time interval Ts.

Ta=Ts Also, the allowable processing time Tb of the subsequent stage is the memory 63a of the previous stage.
Considering that there is no need to operate the subsequent stage until Ts reaches its maximum, the following relationship holds true for the sampling time interval Ts.

T b =T s -2''' The reason why the allowable processing time Tb of the t& stage is longer than the allowable processing time Ta of the preceding stage is because there is no need to operate the succeeding stage until the memory 63b of the preceding stage reaches its maximum. The minimum time is determined when the input to the A/D converter 61 reaches the maximum value (8 bits) each time, and the ratio is 2 N1'/
This is because 2 a = 2 N-8.

What should be considered is the allowable processing time T of the post-addition circuit 602.
Since b is relatively long, it is advantageous to reduce the number of bits processed by the pre-stage addition circuit 601 from Nb;
This is a device that eliminates the need to use high-speed devices.

Here, each processing time La of the first stage and the second stage.

If we take the ratio of tb to the allowable processing times Ta and Tb and set them as the front-stage processing suitability index ka and the second-stage processing suitability index kb, the following is obtained.

FIG. 2 shows the relationship between the number of processing bits Nb in the first stage and the equation (1) above, when the processing time tb in the second stage is taken as a parameter.
When the number of processing bits Nb of the previous stage is increased, which indicates 1,
(As can be inferred from equation 11, the pre-processing suitability index k
a increases linearly, and the post-processing suitability index kb decreases exponentially. In FIG. 2, it is preferable that the pre-processing suitability indices ka and kb are both 1 or less and close to 1.

Regarding the processing aptitude index kb, the previous processing and y
If the h number Nb is set to a small number, for example 8 bits, which is equal to the number of processing bits of the A/D converter 61, the processing time is tb=
Even when a high-speed circuit element of about 30 ns is used, the processing suitability index kb of the subsequent stage is no longer within 1, and there is no margin for processing in the subsequent stage, so it becomes necessary to use a higher-speed circuit element. Conversely, the number of processing bits in the previous stage N
If b is increased to 32 bits, the requirements for the speed of the elements used will be relaxed, but the processing suitability index ka of the preceding stage will exceed 1, and there will be no margin for processing of the preceding stage.

In short, the following can be concluded from this Figure 2.

(1) The number of processing bits Nb of the pre-stage addition circuit 601 is set to A/
If it is taken between the number of processing bits of the D converter 61 (8 bits) and the number of processing bits of the subsequent stage (32 bits), the processing suitability index k
Both a and kb are values corresponding to the processing time when a 30 ns processing element is used with 32 bits (smaller than the actual mark in the figure).

(2) The processing suitability index ka of the front-stage addition circuit 601 becomes smaller as the number of processing bits Nb thereof becomes smaller, and conversely, the processing suitability index kb of the second-stage addition circuit 602 becomes smaller as the number of processing bits Nb becomes larger. Become.

However, the post-processing suitability index kb is the number of pre-processing bits Nb
Since the number of bits decreases exponentially with respect to the number of bits processed by the A/D converter 61, the effect is large even if Nb is made slightly larger than the number of bits processed by the A/D converter 61.

For example, the number of processing bits Nb of the pre-stage addition circuit 601 is set to 16
If it is a bit, then its processing suitability index ka=0.8, which is within 1, and what is the processing time ta? 6 ns, which can be shorter than the targeted sampling time interval Ts=20 ns.

Furthermore, if the post-processing aptitude index kb is set to the same value as the pre-processing aptitude index ka, the post-processing time is b = 4gs.
(16nsX2'), which can be handled by a sufficiently slow 32-bit processing element of the post-addition circuit.

FIG. 3 shows another embodiment, in which the above adder circuit 600 is
Latch circuit F1465, four sets of adders 62 and memory 63
The processing time for each set is set to 4 of the sampling time Ts.
It is designed so that it can be handled twice as much.

The A/D converter 61 samples input information at a sampling time interval T.
output every s, input the result to the latch circuit 65,
Each adder 62 receives the output of this latch circuit 65 by 4
The addition is performed within the time f's. Conversely,
By using circuit elements with the same function, the sampling time interval Ts can be shortened to 1/4.

Although this embodiment uses four sets of adders 62, the number of sets can be arbitrarily selected.

FIG. 4 is a combination of the technology in FIG. 1 and the technology in FIG. 3, and by making the front-stage adder circuit 601 a parallel front-X type, the processing time of the adder circuit 600 can be significantly shortened. be.

Figure 5 shows the minimum practicable sampling time interval actually measured with the circuit configuration of the present invention using circuit elements with the same function, and it is clear that both can support shorter sampling times than the conventional example. Ru.

All of the above examples are included! Although consideration was given to the circuit, it goes without saying that similar effects can be obtained by similarly configuring the A/D converter as a parallel adder type.

[Effects of the Invention] According to the present invention, the following remarkable effects can be achieved.

(1) It is possible to realize an averaging processing device with a high number of processing bits and a short sampling time even if circuit components having the same functions as those of conventional devices are used.

(2) Since the number of processing bits can be increased, the number of times of averaging processing can be increased, and the influence of noise can be removed. As a result, an optical fiber type distributed temperature sensor with high temperature accuracy can be realized.

(3) Since the sampling time can be shortened, an optical fiber type distributed temperature sensor with high distance resolution can be realized.

(4) Since there is no need to develop new circuit components, a high-performance device can be realized at low cost.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the averaging processing circuit of the optical fiber type distributed temperature sensor according to the present invention, and FIG. 2 is a diagram showing the relationship between the number of processing bits and the processing suitability index of the pre-stage addition circuit. Figures 3 and 4 are block diagrams showing other embodiments of the averaging processing circuit, Figure 5 is an explanatory diagram comparing the performance of the present invention with the conventional type, and Figure 6 is the number of processing bits and processing time. Figure 7 is a diagram showing the measurement concept of a conventional optical fiber type distributed temperature sensor, Figure 8 is a configuration diagram of a conventionally considered optical fiber type distributed temperature sensor, Figure 9 is a configuration diagram of the averaging processing circuit. In the figure, 1 is a trigger station, 2 is a pulse light source, 4s, 4a are optical filters, 5s, 5a are light receivers, 6s, 6a are averaging processing circuits, 7 is a temperature distribution calculation circuit, 10 is a fl measuring device, 20 Optical fiber for sensor, 2t, 22.23a, 2
3s is an optical fiber, 30s is an 0TDR measurement circuit for Stokes light, 30a is an 0TDR measurement circuit for anti-Stokes light, 31.32 is an optical splitter, 61 is an A/D conversion circuit, 62
．． 62a and 62b are adders, 63.63a and 63b are memories, 64 is a synchronization circuit, 65 is a latch circuit, 600 is an addition circuit, 601 is a front-stage addition circuit, and 602 is a rear-stage addition circuit. 64: Synchronous circuit 600: Addition circuit 601: Pre-stage addition circuit Fig. 3 Fig. 2 601 (16 bits) Fig. 4 Fig. 5 Processing bit number Nb □ Time sound (a) Incident pulse light □ Time sound (b) Sensor reflected light from

Claims (1)

[Claims] 1. A light pulse is input from a light source in the measurement system to a sensor optical fiber, and reflected light formed by backscattered light generated in the fiber is guided to the measurement system, and the light of these reflected lights is The intensity is sampled and averaged by an averaging processing device, the temperature of the optical fiber is determined from this data, and the generation position of backscattered light is determined from the difference between the incident light time of the optical pulse and the time at which the reflected light reaches the measurement system. Accordingly, in an optical fiber type distributed temperature sensor that simultaneously measures temperature and position and measures the temperature distribution of the optical fiber, the averaging processing device can be used as an A/D.
A converter, a pre-addition circuit, and a post-addition circuit are connected in series, and the number of processing bits of the pre-addition circuit is larger than the number of output bits of the A/D converter and smaller than the number of processing bits of the post-addition circuit. This is an optical fiber type distributed temperature sensor. 2. Instead of the averaging processing device, it is composed of an A/D converter and a plurality of sets of addition circuits that process the output thereof in parallel, and the processing time of each set of addition circuits is multiplied by the number of sets of the sampling time interval. 2. The optical fiber type distributed temperature sensor according to claim 1, further comprising an averaging processing device for averaging within a time period of . 3. In place of the averaging processing device, an averaging processing device comprising an A/D converter, a pre-addition circuit and a post-addition circuit that perform parallel processing using a plurality of circuits is provided. 1. The optical fiber type distributed temperature sensor according to 1.