JPH0220160A - Signal processing device - Google Patents

Abstract

PURPOSE:To facilitate the separation of a trouble generation point and the recovery confirmation after a trouble release by executing a loopback test for a line with receiving a testing instruction and providing a loopback testing means which outputs a signal showing the result of the testing into an interface control circuit. CONSTITUTION:When an interface control circuit 1 outputs the testing instruction signal, the loopback testing means of signal processing circuits 21-2n executes the loopback test through these return circuits 61-6n and informs its result by outputting a prescribed signal into the interface control circuit 1. When the interface control circuit 1 receives a testing command from a host controlling device 10, it instructs the setting of a loopback bus to a specified return circuits 61-6n by outputting a bus setting signal. Further, it outputs a testing instruction signal to either of the specified signal processing circuits 21-2n, receives the result of the loopback test from the signal processing circuit and informs the host controlling device.

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention includes a plurality of signal processing circuits provided corresponding to lines, and uses these signal processing circuits to process signals between each line and a host control device. The present invention relates to a signal processing device that relays transmission and reception.

[Conventional technology]

Conventionally, in this type of signal processing device, if a failure occurred in one of the signal processing circuits installed for the line, the maintenance personnel would replace that signal processing circuit with a normal one, and then connect the other device. After resuming communication and confirming that there were no abnormalities, the repair was completed.

[Problem to be solved by the invention]

However, in such conventional signal processing devices, when a failure such as a communication abnormality occurs, it is not easy to determine whether the failure is due to an abnormality in the other device or the own device. Furthermore, if the signal processing circuit is replaced due to a problem with the own device, the repair can only be confirmed by communicating with the other device. In other words, repair confirmation cannot be performed only on the own device side.

SUMMARY OF THE INVENTION An object of the present invention is to provide a signal processing device that eliminates such drawbacks and can easily isolate the location where a fault has occurred and confirm the repair after the fault has been recovered.

[Means to solve the problem]

The present invention provides a signal processing device that includes a plurality of signal processing circuits provided corresponding to lines, and uses these signal processing circuits to relay signals between each line and a higher-level control device. a loopback circuit that receives a bus setting signal and sets a loopback bus to the line; and a signal processing circuit that receives a test command from the upper control device and sends the path setting signal to the loopback circuit and a test instruction signal to the loopback circuit. and an interface control circuit that receives a signal from the signal processing circuit and notifies the higher-level control device of the result of the loopback test, and the signal processing circuit receives the test instruction signal and outputs the loopback test result to the line. The present invention is characterized by comprising loopback test means for executing a test and outputting a signal indicating the result to the interface control circuit.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a signal processing device according to the present invention. This signal processing device includes n-cent signal processing circuits 21 to 2n provided corresponding to the lines.

These signal processing circuits each have a driver 31 to 3ns
It is connected to lines 71 to 7n through receivers 41 to 4n, receives signals from the lines and outputs them to an interface control circuit l, which will be described later, and vice versa.
Outputs the signal from to the line. In addition, return circuits 61 to 6n are connected between the output terminal of the driver 31 and the input terminal of the receiver 41...the output terminal of the driver 3n and the input terminal of the receiver 4n. When the signal is output, the loopback test means (not shown) of the signal processing circuits 21 to 2n performs a loopback test 1 through the loopback circuits 61 to 6n, and outputs the result as a predetermined signal to the interface control circuit l. Notice.

In the normal operating state, the interface control circuit 1 receives signals from the lines 71 to 7n through the receivers 41 to 4n and the signal processing circuits 21 to 2n, and outputs them to the host control device 10, and vice versa. The signals are output to lines 71-7n through signal processing circuits 21-2n and drivers 31-3n. On the other hand, when a test command is received from the higher-level control device IO, it outputs a path setting signal to instruct the designated loopback circuits 61 to 6n to set up a loopback bus. Further specified signal processing circuit 2
It outputs a test instruction signal to any one of 1 to 2n, receives the return test result from the signal processing circuit, and notifies the higher-level control device IO.

Next, the operation of this signal processing device is explained by the signal processing circuit 2k (
An example will be explained in which a failure such as a communication abnormality occurs (not shown). When the host controller 10 detects an abnormality in the signal processing port 92 and types out a message notifying it, the maintenance person operates the host 4111g position to issue a test command. When the interface control circuit 1 receives this test command, it outputs a path setting signal to cause the return circuit 6k to set a return bus. Further, the interface control circuit 1 outputs a test instruction signal to the signal processing circuit 2k.

In the signal processing circuit 2, the return test means receives this test instruction signal, and performs a return test through the return circuit 6k. Then, the return test means outputs the test result as a predetermined signal to the interface control circuit 1.
The interface control circuit l further notifies the higher-level control device lO of this test result. Upper control device 1
0 will now type out the results of the return test.
Inform maintenance personnel of test results.

If the maintenance person finds that there is no abnormality in the signal processing circuit 2k as a result of the loopback test, he determines that there is an abnormality in the external device connected to the line 7k, and does not replace the signal processing circuit. On the other hand, if the test results show that there is an abnormality in the signal processing circuit 2k, the signal processing circuit 2k is replaced with a non-defective one, and then the above-described return test is performed again to confirm the repair.

〔Effect of the invention〕

As explained above, the present invention provides a signal processing device that includes a plurality of signal processing circuits provided corresponding to lines, and uses these signal processing circuits to relay the transmission and reception of signals between each line and a higher-level control device. A loopback circuit is provided for each line, which receives a path setting signal and sets a loopback path on the line, and a signal processing circuit that receives a test command from a higher-level control device and sends a path setting signal to the loopback circuit, and a test instruction signal to the loopback circuit. and an interface control circuit that receives the signal from the signal processing circuit and notifies the higher-level control device of the result of the loopback test, and the signal processing circuit executes the loopback test on the line in response to the test instruction signal. , has loopback test means for outputting a signal indicating the result to the interface control circuit.

Therefore, the present invention provides a signal processing device that can easily determine whether a fault has occurred in its own signal processing circuit or in an external device connected through a line, and can also easily confirm the repair after the fault has been recovered. realizable.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a signal processing device according to the present invention. l...Interface control circuit 21-2n...
・Signal processing circuits 31 to 3n...Drivers 41 to 4n...Receivers 61 to 6n...Return circuits 71 to 7n...Lines

Claims (1)

[Claims] (1) In a signal processing device that is equipped with a plurality of signal processing circuits provided for each line, and uses these signal processing circuits to relay the transmission and reception of signals between each line and a higher-level control device, a signal processing circuit provided for each line is provided. a loopback circuit that receives a path setting signal and sets a loopback path on the line; and a loopback circuit that receives a test command from the upper control device and sends the path setting signal to the loopback circuit, and a test instruction signal to the signal processing circuit. and an interface control circuit that receives signals from the signal processing circuit and notifies the higher-level control device of the result of the loopback test, and the signal processing circuit receives the test instruction signal and performs a loopback test on the line. 1. A signal processing device comprising loopback test means for executing the test and outputting a signal indicating the result to the interface control circuit.