JPH0221003B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a sequence display device, and more particularly to a sequence display device most suitable for logically displaying sequences. 2. Description of the Related Art Conventionally, there has been a display device using relay symbols to display the operation details of a sequence control device. CRT display using such relay symbols is suitable when the sequence is simple. However, the sequences of sequence controllers have become increasingly complex as control becomes more automated.
It is becoming popular to represent logic symbols such as OR. When attempting to display a sequence circuit on a screen using logic symbols, there was a problem in that the arrangement of various symbols on the screen was more complicated than when displaying using relay symbols. In other words, in the case of a relay symbol display (also called a ladder display), for example, if you want to make an AND, you can put the contacts in series, and if you want to make a logical sum, you can put the contacts in parallel. As long as the distance is determined, the position of the next contact point to be displayed will be determined automatically, and there is no need to consider the placement of the symbols. In this respect, in logic symbol display, since the number of input signals of a symbol is variable, the position of the symbol output signal line is not fixed, and the position of the next symbol to be displayed must be taken into consideration. Conventionally, symbol position information was given each time,
There were problems such as complicated operations and longer display times. SUMMARY OF THE INVENTION An object of the present invention is to provide a sequence display device that can display a program of a sequence control device in logic symbols with a simple operation. In order to achieve the above object, the present invention is characterized in that in a sequence display device that displays a program using logic symbols and connections between them, the signal line connected to the logic symbol is The arrangement of logic symbols and the connections between them are calculated according to the information about the arrangement stored in advance, which is determined not to cross the logic symbols, and the logic symbols and connections are calculated according to the calculation results. The present invention is provided with display control means for displaying. In this specification, logic symbol means
In addition to logical operations such as AND and OR, timers,
It also includes control operations such as multiplication and division. Therefore,
Generally speaking, it is a control calculation symbol, but below, it will be explained using a logic symbol as a representative. FIG. 1 is a system diagram showing an example of a logic sequence. The example shown in FIG. 1 is an example in which the calculation results of six inputs X001 to X006 are output as output Y001. That is, in this sequence, input X00
1. Store the calculation results of the negation of X002 and the AND of X003 in the temporary storage memory M001. Similarly, OR the M001 and input X004 to M0
02, M002 and input X005, X006
This is a sequence for outputting AND to Y001. FIG. 2 is a block diagram showing an embodiment of the present invention. The embodiment shown in the figure includes a sequence control device 3 that executes the above-mentioned sequence, and a CRT 1 that displays the operation (instruction) contents of the device using logic symbols.
It is composed of a sequence display control device 2 that controls. The sequence display device 2 includes a CRT control circuit 21,
refresh memory 22, symbol generator 23, buffer memory 24, control circuit 25,
Consisting of a ROM 26 and a keyboard 27, the sequence control device 3 includes an input circuit 31, an output circuit 32,
It consists of a main memory 33, a control circuit 34, an accumulator (ACC) 35, and a temporary memory 36. FIG. 3 is an example of a key configuration diagram of the keyboard 27 in FIG. 2. AND, OR, NOT, OUT and FF required for the sequence as shown in the figure
A dedicated key is provided in advance. Dedicated keys for address designation and function are also provided. FIG. 4 is a flowchart showing the processing of the sequence control device 3 of FIG. The operation of the sequence control device 3 will be explained in detail based on FIG. Inputs X001 to X0 to sequence control device 3
06 is taken into the input circuit 31. This input signal is operated by a control circuit 34 according to a sequence program stored in a main memory 33, and the result is temporarily stored in an accumulator (ACC) 35, which is a refresh memory. The contents of this ACC35 are output to the temporary storage memory 36 and stored, and the output relay Y00 is outputted via the output circuit 32.
Output to 1. The sequence program stored in the main memory 33 is composed of an instruction code CC and an address part Aadress as shown in FIG.
Table 1 shows the program contents of each program (the part starting from) in FIG.

[Table] First, input X001 with program number is taken in with the instruction code "S" as shown in Table 1, and set in the ACC 35 of the sequence control device 3. Then, according to the program No., the control circuit 34 operates to logically AND the value of the ACC and the negated value obtained by taking in the input X002 using the instruction code "end", and sets the result in the ACC 35. In program No., the contents of the ACC35 and the input X003 are logically operated using the instruction code "*", and the result is set in the ACC. In the next program number, the contents of ACC are written as the instruction code “=”
is set in the temporary memory M001. In the same manner, follow the program shown in Table 1.
The sequence shown in the figure is processed by the sequence control device 3. These programs are
The sequence control device to which the present invention is applied performs sequence control through cyclic arithmetic processing. The present invention attempts to display the sequence shown in FIG. 1, which is processed by sequence calculations as described above, on a CRT screen as logic symbols.
This is a sequence display device 2 shown in the figure. The buffer memory 24 is used to temporarily store a program as shown in FIG. 5 stored in the main memory 33 of the sequence control device 3. Control circuit 2
5 is connected to the control circuit 34 and controls each of the ROM 26, the keyboard 27, and the symbol generator 23. ROM26 is a logic symbol and CRT
It stores a program for converting a program stored in the buffer memory 24 for display into a program corresponding to a logic symbol. The refresh memory 22 is a memory that stores a program converted for displaying logic symbols. The symbol generator 23 is a signal generator for displaying logic symbols on the CRT. The output of the refresh memory 22 is displayed on the CRT 1 via the CRT controller 21. Table 2 shows key operations for realizing the sequence shown in FIG. 1.

【table】

[Table] This is an example of creating a CRT display program by operating command keys such as AND and OR and address keys X, Y, O to F shown in FIG. First, program no.
Key in X001, then program No.
Then NOT, X002, followed by program number X
003, AND of program number, program number.
Key in M001 in sequence. Now M00
Since the AND operation in 1 has been completed,
Press the SET key to indicate a break. Corresponding to these operations, a series of processing contents are stored in the refresh memory 22 via the control circuit 25.
Displayed sequentially on CRT1. Similarly, below,
The programs shown in Table 2 are sequentially stored in the refresh memory 22 and displayed on the CRT 1. As described above, the sequence display device of the present invention stores the program shown in FIG. 5 stored in the main memory 33 of the sequence control device 3 in the ROM 26.
This is characterized in that the program is converted into the program shown in Table 2 using a conversion program stored in the CRT 1 and displayed on the CRT 1. On the contrary, the same
According to the conversion program stored in the ROM 26, the program shown in Table 2 obtained by operating the keyboard is converted into the sequence control program shown in FIG. 5, stored in the buffer memory 24, and "written". When the key is pressed, the data is transferred to the main memory 33. Each of A, B, C, D, and E in FIG. 6 is an example of a sequence of logic symbols displayed on a CRT based on the program shown in Table 2. According to the program shown in Table 2, each time the SET key is pressed, AND, M001, OR, M002, AND, as shown in FIG.
Y001 is controlled by the control circuit 25 shown in FIG.
AND, OR, AND symbols and alphanumeric characters are automatically selected from the symbol generator 23 and automatically arranged sequentially on the CRT screen, and then
Mutual connections are automatically made. Here, in order to arrange the symbols, it is not necessary to key in position information as shown in Table 2. This logic symbol is composed of three pixel areas in the Y direction, as shown in FIG. 6A.
First, the logic symbol of AND, M001 is
3. Automatically place in the blocks of Y1, X3, Y2, X3, Y3, and input each input X001, X002, X00
Automatically connect with 3. Then the keyed-in OR,
M002 logic symbol is X5, Y2, X
5, Y3, X5, and Y4 are automatically arranged so that the output of AND, M001 is connected to the input part of the OR symbol, and the input X004 is connected. Furthermore, AND, Y001 and the output of M002, which is the first input, are automatically arranged so that they are in a straight line, but if they are arranged in this way, each of the inputs X005 and X006 will not be able to be connected. Avoid X7, Y4, X7, Y
5, X7, Y6 so that the 3 inputs and symbols are connected. FIG. 7 is a flowchart showing automatic placement processing. Furthermore, FIGS. 8A, B, and C are explanatory diagrams showing a method for determining a logic symbol base point based on the number of input points of logic symbols, and FIGS. 9A and B show a method for correcting automatic arrangement of logic symbols. It is an explanatory diagram. Blocks 200, 300, 4 in Figure 7
00 is illustrated in FIGS. 8A, B, and C, and blocks 600 and 700 are illustrated in FIGS. 9A and 9C.
It is B. Logic symbols such as AND and OR are P1 in Figure 8A, P3 in Figure 8B, and P5 in Figure 8C.
As shown in the figure, the position to be placed is determined using the second input signal line as a reference point. The logic symbol base point P in Figure 8 is determined by this reference point.
2, P4, and P6. This will be explained with reference to the case shown in FIG. 6A. Taking the OR symbol of M002 as an example, this M0
02OR is the result of OR of M001 and X004
This is the sequence output to 001. M002
The state before placing the OR symbol is shown in Figure 6B.
The M001AND symbol has been placed, and the
This is the state displayed on CRT1. M002
The output P ₀₁ of M001, which is the first input of
Since the second input X004 is the first signal that appears on the CRT1 screen, the blocks X1 and Y2 in FIG.
Assigned to input signal area No. 4. Since the position of the input signal has been determined, the base point of the M002OR symbol is determined to be blocks X5 and Y2 based on the principle shown in FIG. 8B. Next, in a certain space on the CRT1 screen in Figure 1 centered on this logic symbol base point,
Check whether logic symbols such as OR can be placed. The placement possible state here refers to a state in which a certain space on the CRT 1 to be placed is already unused by other logic symbols or wiring between logic symbols. If the logic symbol can be placed, the automatic position determination of the logic symbol is completed, but if it is not possible to place it, it is necessary to correct the logic symbol position in the order shown in Figure 9. be. As shown in FIG. 9, the correction method is based on the logic symbol base point S in FIG.
Search for an unused area on the screen of the CRT 1 in a ripple pattern in the Y-axis (-) direction. However, here, in order to facilitate automatic placement, the number of inputs for logic symbols such as AND and OR is limited to a maximum of three inputs. In the case of Figures 6B and D (Figure 6D is the state of the CRT1 screen after the M002OR symbol has been placed, and Figure 6B is the state of the CRT1 screen before placement), the areas X5, Y2, and X where the M002OR symbol is to be placed are
Since 5, Y3, X5, and Y4 are unused, they can be arranged as shown in FIG. 6D. Here, although not shown in the system diagram shown in FIG. 1, as an example of allowing crossover between signal lines, consider the case where a timer symbol is arranged. In the case of Fig. 6 C and D, (Fig. 6 C is the timer symbol T001
After placement, FIG. 6D shows the state of the CRT 1 before placement. ) Area X5, Y2, X where the T001 timer symbol with M001 as input is to be placed
Since the M002OR symbols have already been placed in 5, Y3, X5, and Y4, it is necessary to correct the symbol placement positions. Therefore, with X5 and Y2 as the logic symbol base points, CRT1
When searching for unused area, we find X5, Y5, X5, Y
The area of 6, X5, Y7 is selected. Once the arrangement of logic symbols has been determined, the signals are then connected. In the example of FIG. 6C, a state as shown in FIG. 6E exists between FIG. 6D and FIG. 6C. FIG. 6E shows M after T001 timer symbol position determination.
001 and T001 are the states before connection. Then, as shown in FIG. 6C, M001 and T001 are connected. This connection does not cross any logic symbol, and such line-to-line crossings are allowed. Similarly, the above placement priority and the second
Since the wiring of input X005 is arranged as a straight line, AND-Y001 shown in FIG. 6A is as follows.
They are arranged in blocks X7, Y4, X7, Y5, X7, and Y6. Here, output P ₀₂ of OR (M002) and AND (Y
001) is automatically connected without being a straight line, but regarding this process, Figure 10 a, b, c, d
The explanation will be based on each of the following. As shown in FIG. 10a, when there is no obstruction between two points in the same row or column, the two points are connected by a straight line. In addition, as shown in Figure 10b, 2
When the points are not the same or on the same level and there is no obstacle between the two points, blocks X1, Y1, X2, Y1, X3,
After being arranged in a straight line on Y1, X4, Y1, X4,
They are arranged vertically in a straight line at Y1, X4, Y2, X4, and Y3, and can be connected with one bend. Further, as shown in FIG. 10c, if two points are not in the same line or in the same line and there is a fault at the shaded position, and in the example shown in the figure where it is possible to connect up to three turns, the connection is automatically made at up to three turns. but,
For example, if the obstacle is in the shaded position as shown in Figure 10d and cannot be placed in this area,
Since the wire cannot be connected unless it makes three or more bends, that is, four turns, the operator is made aware of the fact that the wire is connected by displaying a letter indicating the wire connection between two points, such as A in the figure, to indicate that the wire is connected. This is 100 if 3 or more bends are recognized.
This is to limit the amount of processing time required to connect the wires. FIG. 11 is a flowchart for automatically wiring between logic symbols with a minimum of bends.
Furthermore, each of FIGS. 12A, B, C, and D is an explanatory diagram showing the priority order of automatic wiring between logic symbols. FIGS. 12A and 12B specifically show block 90 of blocks 900 to 1100 in FIG.
1 curve downward to the right about 0,1000, or 2
This shows the bend. Figure 12A is the starting point P
The route from 1 to the end point P2 is fixed on the X axis, and the Y
This method moves the axis from right to left and searches for possible routes. In contrast, FIG. 12B shows a method in which the Y-axis is fixed for the route from the starting point P1 to the ending point P2, and the X-axis is moved from bottom to top to search for a connectable route. The method shown in Figure 12 is one of the specific examples.
Which of the diagrams A and B should be given priority and the direction of the movement axis can be arbitrarily determined depending on the characteristics of the screen of the CRT 1. 12C and D are block 1100 of FIG. 11.
12A and 12A, respectively.
This is an example of creating a branch route based on the movement axis of B, and searching for a possible route with three bends. , in Fig. 12C are routes derived from the two-curve route in Fig. 12A. Furthermore, in order to reduce the number of trials of routes that can be routed, we focused on the fact that there are routes that are used redundantly in multiple trial routes (route P3 in Figures 12A and B, route C and D in Figure 12). (P4, P5, P6 routes), if the route that is used overlappingly has already been used, a route including that route is not attempted. As is clear from the above, according to the embodiment of the present invention, it is not necessary to store sequence symbol display position information in the logic operation processing program, and the program becomes extremely simple as shown in Table 2. It also has the advantage of being able to display each logic symbol on the CRT and creating programs in an interactive manner as shown in Table 2. As is clear from the above, according to the present invention, CRT display can be performed in units of logic symbols without requiring storage of symbol display position information.

[Brief explanation of drawings]

FIG. 1 is a system diagram showing an example of a logic sequence, FIG. 2 is a block diagram showing an embodiment of the present invention,
3 is a key configuration diagram of the keyboard 27 in FIG. 2, FIG. 4 is a flowchart showing the processing of the sequence control device 3 in FIG. 2, and FIG. 5 is a configuration diagram of a sequence control program according to the present invention. 6A, B, C, D, and E are arrangement diagrams of logic symbols displayed by the processing of the present invention, FIG. 7 is a flowchart showing automatic arrangement processing, and FIG. 8A, B and C are explanatory diagrams each showing a method for determining the base point of logic symbols; FIGS. 9A and B are explanatory diagrams showing a method for correcting the automatic arrangement of logic symbols;
Figures a, b, c, and d are explanatory diagrams showing the automatic wiring method between logic symbols, Figure 11 is a flowchart for automatically wiring between logic symbols with minimum bending, and Figure 12. A, B, C, and D are explanatory diagrams showing priorities of automatic wiring between logic symbols. DESCRIPTION OF SYMBOLS 1...CRT, 2...Sequence display device, 3...Sequence control device, 21...CRT control circuit, 22
...Refresh memory, 23...Symbol generator, 24...Buffer memory, 25...Control circuit,
26... ROM, 27... Keyboard, 31... Input circuit, 32... Output circuit, 33... Main memory, 24... Control circuit, 35... Accumulator, 36... Temporary storage memory.

Claims (1)

[Scope of Claims] 1. A sequence display device that displays on a screen the program of a sequence control device that takes in an input signal and performs arithmetic processing according to a predetermined program, the sequence display device comprising: control calculation symbol selection means for selecting a corresponding symbol from among predetermined control calculation symbols; and display means for displaying the program on a screen using the selected control calculation symbols and the connections between them. , The arrangement of the control calculation symbols and the distance between them are determined according to information about the arrangement stored in advance, which is determined so that the signal line connected to the control calculation symbol does not cross other control calculation symbols on the screen. A sequence display device comprising: a display control means that calculates a connection and displays the control calculation symbol and the connection according to the calculation result. 2. In claim 1, the information about the arrangement defines a standard for connecting the control calculation symbol and the signal line connected thereto by allowing a specified bend on the screen and connecting the connection through the shortest route. A sequence display device comprising: 3 In claim 2, the criterion for connecting the wires is that when the wires exceed a predetermined number of bends, a code indicating that the wires are connected to each other is displayed on the screen instead of the wires on the screen. A sequence display device comprising a reference. 4. The sequence display device according to claim 3, wherein the predetermined number of bends in the connection is three.