JPH02210570A - Inter-processor communication system - Google Patents

Abstract

PURPOSE:To communicate information including the report of completion of initialization of the dual port memory between two processors and to improve economization of an information processing system by providing only a dual port memory. CONSTITUTION:After an initializing means 101 completes initialization of a dual port memory 3, an initialization completion reporting means 102 periodically stores completion information in a completion information storage area 301 and monitors stored contents of a confirmation information storage area 302 and detects initialization completion confirmation information stored by the other processor 2 to stop storage of completion information. Inter-processor information transfer means 103 and 203 store control information required for communication in a transfer information set area 303 of a dual port memory 3 at the time of mutual communication. Thus, only the dual port memory is provided for two processors to completely eliminate a need of a control register, a peripheral circuit, or the like, and economization of the information processing system is improved.

Description

[Detailed Description of the Invention] [Summary] Regarding an inter-processing device communication method in an information processing system in which two sets of processing devices communicate with each other via a dual port memory, the two sets of processing devices communicate with each other via a dual port memory. With the aim of improving the economic efficiency of information processing systems that communicate with each other as much as possible, one processing unit has an initialization means for initializing the storage area of the dual-port memory, and an initialization means that initializes the dual-port memory storage area. After the initialization is completed, completion information notifying completion of initialization of the dual port memory is periodically stored in a predetermined completion information storage area in the dual port memory, and When completion confirmation information indicating that initialization of the dual port memory stored in the other processing device has been confirmed is detected, the completion information is stored in the completion information storage area. an initialization completion notification means for stopping the process, and an initialization completion monitoring unit that monitors the storage contents of the completion information storage area after once deleting the storage contents of the completion information storage area in the dual port memory in the other processing device. and completion confirmation notification means for storing completion confirmation information in the confirmation information storage area when the initialization completion monitoring unit detects completion information in the completion information storage area, and each processing device is provided with a dual port. When communicating with each other via the memory, a predetermined transfer information storage area in the dual port memory is provided with inter-processing device information transfer means for storing control information necessary for communication. .

[Industrial application field]

The present invention relates to an inter-processing device communication method in an information processing system in which two sets of processing devices communicate with each other via a dual port memory.

In a multiprocessor type information processing system that uses multiple processing units, two sets of independent access systems (
A dual-port memory having a dual port (port) is effectively used to allow two sets of processing devices to communicate with each other.

[Conventional technology]

FIG. 5 is a diagram showing an example of a conventional information processing system.

In FIG. 5, two sets of processing units (CPUs) 1 and 2
In order to communicate with each other, there are two sets of control registers (REG) in addition to the - set of dual port memory (DPM) 3.
4 and 5 are provided.

For example, if the processing unit (CPU) 1 initializes the dual port memory (DPM) 3 when the power is turned on, the processing unit (CPU) 1 first initializes the control register (REG).
) 4 is reset to logic "0" when the power is turned on, initialization of the storage area of the dual port memory (DPM) 3 is started.

On the other hand, the processing unit (CPU) 2 has a control register (REG).
) 4 and does not start communication with the processing unit (CPU) 1 using the dual port memory (DPM) 3 while the stored content is at logic "0".

Eventually, the processing unit (CPU) 1 completes the initialization of the entire storage area of the dual port memory (DPM) 3, and the dual port memory (DPM) 3 is stored in the control register (REG) 4.
Completion information C+ (≠“O
″).

The processing unit (CPU) 2 includes a control register (REG) 4
When it detects that the completion information CI has been accumulated in the
Thereafter, communication with the processing unit (CP'U) 1 is started using the dual port memory (DPM) 3.

For example, when the processing device (CPU) 2 transfers a command C to the processing device (CPU) 1, the processing device (CPU) 2 in the dual port memory (DPM) 3
After storing the command C in the data area A p z that stores the transfer information from to the processing unit (CPU) 1, the command
M) A notification flag F indicating that transfer information is stored in the data area A12 of 3. Accumulate.

The processing device (CPU) 1 includes a control register (REG) 5
It monitors the accumulated contents of the dual port memory (DPM), and when it detects that the notification flag F is accumulated, it
) 3 is extracted, and after executing the process specified by the command C, response information aR indicating the processing result based on the command C is sent to the dual port memory (DPM) 3. Processing words! (CPU
) 1 to the processing unit (CPU) 2 in the data area A p 1, the control register (
REG) 4, a response flag Fl indicating that transfer information is stored in the data area A□ of the dual port memory (DPM) 3 is stored.

The processing unit (CPU) 2 that monitors the accumulated contents of the control register (REG) 4 controls the control register (REG) 4.
When it is detected that the response flag F is accumulated in the data area AD+ of the dual port memory (DPM) 3, the response information R stored in the data area AD+ of the dual port memory (DPM) 3 is extracted and the processing unit (CPU
) Check the processing result of command C according to 1.

[Problem to be solved by the invention]

As is clear from the above description, in a conventional information processing system, control registers (REGs) 4 and 5 are used to communicate between processing units (CPUs) 1 and 2 via dual port memory (DPM) 3. Furthermore, the number of peripheral circuits such as address decoders related to the control registers (REGs) 4 and 5 is increased, which poses a problem that reduces the economic efficiency of the information processing system.

Note that instead of control registers (REG) 4 and 5,
Although reusing a specific area of the dual port memory (DPM) 3 may be considered, the memory contents of the dual port memory (DPM) 3 will be uncertain when the power is turned on.
Logic “0” like control registers (REG) 4 and 5
Therefore, as mentioned above, one processing unit (CPU) 1 uses dual port memory (DPM).
This is not a solution for transmitting the completion of initialization of No. 3 to the other processing unit (CPU) 2.

An object of the present invention is to improve as much as possible the economic efficiency of an information processing system in which two sets of processing devices communicate with each other via a dual port memory.

[Means to solve the problem]

FIG. 1 is a diagram showing the principle of the present invention.

In FIG. 1, 1 and 2 are two sets of processing devices constituting an information processing system that is the object of the present invention, and 3 is a dual port memory used by the processing devices 1 and 2 to communicate with each other. It is.

Reference numeral 101 denotes initialization means provided in one of the processing apparatuses 1 according to the present invention.

Reference numeral 102 denotes initialization completion notification means provided in one of the processing devices 1 according to the present invention.

201 is initialization completion monitoring means provided in the other processing device 2 according to the present invention.

202 is a completion confirmation notification means provided in the other processing device 2 according to the present invention.

103 and 203 are inter-processing device information transfer means provided in each of the processing devices 1 and 2 according to the present invention.

301, 302, and 303 are a completion information setting area, a confirmation information setting area, and a transfer information setting area, respectively, provided in the dual port memory 3 according to the present invention.

[Effect]

Initialization means 101 initializes the storage area of dual port memory 3.

After the initialization means 101 completes the initialization of the dual port memory 3, the initialization completion notification means 102 sends completion information C1 notifying completion of initialization of the dual port memory 3 to a predetermined location in the dual port memory 3. The confirmation information storage area 301 in the dual port memory 3 is periodically stored in the completion information storage area 301.
2, and when completion confirmation information R1 indicating that initialization of the dual port memory 3 stored in the other processing device 2 has been confirmed is detected, the completion information C1 for the completion information storage area 301 is detected. Stop storage.

The initialization completion monitoring means 201 causes the other processing device 2 to once delete the stored contents of the completion information storage area 301 in the dual port memory 3, and then monitors the stored contents of the completion information storage area 301.

Completion confirmation notification means 202 is initialization completion monitoring means 201
When the completion information C1 is detected in the completion information storage area 301, the completion confirmation information R1 is stored in the confirmation information storage area 302.

When the inter-processing device information transfer means 103 and 203 communicate with each other via the dual port memory 3, the transfer information setting area 303 in the dual port memory 3 has the following information:
Stores control information required for communication.

Therefore, by providing only dual-port memory, two sets of processing devices can communicate with each other, including notification of completion of dual-port memory initialization, and control registers and peripheral circuits are completely eliminated. No longer needed,
The economic efficiency of the information processing system is improved.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a diagram showing an information processing system according to an embodiment of the present invention, FIG. 3 is a diagram illustrating the initialization process in FIG. 2, and FIG. 4 is a diagram showing inter-processing device communication in FIG. It is a figure which illustrates a process. Note that the same reference numerals refer to the same objects throughout the plan.

In FIG. 2, an initialization unit 11 and an initial completion notification unit 12 are provided in the processing unit (CPU) 1 as the initialization unit 101 and initialization completion notification unit 102 in FIG. The initial completion monitoring unit 21 serves as the conversion completion monitoring unit 201 and the completion confirmation notification unit 202.
and a completion confirmation notification section 22 are provided in the processing device (CPU) 2, and a transmission notification section 14 and a response section 16 are provided in the processing device (CPU) 1 as inter-processing device information transfer means 103 and 203 in FIG. In addition, a transmission notification unit 26 and a response unit 24 are provided in the processing unit (CPU) 2, and a completion information storage area 301 in FIG.
Confirmation information storage area 302 and transfer information storage area 303
Control areas AC and AC2 are provided within the dual port memory (DPM) 3.

Also in FIG. 2, it is assumed that the processing unit (CPU) 1 initializes the dual port memory (DPM) 3 when the power is turned on.

2 to 4, the processing unit (CPU) 1 activates the initialization unit 11 when the power is turned on, and starts initializing the storage area of the dual port memory (DPM) 3 (step 311 in FIG. 3). Dual port memory (DPM)
3 completes the initialization of all storage areas (step 512
), the initial completion notification unit 12 is activated.

The activated initial completion notification unit 12 uses a control area A predetermined in the dual port memory (DPM) 3 as a storage area for control information to be transferred by the processing bag fi (CPU) 2 to the processing device (CPU) 1. . 2 (step 513) until the processing unit (CPU) 2 stores completion confirmation information R1 indicating that the dual port memory (DPM) 3 initialization has been completed (step 514).
), control area A of dual port memory (DPM) 3
Completion information C1 indicating completion of initialization of dual port memory (DPM) 3 is repeatedly stored in c+ (step 5
15).

On the other hand, the processing unit (CPU) 2 starts the initial completion monitoring unit 21 when the power is turned on, and the dual port memory (DPM) 3
After once erasing the completion information C1 by storing information other than the completion information C1 in the control area Act of
21), the contents stored in the control area Ac+ are monitored (step 522), and the initialization of the dual port memory (DPM) 3 is determined to be incomplete until the completion information C1 is detected (step 523), the dual port memory (DPM) ) 3 to the processing unit (CPU) 1 is not started.

Eventually, the initialization unit 11 of the processing device (cps) 1 completes the initialization of all storage areas of the dual port memory (DPM) 3, and the initial completion notification unit 12 completes the initialization of the entire storage area of the dual port memory (DPM) 3.
When the completion information C1 is stored in the control area A (H) of the DPM) 3, the initial completion monitoring unit 21 of the processing unit (CPU) 2 detects the completion information C1 in the control area Ac1, and the dual port memory (DPM) After confirming the completion of initialization in step 3 (
Step 523), the completion confirmation notification section 22 is activated.

The activated completion confirmation notification unit 22 sends information to the control area Acz of the dual port memory (DPM) 3 from the processing device (CPU).
) 2 stores completion confirmation information R1 indicating that the initialization of the dual port memory (DPM) 3 has been completed within 1 m.
) 3 to start communication with the processing device (CPU) 1.

In this state, in the processing device (CPU) 1, the initial completion notification unit 12 is activated in the control area A of the dual port memory (DPM) 3. 2 (step 514), the processing unit (CPU) 2 determines that it has confirmed that the initialization of the dual port memory (DPM) 3 is completed, and the dual port memory (DPM) 317
) Stops storing the completion information C1 in the aw4 area AcI, and thereafter starts communication with the processing unit f (CPU) 2 using the dual port memory (DPM) 3.

For example, processing equipment! (CPLI) 1 is the processing unit (CPU) 2
When transmitting command C consisting of
3, and in dual port memory (DPM) 3,
After storing the command C in the data area A, which stores the information transferred from the processing unit (CPU) 1 to the processing unit (CPU) 2 (step 5101 in FIG. 4), the transmission notification unit 14 is activated and the dual port A notification flag F indicating that transfer information is stored in the control area Ac+ of the memory (DPM) 3 and in the data area ADI of the dual port memory (DPM) 3. is stored (Step 3102), and the presence or absence of the response flag FR in the control area AC2 of the dual port memory (DPM) 3 is monitored (Step 5I03).

The processing unit (CPU) 2 activates the receiving unit 23 and monitors the presence or absence of the notification flag FC in the restricted aw4 area AC1 of the dual port memory (DPM) 3 (step 5201), and when the notification flag Fc is detected, (Step 5
202), to extract the command C stored in the data area ADl of the dual port memory (DPM) 3. After executing the process specified by the command C (step 5203), the response unit 24 is executed. The response information R indicating the processing result based on the command C is sent to the processing device (C
PU) Processing equipment from 2! After storing the transfer information to (CPU) 1 in the data area ADZ (step 5205
), control area A of dual port memory (DPM) 3
Step 5206 of deleting the notification flag Fc in CI
, control J area AC2 of dual port memory (DPM) 3
Then, a response flag FR indicating that transfer information is stored in the data area Ag2 of the dual port memory (DPM) 3 is stored (step 3207).

In the processing device (CPU) l, before a predetermined time has elapsed since the transmission notification unit 14 started monitoring the control area AC2 (step 5IO5), the control area A (
When response flags F and l are detected within 2 (step 510
4) Extract the response information R stored in the data area A D 2 of the dual port memory (DPM) 3 and check the processing result of the command C by the processing unit (CPU) 2 (step 5106). If it is confirmed that the process is normal, normal processing is executed (Step 5li), and if the processing result is confirmed to be abnormal, abnormal processing is executed (Step 5107). The notification flag Fc stored in 2 is deleted (step 5109).

Note that in steps 5103 to 5105, even if a predetermined time has elapsed since the transmission notification unit 14 started monitoring the control areas A and 2, it is not possible to detect that the response flag FR is stored in the control area AC2. Even if there is no error, the processing unit (CPU) 1 executes the abnormality processing (step 3107) and then returns the control area A of the dual port memory (DPM) 3. The notification flag F stored in 2 is deleted (step 5109).

As is clear from the above description, according to this embodiment, the processing units (CPUs) 1 and 2 have dual port memories.
Mutual communication is possible only with the dual port memory (DPM) 3, including notification of the completion of initialization of the (DPM) 3. 5) is no longer necessary.

Note that FIGS. 2 to 4 are only one embodiment of the present invention, and the present invention is not limited to, for example, initialization of the dual port memory (DPM) 3 performed by the processing unit (CPU) 1. It is also considered that the process is executed by the processing unit (CPU) 2 without any modifications, but many other modifications are also considered, but the effects of the present invention do not change in either case. In addition, processing equipment (C
The processing unit (CPU) 1 is not limited to transferring the command C to the processing unit (CPU) 2, and the processing unit (CPU) 2 transfers the response information R to the processing unit (CPU) 1. ) 2 activates the transmitter 25 and the transmission notification unit 26 to transfer the command C, and the processing unit (CPU) 1 activates the receiver 15 and the response unit 16 to transfer the response information R. However, the effects of the present invention remain the same in either case. Furthermore, the processing units (CPUs) 1 and 2 are not limited to transferring one type of command C and response information R, but can transfer multiple types of commands C and response information R in parallel, each with identification information added. Although it is also possible to transfer the data by using the same method, the effect of the present invention remains the same in either case. Furthermore, it goes without saying that the information processing system to which the present invention is applied is not limited to what is illustrated.

〔Effect of the invention〕

As described above, according to the present invention, in the information processing system, two sets of processing devices can communicate with each other, including notification of completion of initialization of the dual port memory, by providing only the dual port memory. This makes it possible to eliminate the need for control registers, peripheral circuits, etc., and improves the economic efficiency of the information processing system.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the principle of the present invention, FIG. 2 is a diagram showing an information processing system according to an embodiment of the present invention, FIG. 3 is a diagram illustrating the initialization process in FIG. 2, and FIG. FIG. 2 is a diagram illustrating communication processing between processing devices, and FIG. 5 is a diagram illustrating an example of a conventional information processing system.

Claims (1)

[Claims] Two sets of processing devices (1, 2) are connected to a dual port memory (3).
In an information processing system that communicates with each other via a dual port memory (
3) initializing means (101) for initializing the storage area; and after the initializing means (101) completes initializing the dual port memory (3), initializing the dual port memory (3). Completion information (C_I) that notifies completion
is periodically stored in a predetermined completion information storage area (301) in the dual port memory (3), and a predetermined confirmation information storage area (302) in the dual port memory (3). monitors the stored contents of the dual port memory (3) stored therein, and when completion confirmation information (R_I) indicating that completion of initialization of the dual port memory (3) stored in the other processing device (2) is detected, the completion information initialization completion notification means (102) for stopping storage of the completion information (C_I) in the storage area (301); initialization completion monitoring means (201) that monitors the storage contents of the completion information storage area (301) after once erasing the storage contents of the storage area (301); Completion confirmation notification means (202) for storing the completion confirmation information (R_I) in the confirmation information storage area (302) when the completion information (C_I) is detected in the information storage area (301);
), and when the respective processing devices (1, 2) communicate with each other via the dual port memory (3), predetermined transfer information in the dual port memory (3) is provided. inter-processing device information transfer means (103, 203) for storing control information necessary for the communication in a storage area (303);
An inter-processing device communication method characterized by providing a respective processing device.