JPH02212850A - Pattern forming method - Google Patents

Abstract

PURPOSE:To improve the accuracy of interlaminar superposition by sticking a lower resist film and an upper resist film on a substrate and subjecting these resist materials to practically simultaneous exposure with a low dose and a high dose so that the resist materials have different developing characteristics. CONSTITUTION:A lower resist film 41 and an upper resist film 45 are stuck on a substrate 19. Regions 21a-21c for first openings are exposed with a low dose so that both of the resist materials have positive type characteristics. Regions 49a-49c for second openings are exposed with a high dose so that the lower resist material has positive type characteristics and the upper resist material has negative type characteristics. The different resist films 41, 45 are subjected to practically simultaneous exposure and resist patterns 51, 57 having different functions can be formed. The number of repetitions of exposure is practically reduced and the accuracy of interlaminar superposition can be improved.

Description

[Detailed description of the invention]

(Industrial Application Field) The present invention relates to a pattern forming method used in the manufacture of semiconductor devices, etc., and relates to, for example, a technique for forming wiring patterns, contact hole patterns, or other patterns that can be formed by one irradiation of two different patterns. It's dark. (Prior Art) Manufacturing a semiconductor device generally requires forming various resist patterns multiple times depending on the design. The resist pattern formed in this manner serves various functions as, for example, an etching mask, a lift-off mask, and an ion implantation mask, and various manufacturing processes such as film formation and impurity ion implantation are performed. The resist pattern is formed by first applying a resist material, which is a photosensitive material, onto a base to form a resist film. Therefore, depending on the characteristics of each resist material, the resist film is exposed to light, electron beams, X-rays, or ion beams (in this specification, these are collectively referred to as radiation). ), and then undergoes rough development to obtain a desired resist pattern according to the design. Methods for irradiating the resist film with radiation include an indirect drawing method in which the above-mentioned radiation is transmitted or reflected through an original plate (for example, a photomask) on which a pattern has already been formed, and the pattern on the original plate is transferred onto the resist film. A direct writing method is known in which a pattern serving as an original image is directly drawn on a resist film by scanning radiation. Prior to describing the present invention, conventional pattern forming techniques will be described below with reference to the drawings. FIGS. 5(A) to 5(F) are diagrams for explaining an example of a conventional pattern forming technique, in which a contact hole is formed in an interlayer insulating film, and a wiring pattern (hereinafter referred to as This is a schematic cross-sectional view of the detailed manufacturing process for forming a wiring pattern (inclusively referred to as a wiring pattern including an electrode pattern). First, as shown in FIG.
Absolute 811 made of ateGlass (phosphorus silicate glass)! +7 is formed and base 19 is obtained. Of these, the silicon oxide 11113 is formed so as to sandwich the polysilicon layer 15, and in order to reduce the step difference caused by providing the polysilicon layer 15, an insulation j1+7 made of a reflowable material is provided ( Hereinafter, these two insulating films may be collectively referred to simply as an interlayer insulating film.) Next, a resist material is applied to the surface of the base 19 in the above-described state to form a resist film (not shown) IFr. Subsequently, the resist film is irradiated with radiation (hereinafter simply referred to as exposure) and developed, and as shown in FIG. Insulating film 1 corresponding to the uppermost layer of base 19
7, the first resist pattern 25 is obtained. Therefore, using the first resist pattern 25 described above as an etching mask, the insulating film 17 and silicon oxide ll11 are etched.
A predetermined area of No. 3 is removed by etching. In this way,
In the first opening planned regions 21a and 2Jc, contact holes 27a and 27c are formed to expose the substrate 11 through the first openings 23a and 23c, respectively. At the same time, a contact hole 27b exposing the polysilicon layer 15 is formed in the first opening planned region 21b through the first opening 23t (FIG. 5(C)).
). Subsequently, after removing the first resist pattern 25, the contact holes 27a to 27c are backfilled by depositing an aluminum alloy or the like on the entire upper surface of the base 19, and then the contact holes 27a to 27c are filled with enough material to prevent step breaks. A wiring metal layer 29 is deposited to a film thickness (FIG. 5(D)'). In order to form a pattern for the wiring metal layer 29 after undergoing these steps, a resist film is formed in the same manner as described above, and after the resist film is exposed to light, development is performed, and as shown in FIG.
As shown in E), a second resist pattern 31 is formed in a region covering at least the aforementioned first opening planned regions 21a to 21c. Next, using the second resist pattern 31 described above as an etching mask, a predetermined region of the wiring metal layer 29 is removed by etching. Thereafter, by removing the second resist pattern 31, a wiring pattern 33 electrically connected to the substrate 11 via the contact holes 27a and 27C is formed.
a or 33c and through the contact hole 27b,
Wiring pattern 3 electrically connected to polysilicon layer 15
3b is formed (FIG. 5(F)). Further, as another conventional technique for forming the above-mentioned wiring patterns 33a-33c, contact holes 27a-2
A technique is also known in which after drilling hole 7c, lift-off is used instead of the ring graph technique. FIGS. 6(A) and 6(8) are schematic cross-sectional views showing steps for performing the lift-off technique instead of the steps shown in FIGS. 5(D)-(F). First, in the step of forming the contact holes shown in FIG. 5(C) described above, as shown in FIG. A second opening 3 is provided in each of the planned opening areas 35a to 35c.
A second resist pattern 39 defining regions 7a to 37c is formed. As shown in this figure, the above-mentioned second resist pattern 39
are components having an inverted pattern relationship with the second resist patterns 31a to 31c described above. After such a process, the entire surface of the base 19 on which the second resist pattern 39 is formed is discontinuously adhered by the resist pattern 39, and the contact holes 27a to 27c and the second openings 37a to The wiring metal layer 41 is deposited so that the 37c and 37c are respectively backfilled (FIG. 6(B)). Therefore, by lifting off the resist pattern 39, portions of the wiring metal layer 41 that will backfill the contact holes 27a to 27c remain. Also by passing through such a lift-off process, the wiring patterns 33a to 33c as shown in FIG. 5(F) described above can be obtained. Hereinafter, a manufacturing technique using such a resist pattern, a wiring pattern formed using the pattern, a profile of an impurity diffusion region, etc. will be collectively referred to as a pattern forming technique. As semiconductor devices 1 and the like have become smaller and more highly integrated in recent years, there has been a demand for improved dimensional accuracy in pattern forming technology and support for substrates with steps. To address these requirements, instead of the single layer resist process mentioned above, CEL (Cor+trust Enh.
anced: thaqraphyC contrast enhanced lithography) technology and PC lock (Port
Multi-layer resist processes such as portable conformal mask technology have come into increasing use. (Problem to be solved by the invention) However, in the conventional pattern forming technology described above,
For example, between a substrate and an interlayer insulating film.

[When defining openings that reach each of two different layers using a resist pattern, an opening that reaches the other layer is placed on the developed edge of the resist film after exposure for the purpose of defining an opening that reaches one layer. It is necessary to perform exposure to form the portion. For this reason, there were the following problems. (2) As the dimensions required for resist patterns become finer due to the miniaturization and higher integration of semiconductor devices, etc., it becomes necessary to improve the interlayer overlay accuracy of formed resist patterns. However, with conventional technology, it is difficult to improve the above-mentioned glabella overlay accuracy due to factors that are difficult to eliminate, such as detection errors of overlay marks (alignment marks), pattern position distortion due to wafer warpage, and overlay errors of exposure equipment. is difficult. ■TAT (Turn A) related to the manufacture of semiconductor devices II, etc.
Reducing roundTime (time required to manufacture one product) and reducing product costs are essential for expanding markets that tend to produce a wide variety of products in small quantities. In order to achieve such market expansion, one effective means is to reduce the number of exposures in the Bakoon forming technology, but it has been difficult to achieve such a reduction in the number of exposures using conventional techniques. In view of the above-mentioned conventional problems, an object of the present invention is to substantially reduce the number of exposures when forming openings reaching each of two or more different layers using a resist pattern, and to improve interlayer overlapping. An object of the present invention is to provide a pattern forming method that can improve accuracy. (Means for Solving the Problem) In order to achieve this object, according to the pattern forming method according to the first invention of this application, a lower resist film and an upper resist film are formed on a base consisting of at least two layers. a first step of forming mask pattern layers sequentially deposited;
The first opening area of the mask pattern layer described above is exposed to radiation at a low dose in which the lower resist material constituting the lower resist film described above and the upper resist material forming the upper resist pattern exhibit positive characteristics. , and the second opening area different from the first opening area of the mask pattern layer is formed by the lower resist material having positive type characteristics and the upper resist material having negative type characteristics. a second step of exposing to radiation with a high-dose phoenix showing the and a third step of forming the respective parts. Further, according to the pattern forming method according to the second invention of this application, the second step of the first invention described above is performed by forming the first intended opening area and the second intended opening area. continuous(
The third step of the first invention described above is performed by removing the soil layer resist film in the region where the first opening is to be formed to form an upper resist pattern. Using this upper resist pattern as an etching mask, at least the lower resist film in the area where the first opening is to be formed is etched away to form a first opening, and the upper resist film defining the first opening is etched away. After the resist pattern is removed, a portion of the lower resist film remaining in the area 9I where the second opening is planned is developed and removed to form the second opening. In general, in carrying out the second invention, it is preferable to provide an intermediate layer on the lower resist film described above, and to provide the upper resist film described above on this intermediate layer. Further, according to the pattern forming method according to the third invention of this application, the second step of the first invention described above is performed so that the aforementioned tray-opening area and the second opening area are as described above. The third step of the first invention described above is carried out by exposing the mask pattern layer to radiation as different regions related to M, and the third step of the first invention described above is performed on the upper resist film and the lower resist film of the aforementioned first opening planned region. is removed to form a first opening, and after removing the upper resist pattern that defines the first opening,
The method is characterized in that the lower resist film in the area where the second opening is to be formed is developed and removed to form the second gap gB. In general, when carrying out the pattern forming method according to the third invention, it is preferable to provide an intermediate layer on the lower resist film described above, and to provide the upper resist film described above on this intermediate layer. (Function) In the pattern forming method according to the invention of this application, in a state where the lower resist film and the upper resist film are deposited on the above-mentioned base, both the upper resist material and the lower resist material exhibit positive type characteristics. The desired area of the first opening is exposed at a low dose, the lower resist material exhibits positive tone characteristics, and the upper resist material exhibits negative tone characteristics. The second opening region is exposed to light at a high dose indicated by L. For this reason, after two types of exposure are performed substantially simultaneously without development, the upper resist film is first developed, and the upper layer of the area where the second opening is to be formed, which has a negative type characteristic at a high dose, is exposed. While the resist/film remains, only the upper resist film corresponding to the region where the first opening is to be formed, which has been exposed to light at a low dose, is removed to form the leg opening. Roughly, after removing the upper resist layer, by developing the lower resist film, in addition to the first opening that has already been formed,
The second opening is formed by removing the lower resist film corresponding to the region where the second opening is to be formed and which has been exposed at a high dose. Therefore, by using the pattern forming method according to this application, each of the different resist films can be formed simultaneously (after exposure,
It becomes possible to form two types of resist patterns with different functions. (Example) Examples of the pattern forming method according to the invention of this application will be described below with reference to the drawings. It should be noted that the drawings referred to in the following description are merely illustrative in outline to the extent that the present invention can be understood, and it should be understood that the present invention is not limited only to the illustrated resist. First, as a resist material suitable for carrying out the present invention, in one embodiment described below, rAZ-2400,1 (manufactured by Silaplay Co., Ltd., trade name), which is a novolak-based positive resist, is used as a soil layer resist material. As the lower resist material, polymethyl methacrylate "M*S'M Resistoteal 1E8R-1000,!l (manufactured by Kokyo Ohka Co., Ltd., trade name) 8
Using. In order to explain the relationship between the electron beam dose and resist characteristics for the two types of resist materials mentioned above, FIG. 4 shows the normalized film thickness on the vertical axis and the electron beam dose (u) on the horizontal axis.
Fig. 4 is a characteristic curve diagram showing the characteristic curve (c/cm2) taken on a logarithmic scale. In the same figure, the curved line indicated by the dashed line is 1i'A7-2400Jl (7) used as the upper layer resist material.
Special f! ,! The curve (2) shown by the tiger line is the characteristic of [i'0E8R-1000J] used as the lower resist material.
, I am showing. First, as you can understand from the curved line in this figure, FA?
-2400J has an electron beam dose of approximately 1 (uC/c
As the film thickness increases from about 50 (uC/cm2), the positive type characteristics become larger, and the normalized film thickness becomes O at about 50 (uC/cm2).
), and from such a value, the dose j
As l increases, the negative type characteristics become larger and the normalized film thickness gradually becomes larger. Also, as can be understood from the curve ■ in this figure, T 0E
Similarly to the above, the positive type characteristics of BR-1000J increase as the electron beam dose increases from about 100 (u C/cm2). Such positive type characteristics are 15
It is maintained up to a dose I of 0.00 (u Is / cm2), and from such a value, it can be seen that as the dose amount increases, the negative characteristics become larger. Here, using F AX-2400J shown by the curved line as the upper layer resist material, rOE8R-+oo shown by the curved line
o,av! When used as lower resist materials, both of these resist materials become positive-toned by low-dose exposure. , and it can be understood that by exposure at a high dose, conditions can be set in which the upper layer resist material has negative type characteristics and the lower layer resist material has positive type characteristics. Therefore, when taking advantage of the difference in the development characteristics of the two resist materials mentioned above, it is necessary to take into account the fact that the exposure throughput can be improved and the proximity effect can be suppressed by reducing the dose amount. Dose amount D + @ 5
0 to 60 (u C/cm"), and set the high dose D2 to 700 to 1,000 (LJ C/cm").
cm2). [111] Hereinafter, as Example 1 according to the second invention of this application, similar to the prior art described above, a case where a contact hole is opened and a wiring pattern is formed by lift-off using this contact hole is explained. The manufacturing process will be explained using an example. M1 Figures (A) to (H) are for explaining Example 1, Figures 5 (A) to (F) and Figure 6 (A) and CB
) is a schematic cross-sectional view similar to that shown in FIG. In this figure, hatching and the like indicating a cross section are partially omitted, and components having the same functions as those already described are given the same reference numerals and detailed explanations are omitted. First, similar to the conventional technique explained in FIG. 5(A), a silicon oxide film 13, a polysilicon layer 15,
and an insulated S film +718: is formed to obtain a base layer 1918. At this time, the film thickness of silicon oxide 11113 is 0.02 (
The film thickness of the insulating layer 17 was set to 0.6 (Llm). Subsequently, on such a base 19, the above-mentioned f 0E8R
-100 OJ is applied to form a lower resist film 41 with a film thickness of 2 (un). Thereafter, amorphous silicon was deposited as the intermediate layer 43 to a thickness of 0.1 (um).
Furthermore, apply the above-mentioned rA2-2400Jl and apply 0.6
An upper resist film 45 is formed with a film thickness of (urn). By disposing the intermediate layer 43, formation of a mixed layer between the upper resist film and the lower resist film can be avoided. In this way, the lower resist film 41,
A mask pattern layer 47 consisting of an intermediate layer 43 and an upper resist layer 45 is formed to obtain the state shown in FIG. 1(A), and the first step is completed. Next, in the above-described mask pattern layer 47, first opening planned regions 21a to 21a for forming contact holes are
21c is irradiated with an electron beam using the low dose meter described above. Also, substantially simultaneously with this electron beam irradiation (exposure),
In the mask pattern layer 47, each of the second opening planned areas 49a to 49c, which are different from the first opening planned area, for forming a wiring pattern is coated with the high dose 11 described above.
Electron beam irradiation is performed in D2 (FIG. 1 (8)). Here, the state shown in FIG. 1(B) is the mask pattern layer 4.
7 is schematically shown in FIG. 2 as viewed from the surface side (corresponding to the upper layer resist 11145).
The cross section shown in FIG. 8 is indicated by a chain double-dashed line A in FIG. As shown in FIG. 2, in Example 1, each of the first planned opening areas 21a to 21c and each of the second planned opening areas 49a to 49c are continuous (bordering).
The area is exposed to light to complete the second step. Subsequently, the upper resist film 45 of the above-described exposed mask pattern layer 47 is developed using a conventionally well-known alkaline developer suitable for Ii'A'2-2400.5, which is the upper resist material. At this time, the areas exposed at low doses become soluble in the developer, whereas the areas exposed at high doses become soluble in the developer.
Since the portion exposed with lD2 exhibits negative type characteristics,
Like the unexposed area, it becomes insoluble in the developer. Therefore, by the above-mentioned development process, only the predetermined portions of the upper resist film 45 corresponding to the first opening planned regions 21a to 21c exposed at a low dose are removed, as shown in FIG. 1(C). An upper layer resist pattern 51 is formed. Next, using the above-described upper resist pattern 51 as an etching mask, reactive ion etching (0,-RIE (Reactive Jo) using oxygen plasma, for example) is performed.
nEtchinq)), the first opening planned area 21
A predetermined portion of the intermediate layer 43 and a predetermined portion of the lower resist film 41 exposed in layers a to 21c are removed by etching. Through such an etching process, the first openings 53a to 53 reaching the insulating layer 17 are formed as shown in FIG. 1(D).
c is formed. As can be understood from the above description, in the manufacturing process according to Example 1, at least the lower resist film is patterned to form the first openings 53a to 53c. Next (this is the first opening 5 formed by the remaining lower resist film 41 including the portion exposed at the high dose D2)
3a to 53c, the first opening planned areas 21a to 2
The insulating layer 17 and silicon oxide film 13 of 1c are removed by etching. As shown in FIG. 1(D), by this etching process, a touch hole 55a or 55c exposing the substrate 11 is formed in the first opening planned regions 21a and 21c, respectively. At the same time, a contact hole 65b exposing the polysilicon layer 15 is formed in the intended opening area 2 (b). Also, the intermediate layer 43 provided for the purpose of eliminating the mixed layer described above is Depending on the difference in etching speed between the interlayer insulating film and the intermediate layer and the film thickness of these components, it is possible to remove the contact hole at the same time as the above-mentioned contact hole opening. -1000
The lower resist l is developed using a conventionally known organic developer suitable for J.
-,III! 41 is developed. At this time, high dose mD
Since the exposed area in step 2 is soluble in the developer mentioned above,
Only predetermined portions of the lower resist film 41 corresponding to the second opening planned regions 49a to 49c are removed. The lower resist pattern 57 is pattern-formed through such a procedure, and as shown in FIG.
Each of 9a to 59c is formed, and the third step is completed. As shown in FIG. 1(F), the lower resist pattern 57 obtained in Example 1 has a width of the resist pattern on the surface of the base (a so-called reverse taper pattern in which the width of the pattern surface becomes larger in comparison). It is possible to form it in a cross-sectional shape.This is due to the well-known backscattering of the electron beam used for exposure in Example 1.
Therefore, after performing pattern formation, which is a feature of the embodiment of the second invention of this application, the wiring metal layer 41 is deposited in the same manner as the conventional method explained with reference to FIG. 6(B) (see FIG. 1(G)'IP
When lifting off the lower resist pattern 57 through the resist butter 157, the inversely tapered shape of the resist butter 157 allows the wiring pattern 6 to have a low frequency of occurrence of cracks, etc.
1a to 81c are contact holes 55a to 55, respectively.
c1F! : , are patterned by filling each other (FIG. 1(H)). Although the embodiment of the IC lump according to the second invention of this application has been described in detail above, this invention is not limited to the above-mentioned embodiment. For example, in the first embodiment described above, specific materials were used as examples for the upper resist material and the lower resist material, but the upper resist material was a low-dose material. and high dose jlDz, respectively, and are exposed with different development characteristics, and the lower resist material may be any of these materials, D+ and D2, as long as it has positive development characteristics. In addition, in Example 1, the case where an intermediate layer made of a specific material was provided, but the pattern formation of the lower resist film (
Figure 1 (C)-(D)? Other suitable materials may be used as long as they act as an etching mask. Roughly speaking, depending on the etching resistance properties of the upper resist material and the lower resist material described above, the composition of the lower resist film described above may be used. Upper layer resist pattern 5 for pattern forming technology
If 1 has sufficient etching resistance and the developer of these resist materials acts independently, an intermediate layer may be provided unless a mixed layer is formed between the resist films made of each of these two materials. Even if it is performed without
It is possible to obtain the same effect. In addition, in the first embodiment described above, in the case of a continuous area where the first opening planned area and the second opening planned area border each other, the contact hole is etched indirectly by the first opening. A pattern forming technique in which a hole is opened and a wiring pattern is formed by lift-off using a second opening has been explained. However, the invention according to this application is not limited to such a case, and the arrangement of two consecutive opening planned areas 1fl'! Therefore, two types of patterns having various functions can be formed in substantially one exposure, and the glabella overlay accuracy can be improved. Next, as Example 2 according to the third invention of this application, the first intended opening area and the second intended opening area are exposed as areas separated on the mask pattern layer, and the etching depth is A manufacturing process for forming two types of contact holes with different values will be described by way of example. In the following description, in order to avoid redundant explanation, the film thickness of each component will be partially omitted, except for the component that is a feature of this embodiment. 3(A) to 3(F) are schematic cross-sectional views similar to 19th (A) to 19(H) in order to explain Example 2, and the constituent components already explained above are shown. are given the same reference numerals, and some hatching etc. are omitted. In this embodiment 2, as shown in M3 diagram (A),
A silicon oxide film 63 is formed on the oxide film 63.
There is a wiring layer 65 on the surface of the board for the purpose of planarization. 4 membranes 67
An insulating film 69 is further formed on top of the insulating film 69 to obtain a base 71. At this time, by setting the thicknesses of the wiring layer 65 and the insulating film 67 to the same value, the structure is such that the underlying layer 71 is planarized. Subsequently, as in FIG. 1(A), the above-mentioned rOE8R-1000J! Apply and lower resist film 7
3. The above-mentioned intermediate layer 75 and the above-mentioned FA2-24ΩOJ are coated, and an upper resist layer 77 is sequentially applied to form a mask pattern layer 79 (FIG. 3(A)). In this way, after completing the first step according to Example 2, a first opening is planned for forming a contact hole for the purpose of electrical connection to the substrate 11 in the above-mentioned mask pattern layer 79. The region 81 is irradiated with the electron beam at the aforementioned low dose D1. Also, at the same time as this electron beam irradiation (exposure), in the mask pattern layer 79,
The second opening planned region 83 for forming a contact hole for the purpose of electrical connection to the wiring 1165 is irradiated with an electron beam at the aforementioned high dose jlD2 (
Figure 3 (B)). In this manner, in the second embodiment, the first intended opening area 81 and the second intended opening area 83, which are spaced apart from each other, are exposed simultaneously as a 911 area related to M on the mask pattern layer. , completes the second step. Subsequently, the upper resist film of the above-described exposed mask pattern layer 79 is developed with an alkaline developer suitable for fAZ-2400J, which is the upper resist material. As a result, as in Example 1, only the upper resist 1ii77 corresponding to the first opening planned region 81 exposed at a low dose is removed. Although illustration of the upper resist pattern obtained by such development is omitted, after going through the process, the upper resist pattern is used as an etching mask to expose the 0□-R1ε (therefore, the first opening planned region 8). The intermediate layer 75 and the lower resist layer 11173 are removed by etching. As a result, a first opening 85 reaching an absolute point 1169 is formed,
Roughly, for example, the insulating film 69 is inserted through the opening 85.
as well as! l: The etching process is stopped when HII67 is removed. In this way, as shown in FIG. 3C, an open pattern 87 is formed that exposes the silicon oxide film 63 in the first intended opening region 11i81. As can be understood from the above description, the intermediate layer 75 according to the second embodiment is provided for the purpose of eliminating the mixed layer as in the first embodiment described above. Therefore, depending on the difference in etching speed between the glabella insulating film and the intermediate layer and the film thicknesses of these constituent components, it is possible to remove them simultaneously with the opening of the opening pattern 87 described above. In addition, in this embodiment 2, when developing the upper resist film related to the formation of the first opening 85, the second opening planned area 9I 8
3 is covered with an upper resist film exhibiting negative type characteristics. Therefore, for example, when both the upper resist material and the lower resist material have a material composition that can be developed simultaneously, by performing the first step without providing an intermediate layer in the mask pattern layer, the above-mentioned 0, -RIE Instead of the step, the formation of the first opening 85 can be achieved by simultaneous development of the upper resist film and the lower resist film. Subsequently, for the formation of the open pattern 87 described above, the lower resist film 73 is developed using an organic developer suitable for the lower resist material [i'0E8R-1000J, and the exposed portions are exposed at a high dose D2. Remove. The lower resist pattern 89 is pattern-formed by such a procedure, and as shown in FIG.
8 to complete the third step. In this way, the silicon oxide film 63 is etched through the open pattern 87, and the insulation 1169 is etched through the second opening 91. Removal (Figure 3 (E))
By roughly removing the lower resist pattern 89, a contact hole 9 is formed in which the substrate 11 is exposed in the first opening planned region 81, as shown in FIG. 3(F).
3 and the second opening planned region 83, contact holes 95 that expose the wiring layer 65 can be formed at the same time. As can be understood from the above explanation, when two contact holes with different depths are formed in one exposure using the conventional technique as in the second embodiment, the depth of the contact hole in each column is Because of the difference in etching, etching causes damage to the underlying portion (corresponding to the wiring layer 65 in the case of the second embodiment) of the smaller depth of these contact holes. In order to avoid this damage according to the conventional technology, for example, if one contact hole is formed in the first resist pattern formation, another resist pattern is formed in the second exposure, and the other contact hole is formed in the second exposure. It is necessary to form holes. Therefore, by applying the pattern forming technology according to the third invention of this application instead of the conventional technology that requires two exposures with a few steps in between, the above-mentioned interlayer overlay accuracy can be improved. be able to. Although Example 1 and Example 2 according to the present invention have been described in detail above, it is clear that the present invention is not limited only to these Examples. For example, in the above-mentioned Example 1, when the etching mask pattern is formed by the first opening and the lift-off pattern is formed by the second opening, in Example 2, the first opening and the second opening are roughly formed. The cases in which two different types of etching mask patterns are formed have been described. However, even when using a resist pattern, using a combination of etching mask patterns, lift-off mask patterns, ion implantation mask patterns, etc., which have various functions, it is expected that the interlayer overlay accuracy will improve. It is possible. In addition, in the above-mentioned embodiment, an electron beam was used as an example of radiation, but depending on the characteristics of each resist film that plays a different function, the ability to penetrate the resist films in a stacked state, etc., light beams, X-rays, ions, etc. Any radiation including Ill can be expected to produce the same effect as the above embodiment. These materials, dimensions, shapes, arrangement II relationships, numerical conditions, and other specific conditions mentioned above can be changed or modified in any suitable design within the scope of the invention of this application. It can be expected that formation of a plurality of patterns for the purpose of achieving various functions can be performed by substantially one exposure. (Effects of the Invention) As is clear from the above explanation, according to the pattern forming method related to this amount of output, a lower resist film and an upper resist film are deposited on the above-mentioned base, and these resist films are The structure is such that exposure is performed substantially simultaneously at a low dose and a high dose so that the development characteristics of each of the constituent resist materials are achieved. In this gap, the part of the upper resist film exposed at a high dose has negative characteristics, so the resist pattern with two different functions can be combined into one.
It is formed by multiple exposures. For this reason, in forming patterns with different functions,
It is possible to substantially eliminate the decrease in interlayer overlay accuracy. Therefore, by applying the pattern forming method of the present invention, it is possible to reduce the number of exposures and improve interlayer overlay accuracy in manufacturing semiconductor devices, etc.
It is possible to improve T and reduce product cost.

[Brief explanation of the drawing]

1(A) to 1(G) are explanatory diagrams showing schematic cross-sections of each main step in order to explain Example 1 according to the pattern forming method of the second invention of this application; FIG. In order to explain Example 1, a diagram shown in a schematic plane corresponding to FIG. 1(B), ! 3 (A) to (F) are for explaining Example 2 according to the third invention of this application,
Figure 40 is a diagram similar to Figures 1 (A) to (G), in order to explain Example 1 and Example 2, the vertical axis represents the normalized film thickness, and the horizontal axis represents the dose of the electron beam. (U C
/ cm2) on a logarithmic scale.
FIG. 2 is an explanatory diagram of a prior art. 11... Substrate, 13.63... Silicon oxide film 15... Polysilicon layer 17... Insulating film 19.71... Base 21a to 21c, 81...・・・Ka-opening schedule v4
Areas 23a-23c, 53a-53c, 85...First opening 25...First resist pattern 2a-2fc, 55a-55c, 93.95...
. . . Functional holes 29 . . . Wiring metal layers 31a to 31c . . . Second resist pattern 33a
~33c, 61a ~61c...Wiring patterns 35a~35c, 49a~49c, 83...Second opening planned areas 37a~37c, 59a~59c,
91...Second opening 39...Straw resist pattern 41.73...Lower resist film, 43.75...
... Intermediate layer 45, 77... Upper resist film 47, 79... Mask pattern layer 51... Upper resist pattern 57, 89... Lower resist pattern 65...
・Wiring layer 67...insulating film, 69...insulating film 87...
Open Bakushi Dl...Low dose of radiation D2...High dose of radiation. 51: Upper layer resist pattern

Claims (5)

[Claims] (1) A first step of forming a mask pattern layer by sequentially depositing a lower resist film and an upper resist film on a base consisting of at least two layers, and a first opening planned in the mask pattern layer. A region is irradiated with radiation at a low dose in which a lower resist material constituting the lower resist film and an upper resist material constituting the upper resist film exhibit positive characteristics, and the first resist material of the mask pattern layer A second step of irradiating a second planned opening region different from the planned opening region with radiation at a high dose in which the lower layer resist material exhibits positive type characteristics and the upper layer resist material exhibits negative type characteristics.
and a third step of forming, respectively, a first opening and a second opening that reach different layers of the base by utilizing the difference in development characteristics of the upper resist film and the lower resist film. A pattern forming method characterized by comprising: (2) The second step according to claim 1 is performed by irradiating a region where the first intended opening region and the second intended opening region are continuous, and the third step forming an upper resist pattern by removing the upper resist film in the area where the first opening is to be formed; and using the upper resist pattern as an etching mask, at least the lower resist film in the area where the first opening is to be formed is etched away; to form a first opening, and after removing the upper resist pattern defining the first opening, a part of the lower resist film remaining in the area where the second opening is to be formed is developed and removed. A pattern forming method characterized by forming two openings. (3) A pattern forming method comprising providing an intermediate layer on the lower resist film according to claim 2, and providing the upper resist film on the intermediate layer. (4) The second step according to claim 1 is performed by irradiating the first opening planned area and the second opening planned area as areas separated on the mask pattern layer, and , the third step is performed by removing the upper resist film and the lower resist film in the region where the first opening is to be formed to form a first opening, and the upper resist film defining the first opening; After removing the pattern, a lower resist film in the area where the second opening is to be formed is developed and removed to form a second opening. (5) A pattern forming method, comprising providing an intermediate layer on the lower resist film according to claim 4, and providing the upper resist film on the intermediate layer.