JPH02213215A - Switched capacitor circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a switched nine-pacitor circuit that integrates a pulse width modulated or pulse density modulated signal.

[Conventional technology]

Figure 5 shows a conventional integrating circuit shown in page 7 of ``Switched Capacitor Circuit'' (published by Gendai Kogakusha on August 86, 1985).
I terminal output terminal, 131 light transmission gate%
141 +ll Try capacitor, 1B) is an operational amplifier, and (7) is a reference value C reference voltage VR). The transmission gate till Fi is composed of, for example, an MO8 transistor as shown in FIG.

Tl and T2 are side clocks, as shown in FIG. 7, for example, which repeat high level (hereinafter abbreviated as H) and low level (hereinafter abbreviated as LOW) at a period T, with the high level not overlapping each other. In Figure 6, the transistor is conductive between the drain and source when the gate is H, and non-conductive between the drain and source when the gate is L, so when Tl is H and T2 is L, the line between AB is Conductive, non-conductive between BO % When Tl is T, +, 'r2 is H, AB quantity valve is conductive, and BO2 is conductive. The switch circuit has a capacitor connected to this B terminal, and in the case of FIG. 5, it is a switch in which a transmission gate (3;) is connected to both ends of a capacitor 51.

Next, the operation will be explained. At time t, TL is H, T
If 2 is L and the switch state is as shown in FIG. 5, then time t+
- When Tl becomes T2ViH, the switch switches in the direction of the arrow, and the conducting and non-conducting states are reversed. Now, the value of capacitor +41.41 is OA
, the input voltage 1kVi (n-1) at the OB1 time is the output voltage 1vo (n-1) at the time ('11').
), the output voltage vo4 at one time 1/ζ is expressed as R v〇4m vo (n-1) --vt4,
Now, when inputting a pulse signal having two potentials of +V and -V to the input terminal +11 with respect to the reference value (7),
When sampling TI, the potential of +V or -V may continue.1 For example, in response to a pulse signal as shown in Fig. 4, the capacitance ratio C2 is
Two capacitors Tani Sumire A 1 blood ratio)? It is rarely necessary to make r ->> 1 sufficiently large.

[Problem to be solved by the invention]

Since the conventional integrating circuit is configured as described above, when a pulse signal is input, the output (2) of the integrating circuit is likely to be saturated.To prevent saturation, the capacitance ratio of the capacitors 141 and 41 must be adjusted. There were problems such as the difficulty of consolidating into one channel, as B would not be possible unless it was set to (1).

This invention was made to solve the above-mentioned problems, and aims to obtain an integrating circuit that can be easily integrated into an integrated circuit by optimizing the capacitance metal.

[Means to solve the problem]

The integrator circuit according to the present invention has a 1/N circuit that multiplies the input signal 1&:1/N at the input section of a switch toggle circuit "c's" according to the capacitance ratio, and the integrator circuit return capacitance value or This has a smaller capacity ratio.

[Effect]

The 1/N circuit in this invention distributes the charge of a sampled input signal to two or more switch circuits, and inputs the charge of the dispersed 1 switch circuits to an operational amplifier, which divides the charge of the input signal into N parts. Multiply by 1.

[One embodiment of the invention]

An embodiment of the present invention will be described below.

In Figure 1, %+11, +21 let 171
are the same or equivalent parts as those of the above-mentioned conventional device. +81f
The transmission gate of the switch circuit constituting the 1/1N circuit, (lα~a'ah, a capacitor connected to this transmission gate. (9) is a capacitor connected to the integrating circuit.

Next, the operation will be explained. Capacitor +91 [01
uu ((2) at C1, 02, 03, C4 respectively
shall be. Also, like the conventional example, switch i81 #'j
, non-overlapping clocks Tl and T2 are used to repeat conduction and non-conduction, and when Tl is H and T2 is L, the state shown in Fig. 1 is assumed, Tl is I+, 'I'2 is H
When , all switches switch in the direction of the arrow.

Now, when T1 is H and T2 is L at time t, the input voltage is vl(nl), and the output voltage is v($+)·l clocks ago (time is T), and the input voltage is m1(n-1). , the output voltage is VQ(n-1), and the charge flow is assumed to be a constant rounded voltage value for l clocks to make the explanation easier.Looking at it, we can see that the capacitor 1 clock ago (time is T) + 91 flol・force(n
-1). From here, when the 1st clock pulse of the 2nd juice is 1st time 7, Tl becomes L and T2 becomes ■, so the switch is switched in the direction of the arrow, and the capacitor + (2
) charges the capacitor lot (Ill H discharge capacitor (91) does not change. When the clock advances further by 1/2 and returns to time tK, Tl becomes 'H' and T2 becomes L again. This results in the switch state shown in Fig. 1.The charge on the capacitor u is distributed to each capacitor in the switch circuit + +01 Lu1l (2), and the condenser C1xa4·vt (n-11 light t sensor (lα has C2÷03+C! 4. Then, the charge Ifi of the capacitor (9) increases or decreases by an amount equivalent to the charge of the capacitor t101.This process is expressed by the following equation.

From Equation 11, the transfer function H (zl) of this integrating circuit becomes.

Conventionally, for example, if the capacitance ratio is 100, aA=100pF,
In the present invention, what was configured as CB = 1 pl', for example, 0A-10pF, OBsmO
By setting c-1pF and 0D=8pF, =10X (maintaining z
+as --1-(1'0), and can be realized by a combination of capacitance values with a capacitance ratio of 10 or less.

In addition, the above actual lil! In the f example, the input and output signals are in phase, but the transmission gate (
By switching the clock input in step 8), an opposite phase output can be easily obtained. For example, by controlling the switch circuit as shown in FIG. 2, the same effect as in the above embodiment can be achieved, and an opposite phase output can be obtained.

In addition, in FIG. 1, a case was explained in which two switch circuits were added as a 1/N circuit, but 3
The above switch circuit may be added. An example is shown in FIG. If ll1I of the capacitor Q31 is set to C6, an integrating circuit of a signal level obtained by adding the human power of Vl and v2 can be realized by the same principle as the implementation column in FIG. By combining the connections of two or more switch circuits in this way, by extracting and integrating the signal voltage from the reference value using the capacitance ratio of the switch circuit, it is possible to use a circuit with a low capacitance ratio even for signal voltages of one or more. An integral circuit can be realized.

〔Effect of the invention〕

As described above, according to the present invention, since the input to the integral [0] path is configured to be 1/N, the combinational circuit with a small capacitance ratio can be used even for pulse inputs such as pulse width modulation signals. This has the effect of making it possible to realize an equivalently large circuit with a large capacity, and making it easy to integrate the circuit.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of a switched capacitor integral (b) according to an embodiment of the present invention, and FIGS.
4 is an input pulse waveform diagram, FIG. 5 is a conventional switched capacitor circuit diagram, FIG. 6 is a configuration diagram of a transmission gate, and FIG. 7 is a timing diagram of an r1 control clock. In the figure, IIIH input terminal, (21 is output terminal, (31 is transmission gate, 141+Utj capacitor, 6) C operational amplifier, (71 C reference @i%F81 and 11
011111021 (131 is a switch circuit transmission gate (!:, capacitor, (91 is N
This is a capacitor with a reduced capacitance ratio due to the 1/01 path. Note that the same reference numerals indicate the same or equivalent parts.

Claims (3)

[Claims] (1) By switching the reference voltage and signal voltage through a switch circuit connected in series to a capacitor, the charge accumulated in the capacitor is distributed by the switch circuit and accumulated in the capacitor connected to the feedback circuit of the operational amplifier circuit. A switched capacitor circuit is characterized in that it functions as an integrating circuit. (2) The switched capacitor circuit according to claim 1, wherein the capacitor is configured with one or more P-channel transistors, one or more N-channel transistors, or a transmission gate with P-channel and N-channel transistors in parallel. (3) By accumulating a charge that is proportional to the signal voltage in a capacitor and distributing this charge to two or more switch circuits, the signal voltage is reduced to a ratio of the capacitance ratio of the switch circuits, and is proportional to this signal voltage. 2. The switched capacitor circuit according to claim 1, wherein the integrated circuit is configured by transferring the charged charges to a capacitor in parallel with the operational amplifier circuit.