JPH02215176A - Manufacture of semiconductor laser - Google Patents

Manufacture of semiconductor laser

Info

Publication number
JPH02215176A
JPH02215176A JP3495689A JP3495689A JPH02215176A JP H02215176 A JPH02215176 A JP H02215176A JP 3495689 A JP3495689 A JP 3495689A JP 3495689 A JP3495689 A JP 3495689A JP H02215176 A JPH02215176 A JP H02215176A
Authority
JP
Japan
Prior art keywords
wafer
groove
pattern
semiconductor lasers
semiconductor laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3495689A
Other languages
Japanese (ja)
Inventor
Shigemi Yamaguchi
山口 茂実
Akihiko Asai
浅井 昭彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Anritsu Corp
Original Assignee
Anritsu Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anritsu Corp filed Critical Anritsu Corp
Priority to JP3495689A priority Critical patent/JPH02215176A/en
Publication of JPH02215176A publication Critical patent/JPH02215176A/en
Pending legal-status Critical Current

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  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To protect a wafer against breakdown so as to handle it easily by a method wherein an electrically isolating groove is provided to a wafer through etching and electrodes are formed through evaporation before polish, and then the semiconductor wafer in which many semiconductor lasers are built is polished to be as thick as specified. CONSTITUTION:A wafer 10' is coated with an SiNx film 21 through a plasma CVD method before electrodes are provided to the wafer 10', a resist film 22 is provided thereon, and a resist pattern 22A is formed through photolithography. Next, the film 21 is patterned with a buffer hydrofluoric acid using the pattern 22A as a mask to leave only a pattern 21A unremoved. A groove 23 is formed on an exposed face of the wafer 10' through etching with bromomethanol or the like using the pattern 21A as a mask. Then, the pattern 21A is removed, the wafer 10' is polished to be as thick as specified, both the sides of the wafer 10' are coated with electrode material 24 such as AuGeNi, AuZn or the like, the material 24 is separately provided inside the groove 23 formed on the upside of the wafer 10', and a negative electrode 7 and a positive electrode 8 are formed on the upside and the underside of the wafer 10' respectively.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、オプトエレクトロニクス分舒、特に光通信
機習、光計111mの発光源として用いる半導体レーザ
の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor laser used as a light emitting source for optoelectronic devices, particularly an optical communication device and an optical meter 111m.

〔従来、の技術〕[Conventional technology]

第4図に半導体レーザのウェハの状態を示す。 FIG. 4 shows the state of a semiconductor laser wafer.

ウェハには半導体レーザが多数形成されており、まず、
乙のウェハ10は短冊形状のアレー13にへき開される
。そして、このへき開面12が発光酊となる。
A large number of semiconductor lasers are formed on the wafer.
The second wafer 10 is cleaved into strip-shaped arrays 13. Then, this cleavage plane 12 becomes a light emitting hole.

半導体レーザの特性検査方法としては、ウェハ10を個
々の半導体レーザに分離したvk111定すると、半導
体レーザが小さいために(約300μm角)、取9扱い
が難しくなる。このため、短冊形状のアレー13の状態
のままで測定し取や扱いを容易としている。
As a method for testing the characteristics of a semiconductor laser, if the wafer 10 is separated into individual semiconductor lasers, handling becomes difficult because the semiconductor lasers are small (approximately 300 μm square). Therefore, the array 13 in the form of a rectangle is easily measured and handled as it is.

アレー13の状態で各半導体レーザの特性を測定するた
めには、半導体レーザ間を電気的に分離する必要が生じ
る。半導体レーザ間を電気的に分離するためにへき開面
12と直角方向に溝11が設けられている。
In order to measure the characteristics of each semiconductor laser in the state of the array 13, it is necessary to electrically isolate the semiconductor lasers. A groove 11 is provided in a direction perpendicular to the cleavage plane 12 to electrically isolate the semiconductor lasers.

第5図は従来のアレー状態の一例を示す斜視図である。FIG. 5 is a perspective view showing an example of a conventional array state.

この図において、1はp −1n P基板、2はp−1
nPバッファ層、3はp−InGaAs活性層、4はn
−InPクラッド層、5はn−InpH流阻止層、6は
p −I n P電流阻止層、7は負電極、8は正電極
、11は溝である。
In this figure, 1 is a p-1n P substrate, 2 is a p-1
nP buffer layer, 3 is p-InGaAs active layer, 4 is n
-InP cladding layer, 5 is an n-In pH flow blocking layer, 6 is a p-InP current blocking layer, 7 is a negative electrode, 8 is a positive electrode, and 11 is a groove.

このような構造は、p −1n P基板1上にp−In
Pバ’11’77層2.p−1nPGaAsP活性層3
.n−InPクラッド層4を順次エピタキシャル成長に
よって形成後、メサ構造を形成し、さらにn −I n
 P電流阻止層5.p−InP電流阻止層6をエピタキ
シャル成長させた後に、負電極7、正電極8.溝11を
形成するものである。
Such a structure has p-In on the p-1n P substrate 1.
Pba'11'77 layer 2. p-1nPGaAsP active layer 3
.. After forming the n-InP cladding layer 4 by sequential epitaxial growth, a mesa structure is formed, and further n-InP cladding layer 4 is formed by epitaxial growth.
P current blocking layer5. After epitaxially growing the p-InP current blocking layer 6, a negative electrode 7, a positive electrode 8. The groove 11 is formed therein.

次に従来のこの溝11の形成方法を第6図(a)〜(h
)を参照して説明する。
Next, the conventional method of forming this groove 11 will be explained in FIGS. 6(a) to (h).
).

まず、電極7,8を形成する前の厚さ約400μmのウ
ェハ10′を約100μmに研磨し、第6図(a)のよ
うに−主面上にレジストを塗布し、フォトリソグラフィ
によレジストパターン14を形成する。次に第6図(b
)のようにとのレジストパターン14をマスクとして両
生面上にAuZnまたはA u G e N i等の金
属膜15を蒸着し、その後、第6図(C)のようにリフ
トオフにより不要な金属膜15とレジストパターン14
を除去する。
First, the wafer 10', which has a thickness of about 400 μm before forming the electrodes 7 and 8, is polished to about 100 μm, and as shown in FIG. A pattern 14 is formed. Next, Figure 6 (b
), using the resist pattern 14 as a mask, a metal film 15 such as AuZn or AuGeNi is deposited on the bifacial surface, and then the unnecessary metal film is removed by lift-off as shown in FIG. 6(C). 15 and resist pattern 14
remove.

次に第6図(d)のように全体を加熱してウェハ10’
 と金属膜15との合金化を施す。その後、第10 (
e)のようにフォトリソグラフィ工程によってレジスト
パターン16を形成し、次いで、第6図(f)のように
Au等の金属M17を蒸着により全面に形成し、次いで
リフトオフにより第6図(g)のようにレジストパター
ン16を除去し、金属膜17をマスクとしてエツチング
を施し、第6図(h)のように溝11を形成する。
Next, as shown in FIG. 6(d), the entire wafer 10' is heated.
and the metal film 15 are alloyed. After that, the 10th (
A resist pattern 16 is formed by a photolithography process as shown in e), then a metal M17 such as Au is formed on the entire surface by vapor deposition as shown in FIG. 6(f), and then a resist pattern 16 is formed by lift-off as shown in FIG. The resist pattern 16 is removed and etching is performed using the metal film 17 as a mask to form the groove 11 as shown in FIG. 6(h).

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

半導体レーザ間を電気的に分離するための上述した従来
の溝形成方法は、溝11形成前にウニ/’%10′の研
磨を行い、ウェハ10′が100μm程度になった状態
でフ第1・リソグラフィ工程等を進めるため、割れやす
く取り扱いには非常に注意を要した。
In the conventional groove forming method described above for electrically isolating the semiconductor lasers, the wafer 10' is polished before forming the groove 11, and when the wafer 10' has a thickness of about 100 μm, the first groove is formed.・Due to the lithography process, etc., it was easily broken and had to be handled with great care.

この発明は、ウェハの取り扱いが容易で工程の少ない、
半導体レーザ間を電気的に分離するための溝形成方法に
関する半導体レーザの製造方法を提供するものである。
This invention allows for easy handling of wafers and fewer steps.
The present invention provides a method for manufacturing a semiconductor laser, which involves a method for forming a groove for electrically isolating semiconductor lasers.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係る半導体レーザの製造方法は、半導体レー
ザ間にエツチングにより電気的分離用の溝を形成し、次
いで研磨した後、ウエノ1の全面に金属の蒸着を行って
前記溝により分離された電極を形成するものである。
The method for manufacturing a semiconductor laser according to the present invention includes forming grooves for electrical isolation between the semiconductor lasers by etching, then polishing, and then vapor-depositing metal on the entire surface of the wafer 1 to form electrodes separated by the grooves. It forms the

〔作用〕[Effect]

この発明によれば、半導体レーザ間を電気的に分離する
ためのエツチング溝形成工程が非常に容易となる。
According to this invention, the process of forming etching grooves for electrically isolating semiconductor lasers is greatly facilitated.

〔実施例〕〔Example〕

第1図(a)〜(g)はこの発明の一実施例を説明する
ための工程図である。まず、第1図(a)のように電極
形成前のウェハ10′にプラズマCVD法を用いてSi
Nx膜21を形成する。次いでこの5iNxl121上
にレジスト膜22を形成1/ 、次いでフォトリソグラ
フィ工程でレジストパターン22Aを形成しく第1図(
b))、このレジストパターン22Aをマスクにして緩
衝フッ酸等にてSiNx膜21をパターニングし、Si
Nx膜パターン21Aを形成する〔第1図(C)〕。次
にS iNx膜パターン21Aをマスクにして、ブロム
メタノール等でエツチングし、溝23を形成し、その後
SiNx膜パターン21Aを全て除去し〔第1図(d)
)、ウェハ10′を約100μmまで研磨する。次にこ
の研磨したウェハ10′の両面にAuGeNiまたはA
uZn等の電極材料24を蒸着し〔第1図(e)]、加
熱して合金化し〔第1図(f)]、その上にAu′IF
II料を蒸着して負電極7.正電極8を形成する〔第1
図(g))。
FIGS. 1(a) to 1(g) are process diagrams for explaining one embodiment of the present invention. First, as shown in FIG. 1(a), Si is deposited on the wafer 10' before electrode formation using the plasma CVD method.
An Nx film 21 is formed. Next, a resist film 22 is formed on this 5iNxl 121, and then a resist pattern 22A is formed in a photolithography process (see FIG. 1).
b)) Using this resist pattern 22A as a mask, the SiNx film 21 is patterned using buffered hydrofluoric acid, etc.
An Nx film pattern 21A is formed [FIG. 1(C)]. Next, using the SiNx film pattern 21A as a mask, etching is performed with bromethanol or the like to form a groove 23, and then the entire SiNx film pattern 21A is removed [FIG. 1(d)].
), the wafer 10' is polished to about 100 μm. Next, AuGeNi or A
An electrode material 24 such as uZn is deposited [FIG. 1(e)], heated and alloyed [FIG. 1(f)], and Au'IF is deposited on top of it.
7. Deposit II material to form negative electrode. Forming the positive electrode 8 [first
Figure (g)).

上記の製造方法によると、溝23の形状が鳩尾状であり
、溝幅が表面から溝内部にかけて広がるため、この広が
った部分には、蒸着時に陰となり電極用金属が蒸着がさ
れていないので、半導体レーザ間が電気的に分離できる
。そのためアレイ状の状態においても物理的に個々の半
導体レーザに分離した場合と同様の電流−電圧特性が得
られる。
According to the above manufacturing method, the groove 23 has a dovetail shape, and the width of the groove widens from the surface to the inside of the groove. This widened part becomes a shadow during vapor deposition, and no electrode metal is vapor-deposited. Semiconductor lasers can be electrically isolated. Therefore, even in the array state, the same current-voltage characteristics as in the case of physically separating the semiconductor lasers into individual semiconductor lasers can be obtained.

第2図は半導体レーザの電流(mA)−電圧(V)特性
図であり、この発明ではアレー状にして測定した場合で
ある。一方、個々の半導体レーザに物理的に分離して測
定した場合も全く同様であった。
FIG. 2 is a current (mA)-voltage (V) characteristic diagram of a semiconductor laser, which is measured in an array in the present invention. On the other hand, the results were exactly the same when the semiconductor lasers were physically separated and measured.

第3図は電流(lrIA)−光出力(m W )特性図
で、この場合もこの発明により作成したウエノ)をアレ
ー状にして測定した場合と、個々の半導体レーザに物理
的に分離して測定した場合とは全く同じ特性を示した。
Figure 3 is a current (lrIA) vs. optical output (mW) characteristic diagram, showing two cases in which the Ueno fabricated according to the present invention was measured in an array and one in which it was measured physically separated into individual semiconductor lasers. It showed exactly the same characteristics as the measured case.

上記第2図、第3図の結果から、この発明の製造方法に
より、アレー状態での半導体レーザ間は電気的に分離さ
れていることが確認された。
From the results shown in FIGS. 2 and 3 above, it was confirmed that the semiconductor lasers in the array state were electrically isolated by the manufacturing method of the present invention.

なお、上記実施例においては、溝23の形状が鳩尾状の
場合について述べたが、この発明はこの形状に限定され
るものではなく、溝23の一部分に蒸着されない形状で
あればよい。また、蒸着時にウェハ10′を傾けるなど
して、溝23の一部分に蒸着されないようにすることも
可能である。
In the above embodiment, the groove 23 has a dovetail shape, but the present invention is not limited to this shape, and any shape may be used as long as the groove 23 is not deposited on a portion of the groove 23. It is also possible to prevent the wafer 10' from being deposited on a portion of the groove 23 by tilting the wafer 10' during the deposition.

〔発明の効果〕〔Effect of the invention〕

この発明は以上説明したとおり、ウェハ1iFF磨前に
あらかじめエツチングにより電気的分離のための溝を形
成し、その後、蒸着によって電極を形成するので、溝に
よって電極が分離され、半導体レーザ間の絶縁が保たれ
る。そして、溝の作製工程中はウェハの厚さは研磨前の
厚い状態であるため、取り扱いが容易である利点を有す
る。
As explained above, in this invention, grooves for electrical isolation are formed in advance by etching before polishing the wafer 1iFF, and then electrodes are formed by vapor deposition. Therefore, the electrodes are separated by the grooves, and the insulation between the semiconductor lasers is improved. It is maintained. Since the wafer is thick during the groove manufacturing process before polishing, it has the advantage of being easy to handle.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例の各工程における半導体レ
ーザの断面略図、第2図、第3図はこの発明の詳細な説
明するための半導体レーザの電流−電圧特性図ならびに
電流−光出力特性図、第4回は半導体レーザが多数形成
された従来のウェハの斜視図、第5図は従来のアレー状
態の半導体レーザの一例を示す斜視図、第6図は従来の
ウェハの電気的分離用の溝の形成方法を示す各工程にお
ける半導体レーザの断面略図である。 図中、1はp −I n P基板、2はp −I n 
Pバラ1フ”層、3はp −1n G a A s P
活性層、4はn −1n Pクラッド層、5はn −1
n P電流阻止層、6はp−InPt4流阻止層、7は
負電極、8は正電極、10′はウェハ、11は溝、21
Aは5iNxllljパターン、22Aはレジストパタ
ーン、23は溝、24は電極材料である。 第1図 第2図 □電流(mA) 第3図 □を流(mA) 第 図 第 図 第 図
FIG. 1 is a schematic cross-sectional view of a semiconductor laser at each step in an embodiment of the present invention, and FIGS. 2 and 3 are current-voltage characteristic diagrams and current-light output of the semiconductor laser for detailed explanation of the present invention. Characteristic diagram, Part 4 is a perspective view of a conventional wafer on which a large number of semiconductor lasers are formed, Figure 5 is a perspective view showing an example of a conventional semiconductor laser in an array state, and Figure 6 is electrical isolation of a conventional wafer. 3 is a schematic cross-sectional view of a semiconductor laser in each step showing a method for forming a groove for use in the semiconductor laser; FIG. In the figure, 1 is a p-I n P substrate, 2 is a p-I n P substrate, and 2 is a p-I n P substrate.
P rose 1" layer, 3 is p -1n Ga A s P
Active layer, 4 is n −1n P cladding layer, 5 is n −1
nP current blocking layer, 6 p-InPt4 flow blocking layer, 7 negative electrode, 8 positive electrode, 10' wafer, 11 groove, 21
A is a 5iNxllllj pattern, 22A is a resist pattern, 23 is a groove, and 24 is an electrode material. Figure 1 Figure 2 □ Current (mA) Figure 3 Flow through □ (mA) Figure Figure Figure

Claims (1)

【特許請求の範囲】[Claims] 多数の半導体レーザがつくり込まれた半導体ウェハにお
いて、電極形成前に半導体レーザにエッチングにより溝
を形成し、次にウェハを所定の厚みに研磨した後、ウェ
ハの全面に金属を蒸着し、前記溝により半導体レーザ間
が電気的に分離された電極を形成することを特徴とする
半導体レーザの製造方法。
In a semiconductor wafer on which a large number of semiconductor lasers have been fabricated, grooves are formed in the semiconductor lasers by etching before forming electrodes, and then the wafer is polished to a predetermined thickness, metal is vapor-deposited over the entire surface of the wafer, and the grooves are etched into the semiconductor lasers. 1. A method of manufacturing a semiconductor laser, comprising forming electrodes that electrically separate semiconductor lasers.
JP3495689A 1989-02-16 1989-02-16 Manufacture of semiconductor laser Pending JPH02215176A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3495689A JPH02215176A (en) 1989-02-16 1989-02-16 Manufacture of semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3495689A JPH02215176A (en) 1989-02-16 1989-02-16 Manufacture of semiconductor laser

Publications (1)

Publication Number Publication Date
JPH02215176A true JPH02215176A (en) 1990-08-28

Family

ID=12428607

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3495689A Pending JPH02215176A (en) 1989-02-16 1989-02-16 Manufacture of semiconductor laser

Country Status (1)

Country Link
JP (1) JPH02215176A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629618A (en) * 1992-07-10 1994-02-04 Sumitomo Electric Ind Ltd Multi-beam semiconductor laser and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0629618A (en) * 1992-07-10 1994-02-04 Sumitomo Electric Ind Ltd Multi-beam semiconductor laser and manufacturing method thereof

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