JPH0221602B2 - - Google Patents
Info
- Publication number
- JPH0221602B2 JPH0221602B2 JP57046353A JP4635382A JPH0221602B2 JP H0221602 B2 JPH0221602 B2 JP H0221602B2 JP 57046353 A JP57046353 A JP 57046353A JP 4635382 A JP4635382 A JP 4635382A JP H0221602 B2 JPH0221602 B2 JP H0221602B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- load
- resistor
- power supply
- semiconductor switching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/12—Regulating voltage or current wherein the variable actually regulated by the final control device is AC
- G05F1/40—Regulating voltage or current wherein the variable actually regulated by the final control device is AC using discharge tubes or semiconductor devices as final control devices
- G05F1/44—Regulating voltage or current wherein the variable actually regulated by the final control device is AC using discharge tubes or semiconductor devices as final control devices semiconductor devices only
- G05F1/45—Regulating voltage or current wherein the variable actually regulated by the final control device is AC using discharge tubes or semiconductor devices as final control devices semiconductor devices only being controlled rectifiers in series with the load
- G05F1/455—Regulating voltage or current wherein the variable actually regulated by the final control device is AC using discharge tubes or semiconductor devices as final control devices semiconductor devices only being controlled rectifiers in series with the load with phase control
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は交流定電圧電源装置に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an AC constant voltage power supply device.
一般に交流定電圧電源装置は種々の分野に用い
られている。例えば電子写真複写機においては、
感光体の高感度化の研究が進められる一方それに
応じて露光用光源の発光出力の安定化が求められ
るようになつてきており、この分野においても精
度の高い交流定電圧電源装置が必要とされてい
る。
Generally, AC constant voltage power supplies are used in various fields. For example, in an electrophotographic copying machine,
While research is progressing on increasing the sensitivity of photoreceptors, there is a growing need for stabilization of the light output of exposure light sources, and a highly accurate AC constant voltage power supply is required in this field as well. ing.
このような要請から従来例えば第1図に示す構
成の交流定電圧電源装置が知られている。即ち、
交流電源1に双方向性半導体スイツチング素子で
ある双方向性サイリスタ2を介して例えば原稿露
光用ハロゲン白熱電球などの負荷3を接続する。
そして交流電源1には電源トランス111を介し
て全波整流器4を接続し、この全波整流器4の正
側出力端子aと負側出力端子bとの間に抵抗5及
び定電圧ダイオード6の直列回路を接続する。そ
して前記定電圧ダイオード6の両端には、双方向
性サイリスタ2の導通位相を制御する制御回路7
を接続する。この制御回路7は、前記定電圧ダイ
オード6の両端に、トランジスタ8とコンデンサ
9の直列回路及び抵抗10と抵抗11の直列回路
をそれぞれ接続し、このコンデンサ9の両端に
PUT(プログラマブル ユニジヤンクシヨン ト
ランジスタ)12とパルストランス13の一次側
コイルの直列回路を接続し、このPUT12のゲ
ートを前記抵抗10と抵抗11の接続点に接続す
ると共にPUT12のノードを抵抗121を介し
て前記全波整流器4の正側出力端子aに接続して
構成され、コンデンサ9の両端電圧が抵抗10及
び抵抗11により定まるPUT12のゲート電圧
を越える度毎にPUT12が導通し、パルストラ
ンス13を介して前記双方向性サイリスタ2のゲ
ートにトリガパルスを与えるようにしている。 In response to such demands, an AC constant voltage power supply device having the configuration shown in FIG. 1, for example, has been known. That is,
A load 3, such as a halogen incandescent light bulb for exposing an original, is connected to an AC power source 1 via a bidirectional thyristor 2, which is a bidirectional semiconductor switching element.
A full-wave rectifier 4 is connected to the AC power supply 1 via a power transformer 111, and a resistor 5 and a constant voltage diode 6 are connected in series between the positive output terminal a and the negative output terminal b of the full-wave rectifier 4. Connect the circuit. A control circuit 7 for controlling the conduction phase of the bidirectional thyristor 2 is connected to both ends of the constant voltage diode 6.
Connect. This control circuit 7 has a series circuit of a transistor 8 and a capacitor 9 and a series circuit of a resistor 10 and a resistor 11 connected to both ends of the voltage regulator diode 6, respectively.
A series circuit of a PUT (programmable union transistor) 12 and the primary coil of a pulse transformer 13 is connected, and the gate of this PUT 12 is connected to the connection point of the resistor 10 and the resistor 11, and the node of the PUT 12 is connected through a resistor 121. is connected to the positive side output terminal a of the full-wave rectifier 4, and each time the voltage across the capacitor 9 exceeds the gate voltage of the PUT 12 determined by the resistor 10 and the resistor 11, the PUT 12 becomes conductive and the pulse transformer 13 is A trigger pulse is applied to the gate of the bidirectional thyristor 2 through the bidirectional thyristor 2.
一方前記負荷3には負荷電圧検出回路14を接
続する。この負荷電圧検出回路14は、前記負荷
3に並列に負荷電圧検出トランス15の一次側コ
イルを接続し、この負荷電圧検出トランス15の
二次側コイルの両端に全波整流器16の入力端子
を接続し、この全波整流器16の正側出力端子c
と負側出力端子dとの間に抵抗17及び抵抗18
の直列回路を接続すると共に負側出力端子dを前
記全波整流器4の負側出力端子bに接続し、抵抗
18の両端にコンデンサ19を接続し、このコン
デンサ19の両端に抵抗20及びコンデンサ21
の直列回路を接続して構成され、コンデンサ21
の両端に負荷3の両端電圧に対応する検出電圧を
発生するようにしている。 On the other hand, a load voltage detection circuit 14 is connected to the load 3. This load voltage detection circuit 14 connects the primary coil of a load voltage detection transformer 15 in parallel to the load 3, and connects the input terminals of a full-wave rectifier 16 to both ends of the secondary coil of the load voltage detection transformer 15. The positive output terminal c of this full-wave rectifier 16
A resistor 17 and a resistor 18 are connected between the
A series circuit is connected, and the negative output terminal d is connected to the negative output terminal b of the full-wave rectifier 4. A capacitor 19 is connected to both ends of the resistor 18, and a resistor 20 and a capacitor 21 are connected to both ends of the capacitor 19.
The capacitor 21 is configured by connecting a series circuit of
A detection voltage corresponding to the voltage across the load 3 is generated across the terminal.
そして前記抵抗20と前記コンデンサ21の接
続点eと前記全波整流器16の負側出力端子dと
の間に誤差増幅器22を接続する。この誤差増幅
器22は、前記抵抗20と前記コンデンサ21の
接続点eに抵抗23を介して一方のトランジスタ
24のベースを接続し、このトランジスタ24の
エミツタを他方のトランジスタ25のエミツタに
接続し、これらのエミツタを抵抗26を介して前
記全波整流器16の負側出力端子dに接続すると
共にこの負側出力端子dに起動用直流電源27の
負側端子を接続し、前記トランンジスタ24のコ
レクタを抵抗28を介して前記起動用直流電源2
7の正側端子に接続し、前記トランンジスタ24
のベースを抵抗29及びコンデンサ30を介して
当該トランンジスタ24のコレクタに接続し、前
記トランンジスタ25のコレクタを前記起動用直
流電源27の正側端子に接続し、トランンジスタ
25のベースを前記起動用直流電源27の両端子
間に接続されたポテンシヨメータ31の可動子に
接続し、前記トランンジスタ24のコレクタを抵
抗32を介して前記トランンジスタ8のベースに
接続し、前記起動用直流電源27の負側端子を前
記コンデンサ9とパルストランス13の接続点に
接続して構成され、ポテンシヨメータ31による
トランジスタ25のベース電圧を基準電圧とし、
この基準電圧と前記コンデンサ21の両端に発生
する検出電圧に対応するトランンジスタ24のベ
ース電圧とを比較し、この差に応じてトランンジ
スタ24のコレクタ即ちQ点に発生する誤差出力
を抵抗32を介して前記トランンジスタ8のベー
スに加えるようにしている。 An error amplifier 22 is connected between the connection point e between the resistor 20 and the capacitor 21 and the negative output terminal d of the full-wave rectifier 16. This error amplifier 22 connects the base of one transistor 24 to the connection point e between the resistor 20 and the capacitor 21 via a resistor 23, and connects the emitter of this transistor 24 to the emitter of the other transistor 25. The emitter of the transistor 24 is connected to the negative output terminal d of the full-wave rectifier 16 through the resistor 26, and the negative terminal of the starting DC power supply 27 is connected to the negative output terminal d, and the collector of the transistor 24 is connected to the negative output terminal d of the full-wave rectifier 16. The starting DC power supply 2 is connected to the starting DC power supply 2 via a resistor 28.
7 to the positive side terminal of the transistor 24.
The base of the transistor 25 is connected to the collector of the transistor 24 via the resistor 29 and the capacitor 30, and the collector of the transistor 25 is connected to the positive terminal of the startup DC power source 27, and the base of the transistor 25 is connected to the collector of the transistor 24 through the resistor 29 and the capacitor 30. The collector of the transistor 24 is connected to the base of the transistor 8 via a resistor 32. The negative terminal of the transistor 27 is connected to the connection point between the capacitor 9 and the pulse transformer 13, and the base voltage of the transistor 25 by the potentiometer 31 is used as a reference voltage.
This reference voltage is compared with the base voltage of the transistor 24 corresponding to the detection voltage generated across the capacitor 21, and the error output generated at the collector of the transistor 24, that is, at the Q point, is connected to the resistor 32 according to the difference. It is added to the base of the transistor 8 through the base of the transistor 8.
このような構成によつて、誤差増幅器22の誤
差出力により制御回路7におけるトランジスタ8
のベース電圧をコントロールし、コンデンサ9の
両端電圧のdv/dtを制御することにより、双方向
性サイリスタ2のゲートへのトリガパルスの発生
位相を制御して負荷3の両端電圧を定電圧化する
ようにしている。尚図中、33はノイズフイルタ
用コンデンサ、34及び35はノイズフイルタを
構成するコンデンサ及びインダクタ、36及び3
7はサージ吸収回路を構成するコンデンサ及び抵
抗である。 With such a configuration, the error output of the error amplifier 22 causes the transistor 8 in the control circuit 7 to
By controlling the base voltage of the capacitor 9 and controlling the dv/dt of the voltage across the capacitor 9, the generation phase of the trigger pulse to the gate of the bidirectional thyristor 2 is controlled, and the voltage across the load 3 is made constant. That's what I do. In the figure, 33 is a noise filter capacitor, 34 and 35 are capacitors and inductors that constitute the noise filter, and 36 and 3 are capacitors.
7 is a capacitor and a resistor that constitute a surge absorption circuit.
しかしながら斯かる構成によれば、電源トラン
ス111及び負荷3の負荷電圧の検出に負荷電圧
検出トランス15を用いているため、装置全体が
大型で大重量となる上、トランスは高価であり、
製造コストが大きくなる欠点がある。
However, according to such a configuration, since the load voltage detection transformer 15 is used to detect the load voltage of the power transformer 111 and the load 3, the entire device becomes large and heavy, and the transformer is expensive.
The disadvantage is that the manufacturing cost is high.
本発明者は以上の如き事情に基づき鋭意研究を
重ねた結果双方向性半導体スイツチング素子と負
荷の接続点と、電源に接続される全波整流器の出
力端子との間に、逆阻止3端子サイリスタと抵抗
の直列回路を介挿し、この逆阻止3端子サイリス
タを位相制御装置と同期して導通せしめることに
より負荷の両端電圧を検出できることを見出し、
本発明を完成するに至つた。 Based on the above-mentioned circumstances, the inventor of the present invention has conducted extensive research, and as a result, a reverse-blocking three-terminal thyristor is installed between the connection point between the bidirectional semiconductor switching element and the load, and the output terminal of the full-wave rectifier connected to the power supply. discovered that the voltage across the load could be detected by inserting a series circuit consisting of a resistor and a reverse blocking three-terminal thyristor and making it conductive in synchronization with a phase control device.
The present invention has now been completed.
本発明は、負荷の両端電圧をトランスを用いず
に検出することができる上、電源トランスが不要
であり、しかも負荷の両端電圧を確実に一定化す
ることができる小型軽量で製造コストの低い交流
定電圧電源装置を提供することを目的とする。 The present invention is a compact, lightweight, low-cost AC that can detect the voltage across the load without using a transformer, does not require a power transformer, and can reliably keep the voltage across the load constant. The purpose is to provide a constant voltage power supply device.
本発明の特徴とするところは、交流電源と、こ
の交流電源より給電される負荷と、この負荷と前
記交流電源との間に介挿された双方向性半導体ス
イツチング素子と、その入力端子が前記交流電源
に接続された全波整流器と、この全波整流器の出
力端子間に接続された、前記双方向性半導体スイ
ツチング素子の導通位相を制御する制御回路と、
前記負荷と前記双方向性半導体スイツチング素子
の接続点と前記全波整流器の出力端子との間に介
挿された、半導体スイツチング素子及び負荷電圧
検出用抵抗の直列回路を具えて成る負荷電圧検出
回路と、前記負荷電圧検出用抵抗において得られ
る検出電圧を受けこの検出電圧と予め設定される
基準電圧との差に応じた誤差出力を発生する誤差
増幅器とを具えて成り、前記制御回路は、前記誤
差増幅器よりの誤差出力により、前記双方向性半
導体スイツチング素子及び前記半導体スイツチン
グ素子の導通位相を同期して制御する点にある。
The present invention is characterized by an AC power supply, a load supplied with power from the AC power supply, a bidirectional semiconductor switching element inserted between the load and the AC power supply, and an input terminal of the bidirectional semiconductor switching element inserted between the load and the AC power supply. a full-wave rectifier connected to an AC power source; and a control circuit that controls the conduction phase of the bidirectional semiconductor switching element connected between the output terminals of the full-wave rectifier;
a load voltage detection circuit comprising a series circuit of a semiconductor switching element and a load voltage detection resistor, interposed between a connection point between the load and the bidirectional semiconductor switching element and an output terminal of the full-wave rectifier; and an error amplifier that receives a detection voltage obtained at the load voltage detection resistor and generates an error output according to the difference between this detection voltage and a preset reference voltage, and the control circuit includes: The point is that the conduction phases of the bidirectional semiconductor switching element and the semiconductor switching element are synchronously controlled by the error output from the error amplifier.
以下本発明の一実施例を図面によつて説明す
る。
An embodiment of the present invention will be described below with reference to the drawings.
本発明の一実施例の回路図を第2図に示す。第
1図と同一部分には同符号を付して示してある。
この例においては交流電源1に双方向性半導体ス
イツチング素子例えば双方向性サイリスタ2を介
して例えば原稿露光用ハロゲン白熱電球などの負
荷3を接続し、そして交流電源1には、電源トラ
ンスを用いずに、例えば4個のダイオードD1,
D2,D3,D4より成る全波整流器4の入力端
子を接続し、この全波整流器4の正側出力端子a
と負荷出力端子bとの間に抵抗5及び定電圧ダイ
オード6の直列回路を接続し、この定電圧ダイオ
ード6の両端にはダイオード41とコンデンサ4
2の直列回路及び双方向性サイリスタ2の導通位
相を制御する制御回路7を接続する。 A circuit diagram of an embodiment of the present invention is shown in FIG. Components that are the same as those in FIG. 1 are designated by the same reference numerals.
In this example, a load 3 such as a halogen incandescent light bulb for exposing originals is connected to the AC power source 1 via a bidirectional semiconductor switching element, such as a bidirectional thyristor 2, and the AC power source 1 does not use a power transformer. For example, four diodes D1,
Connect the input terminals of a full-wave rectifier 4 consisting of D2, D3, and D4, and connect the positive output terminal a of this full-wave rectifier 4.
A series circuit of a resistor 5 and a constant voltage diode 6 is connected between the output terminal b and the load output terminal b, and a diode 41 and a capacitor 4 are connected across the constant voltage diode 6.
A control circuit 7 for controlling the conduction phase of the bidirectional thyristor 2 and the bidirectional thyristor 2 is connected.
この制御回路7は、前記定電圧ダイオード6の
両端に、抵抗43、トランジスタ8、コンデンサ
9の直列回路及び抵抗10、ダイオード44、抵
抗11の直列回路をそれぞれ接続し、コンデンサ
9の両端にPUT12とパルストランス13の一
次側コイルの直列回路を接続し、このPUT12
のゲートをダイオード44と抵抗11の接続点に
接続すると共にPUT12のアノードを抵抗12
1を介して前記全波整流器4の正側出力端子aに
接続し、トランジスタ8のベースをダイオード4
5を介して抵抗10とダイオード44の接続点に
接続して構成する。 This control circuit 7 has a series circuit of a resistor 43, a transistor 8, and a capacitor 9 connected to both ends of the constant voltage diode 6, and a series circuit of a resistor 10, a diode 44, and a resistor 11, and a PUT 12 connected to both ends of the capacitor 9. Connect the series circuit of the primary coil of the pulse transformer 13, and connect this PUT12
The gate of PUT12 is connected to the connection point of diode 44 and resistor 11, and the anode of PUT12 is connected to resistor 12.
1 to the positive output terminal a of the full-wave rectifier 4, and the base of the transistor 8 is connected to the diode 4.
5 to the connection point between the resistor 10 and the diode 44.
一方前記双方向性サイリスタ2と前記負荷3の
接続点fと、前記全波整流器4の例えば負側出力
端子bとの間には、抵抗46、半導体スイツチン
グ素子例えば逆阻止3端子サイリスタ47、負荷
電圧検出用抵抗48の直列回路を介挿し、この抵
抗48の両端にはダイオード49と抵抗50の直
列回路を接続し、この抵抗50の両端には抵抗5
1とコンデンサ52の直列回路を接続し、このコ
ンデンサ52の両端には抵抗53とコンデンサ5
4の直列回路を接続し、逆阻止3端子サイリスタ
47のゲートを抵抗55、ダイオード56を介し
て、前記PUT12とパルストランス13の一次
側コイルとの接続点に接続し、逆阻止3端子サイ
リスタ47のゲートとカソードとの間に抵抗57
を接続して負荷電圧検出回路14を構成する。 On the other hand, between the connection point f of the bidirectional thyristor 2 and the load 3 and, for example, the negative output terminal b of the full-wave rectifier 4, there is a resistor 46, a semiconductor switching element, for example, a reverse blocking three-terminal thyristor 47, and a load. A series circuit of a voltage detection resistor 48 is inserted, a series circuit of a diode 49 and a resistor 50 is connected to both ends of this resistor 48, and a resistor 5 is connected to both ends of this resistor 50.
A series circuit of 1 and a capacitor 52 is connected, and a resistor 53 and a capacitor 5 are connected across the capacitor 52.
4 are connected in series, and the gate of the reverse blocking 3-terminal thyristor 47 is connected to the connection point between the PUT 12 and the primary coil of the pulse transformer 13 via a resistor 55 and a diode 56. A resistor 57 is connected between the gate and cathode of
The load voltage detection circuit 14 is configured by connecting the two.
そして前記抵抗53と前記コンデンサ54の接
続点gと前記全波整流器4の負側出力端子bとの
間に誤差増幅器22を接続する。この誤差増幅器
22は、前記抵抗53と前記コンデンサ54の接
続点gに抵抗23を介して一方のトランジスタ2
4のベースを接続し、このトランジスタ24のエ
ミツタを他方のトランジスタ25のエミツタに接
続し、これらのエミツタを抵抗26を介して前記
全波整流器4の負側出力端子bに接続し、トラン
ジスタ24のコレクタを抵抗28を介して前記ダ
イオード41と前記コンデンサ42の接続点に接
続し、トランジスタ25のコレクタを抵抗58を
介して前記ダイオード41と前記コンデンサ42
の接続点に接続し、コンデンサ42の両端には抵
抗59、ポテンシヨメータ31、抵抗60の直列
回路を接続し、トランジスタ25のベースをポテ
ンシヨメータ31の可動子に接続し、トランジス
タ24のコレクタを抵抗32を介して前記トラン
ジスタ8のベースに接続して構成する。尚図中、
100はソフトスタート回路を示し、101,1
02,103は抵抗、104はフオトカプラー、
105はトランジスタ、106はダイオード、1
07はコンデンサである。 An error amplifier 22 is connected between the connection point g between the resistor 53 and the capacitor 54 and the negative output terminal b of the full-wave rectifier 4. This error amplifier 22 connects one transistor 2 to a connection point g between the resistor 53 and the capacitor 54 via a resistor 23.
4, the emitter of this transistor 24 is connected to the emitter of the other transistor 25, and these emitters are connected to the negative output terminal b of the full-wave rectifier 4 through a resistor 26. The collector of the transistor 25 is connected to the connection point between the diode 41 and the capacitor 42 via a resistor 28, and the collector of the transistor 25 is connected to the connection point between the diode 41 and the capacitor 42 via a resistor 58.
A series circuit consisting of a resistor 59, a potentiometer 31, and a resistor 60 is connected to both ends of the capacitor 42, and the base of the transistor 25 is connected to the movable element of the potentiometer 31. is connected to the base of the transistor 8 via a resistor 32. In the figure,
100 indicates a soft start circuit, 101,1
02 and 103 are resistors, 104 is a photocoupler,
105 is a transistor, 106 is a diode, 1
07 is a capacitor.
上記実施例によれば、交流電源1が投入され、
この交流電源1の電圧波形が、例えば第3図に示
すように、時刻T1に零電圧から正の半サイクル
が開始されたとする(このときの電流の流れる方
向を第2図において矢印Aで示す方向とする。)
と、次に電圧が零となる時刻T2までの半サイク
ルの間に、全波整流器4を介してコンデンサ9が
充電され、このコンデンサ9の両端電圧が抵抗1
1の両端電圧より大きくなる時刻TaにPUT12
が導通し、パルストランス13によりトリガパル
スが双方向性サイリスタ2及び逆阻止3端子サイ
リスタ47の各ゲートに与えられ、この時刻Ta
で双方向性サイリスタ2と逆阻止3端子サイリス
タ47が同時に導通する。双方向性サイリスタ2
が導通すると負荷3の両端には第4図に示すよう
に交流電源1と同一波形の電圧が生ずる。一方逆
阻止3端子サイリスタ47が導通すると、交流電
源1、負荷3、抵抗46、逆阻止3端子サイリス
タ47、負荷電圧検出用抵抗48、ダイオードD
3より成る閉回路が形成されるが、同時に双方向
性サイリスタ2が導通しているため、第5図に示
すように負荷電圧検出用抵抗48の両端電圧は実
質的に零である。 According to the above embodiment, when the AC power supply 1 is turned on,
Assume that the voltage waveform of this AC power source 1 starts a positive half cycle from zero voltage at time T1, as shown in FIG. 3 (the direction in which the current flows at this time is indicated by arrow A in FIG. direction).
Then, during the half cycle up to time T2 when the voltage becomes zero, the capacitor 9 is charged via the full-wave rectifier 4, and the voltage across the capacitor 9 reaches the resistor 1.
PUT12 at time Ta when the voltage across both ends of
conducts, the pulse transformer 13 applies a trigger pulse to each gate of the bidirectional thyristor 2 and the reverse blocking three-terminal thyristor 47, and at this time Ta
At this point, the bidirectional thyristor 2 and the reverse blocking three-terminal thyristor 47 become conductive at the same time. bidirectional thyristor 2
When conductive, a voltage having the same waveform as the AC power supply 1 is generated across the load 3 as shown in FIG. On the other hand, when the reverse blocking 3-terminal thyristor 47 conducts, the AC power supply 1, load 3, resistor 46, reverse blocking 3-terminal thyristor 47, load voltage detection resistor 48, diode D
At the same time, since the bidirectional thyristor 2 is conductive, the voltage across the load voltage detection resistor 48 is substantially zero, as shown in FIG.
次いで、時刻T2からは交流電源1の電圧波形
は第3図に示すように極性が反転し負の半サイク
ルが開始され(このとき電流の流れる方向は第2
図において矢印Bで示す方向となる。)、次に電圧
が零となる時刻T3までの半サイクルの間に、放
電後のコンデンサ9が再び全波整流器4を介して
充電され、このコンデンサ9の両端電圧が抵抗1
1の両端電圧より大きくなる時刻TbにPUT12
が導通し、パルストランス13によりトリガパル
スが双方向性サイリスタ2及び逆阻止3端子サイ
リスタ47の各ゲートに与えられ、この時刻Tb
で双方向性サイリスタ2と逆阻止3端子サイリス
タ47が同時に導通する。双方向性サイリスタ2
が導通すると負荷3の両端には第4図に示すよう
に交流流電源1と同一波形の電圧が生ずる。一方
逆阻止3端子サイリスタ47が導通すると、抵抗
46、逆阻止3端子サイリスタ47、負荷電圧検
出用抵抗48、ダイオードD1の直列回路が負荷
3に並列に接続された閉回路となり、負荷電圧検
出用抵抗48の両端には、第5図に示すように抵
抗46とにより定まる負荷3の両端電圧に対応し
た電圧が生ずる。従つて時刻T2から時刻T3ま
での半サイクルにおいては、負荷電圧検出用抵抗
48の両端電圧を検出電圧としこの検出電圧に応
じて定まる電圧が誤差増幅器22のトランジスタ
24のベースに加えられ、予め設定されるポテン
シヨメータ31によるトランジスタ25のベース
電圧を基準電圧とし、この基準電圧とトランジス
タ24のベース電圧との差に応じてトランジスタ
24のコレクタ即ちQ点に誤差出力が発生し、こ
の誤差出力が抵抗32を介してトランジスタ8の
ベースに加えられ、この誤差出力に応じた適正な
位相でPUT12が導通され、これにより次の半
サイクル即ち第3図に示すように時刻T3から時
刻T4までの半サイクルの間における双方向性サ
イリスタ2の導通位相即ち導通時刻Tcの時期が
制御され、この結果負荷3の両端電圧が設定され
た基準電圧に対応した一定の電圧となるよう制御
される。 Next, from time T2, the polarity of the voltage waveform of the AC power source 1 is reversed as shown in FIG. 3, and a negative half cycle is started (at this time, the direction of current flow is the second
The direction is indicated by arrow B in the figure. ), then during the half cycle until time T3 when the voltage becomes zero, the discharged capacitor 9 is charged again via the full-wave rectifier 4, and the voltage across this capacitor 9 is changed to the resistor 1.
PUT12 at time Tb when the voltage at both ends becomes greater than 1.
conducts, the pulse transformer 13 gives a trigger pulse to each gate of the bidirectional thyristor 2 and the reverse blocking three-terminal thyristor 47, and at this time Tb
At this point, the bidirectional thyristor 2 and the reverse blocking three-terminal thyristor 47 become conductive at the same time. bidirectional thyristor 2
When conductive, a voltage having the same waveform as that of the AC power source 1 is generated across the load 3, as shown in FIG. On the other hand, when the reverse blocking 3-terminal thyristor 47 becomes conductive, the series circuit of the resistor 46, the reverse blocking 3-terminal thyristor 47, the load voltage detection resistor 48, and the diode D1 becomes a closed circuit connected in parallel to the load 3. A voltage corresponding to the voltage across the load 3 determined by the resistor 46 is generated across the resistor 48, as shown in FIG. Therefore, in the half cycle from time T2 to time T3, the voltage across the load voltage detection resistor 48 is used as the detection voltage, and a voltage determined according to this detection voltage is applied to the base of the transistor 24 of the error amplifier 22, and the preset voltage is applied to the base of the transistor 24 of the error amplifier 22. The base voltage of the transistor 25 obtained by the potentiometer 31 is used as a reference voltage, and an error output is generated at the collector of the transistor 24, that is, at the Q point, according to the difference between this reference voltage and the base voltage of the transistor 24. This error output is applied to the base of transistor 8 through resistor 32, and PUT 12 is turned on with the proper phase according to this error output, thereby causing the next half cycle, that is, the half from time T3 to time T4 as shown in FIG. The conduction phase of the bidirectional thyristor 2 during the cycle, that is, the timing of the conduction time Tc, is controlled, and as a result, the voltage across the load 3 is controlled to be a constant voltage corresponding to the set reference voltage.
以上交流電源1の1サイクルの間に限つて説明
したが、上述の作用は交流電源1のすべてのサイ
クルにおいて得られるものであり、従つて交流電
源1の電圧変動があつても負荷3の両端電圧を設
定された基準電圧に対応した一定の電圧に保つこ
とができる。 Although the above explanation was limited to one cycle of the AC power supply 1, the above-mentioned effect can be obtained in all cycles of the AC power supply 1, and therefore, even if there is a voltage fluctuation of the AC power supply 1, the voltage at both ends of the load 3 is The voltage can be maintained at a constant voltage corresponding to the set reference voltage.
このように上記実施例によれば、抵抗46、逆
阻止3端子サイリスタ47、負荷電圧検出用抵抗
48の直列回路を、負荷3と双方向性サイリスタ
2の接続点と交流電源1にその入力端子が接続さ
れた全波整流器4の出力端子との間に介挿し、逆
阻止3端子サイリスタ47を双方向性サイリスタ
2と同期して導通せしめるため、交流電源の一サ
イクル毎に当該直列回路が全波整流器を介して負
荷3に並列に接続された閉回路が形成されること
となり、負荷電圧検出用抵抗48の両端に負荷3
の両端電圧に直接対応した電圧が発生するのでこ
の電圧を検出電圧として用いることにより、トラ
ンスを用いることなく負荷3の両端電圧を検出す
ることができる上、電源トランスが不要となり、
この結果小型軽量で製造コストの低い交流定電圧
電源装置を得ることができる。 According to the embodiment described above, a series circuit of the resistor 46, the reverse blocking three-terminal thyristor 47, and the load voltage detection resistor 48 is connected to the connection point between the load 3 and the bidirectional thyristor 2 and the input terminal of the AC power supply 1. In order to make the reverse blocking three-terminal thyristor 47 conductive in synchronization with the bidirectional thyristor 2, the series circuit is A closed circuit connected in parallel to the load 3 via the wave rectifier is formed, and the load 3 is connected to both ends of the load voltage detection resistor 48.
Since a voltage that directly corresponds to the voltage across the load 3 is generated, by using this voltage as the detection voltage, the voltage across the load 3 can be detected without using a transformer, and a power transformer is not required.
As a result, it is possible to obtain an AC constant voltage power supply device that is small, lightweight, and has low manufacturing costs.
尚ソフトスタート回路100は必要に応じて設
けられるもので負荷3の立ち上がり時におけるラ
ツシユ電流を防止するものである。 The soft start circuit 100 is provided as necessary to prevent rush current when the load 3 starts up.
以上において、誤差増幅器22、制御回路7の
構成は本実施例に限らず公知の他の構成としても
よい。また負荷荷電圧検出回路14において、負
荷電圧検出用抵抗48の両端電圧を誤差増幅器2
2に与えるための回路構成は適宜変更可能であ
る。そして半導体スイツチング素子としては逆阻
止3端子サイリスタと同様の機能を有するもので
あればよく他のものを適宜選択することも可能で
ある。抵抗46は必要に応じて設けられるもので
あつて省略してもよい。また必要に応じて逆阻止
3端子サイリスタ47に、当該逆阻止3端子サイ
リスタ47が良好に動作するよう各種のバイアス
回路、ノイズフイルターなどを付加してもよい。 In the above, the configuration of the error amplifier 22 and the control circuit 7 is not limited to this embodiment, but may be any other known configuration. In addition, in the load voltage detection circuit 14, the voltage across the load voltage detection resistor 48 is input to the error amplifier 2.
The circuit configuration for providing the signal to the signal 2 can be changed as appropriate. As the semiconductor switching element, it is sufficient that it has the same function as the reverse blocking three-terminal thyristor, and other elements may be selected as appropriate. The resistor 46 is provided as necessary and may be omitted. Further, if necessary, various bias circuits, noise filters, etc. may be added to the reverse blocking three-terminal thyristor 47 so that the reverse blocking three-terminal thyristor 47 operates satisfactorily.
本発明によれば、半導体スイツチング素子と負
荷電圧検出用抵抗の直列回路を、負荷と双方向性
半導体スイツチング素子の接続点と、交流電源に
その入力端子が接続された全波整流器の出力端子
との間に介挿し、半導体スイツチング素子を双方
向性半導体スイツチング素子と同期して導通させ
るため、交流電源の一サイクル毎に半導体スイツ
チング素子と負荷電圧検出用抵抗の直列回路が全
波整流器を介して負荷に並列に接続された閉回路
が形成されることとなり、負荷電圧検出用抵抗の
両端に負荷の両端電圧に直接対応した電圧が発生
するのでこの電圧を検出電圧として用いることに
より、トランスを用いることなく負荷の両端電圧
を検出することができる上、電源トランスが不要
となり、しかも負荷において得られる検出電圧が
誤差増幅器に加えられ、この誤差増幅器により予
め設定される基準電圧と検出電圧との差に応じた
誤差出力が制御回路に加えられ、この制御回路に
より誤差出力に応じた適正な位相で双方向性半導
体スイツチング素子を導通させるため、交流電源
の電圧変動があつてもそれにかかわらず負荷の両
端電圧を設定された基準電圧に対応した一定の電
圧に安定に維持することができ、この結果小型軽
量で製造コストの低い交流定電圧電源装置を得る
ことができる。
According to the present invention, a series circuit of a semiconductor switching element and a resistor for detecting load voltage is connected to a connection point between a load and a bidirectional semiconductor switching element, and to an output terminal of a full-wave rectifier whose input terminal is connected to an AC power source. In order to make the semiconductor switching element conductive in synchronization with the bidirectional semiconductor switching element, a series circuit of the semiconductor switching element and the load voltage detection resistor is inserted through the full-wave rectifier every cycle of the AC power supply. A closed circuit connected in parallel to the load is formed, and a voltage that directly corresponds to the voltage across the load is generated across the load voltage detection resistor. By using this voltage as the detection voltage, a transformer can be used. In addition, the voltage across the load can be detected without the need for a power transformer, and the detected voltage obtained at the load is added to an error amplifier, which calculates the difference between the reference voltage set in advance and the detected voltage. An error output corresponding to The voltage at both ends can be stably maintained at a constant voltage corresponding to the set reference voltage, and as a result, it is possible to obtain an AC constant voltage power supply device that is small, lightweight, and low in manufacturing cost.
第1図は従来の交流定電圧電源装置の一例を示
す回路図、第2図は本発明の一実施例を示す回路
図、第3図は交流電源の電圧を示す波形図、第4
図は負荷の両端電圧を示す波形図、第5図は負荷
電圧検出用抵抗の両端電圧を示す波形図である。
1…交流電源、2…双方向性サイリスタ(双方
向性半導体スイツチング素子)、3…負荷、11
1…電源トランス、4…全波整流器、7…制御回
路、8…トランジスタ、9…コンデンサ、12…
PUT、13…パルストランス、14…負荷電圧
検出回路、15…負荷電圧検出トランス、16…
全波整流器、19,21…コンデンサ、17,1
8,20…抵抗、22…誤差増幅器、24,25
…トランジスタ、27…起動用直流電源、31…
ポテンシヨメータ、D1,D2,D3,D4,4
4,45,49,56…ダイオード、47…逆阻
止3端子サイリスタ(半導体スイツチング素子)、
48…負荷電圧検出用抵抗、100…ソフトスタ
ート回路。
Fig. 1 is a circuit diagram showing an example of a conventional AC constant voltage power supply device, Fig. 2 is a circuit diagram showing an embodiment of the present invention, Fig. 3 is a waveform diagram showing the voltage of the AC power supply, and Fig. 4 is a circuit diagram showing an example of a conventional AC constant voltage power supply.
The figure is a waveform diagram showing the voltage across the load, and FIG. 5 is the waveform diagram showing the voltage across the load voltage detection resistor. DESCRIPTION OF SYMBOLS 1... AC power supply, 2... Bidirectional thyristor (bidirectional semiconductor switching element), 3... Load, 11
1...Power transformer, 4...Full-wave rectifier, 7...Control circuit, 8...Transistor, 9...Capacitor, 12...
PUT, 13...Pulse transformer, 14...Load voltage detection circuit, 15...Load voltage detection transformer, 16...
Full wave rectifier, 19, 21... Capacitor, 17, 1
8, 20...Resistor, 22...Error amplifier, 24, 25
...Transistor, 27...Starting DC power supply, 31...
Potentiometer, D1, D2, D3, D4, 4
4, 45, 49, 56... Diode, 47... Reverse blocking 3-terminal thyristor (semiconductor switching element),
48...Resistance for load voltage detection, 100...Soft start circuit.
Claims (1)
荷と、この負荷と前記交流電源との間に介挿され
た双方向性半導体スイツチング素子と、その入力
端子が前記交流電源に接続された全波整流器と、
この全波整流器の出力端子間に接続された、前記
双方向性半導体スイツチング素子の導通位相を制
御する制御回路と、前記負荷と前記双方向性半導
体スイツチング素子の接続点と前記全波整流器の
出力端子との間に介挿された、半導体スイツチン
グ素子及び負荷電圧検出用抵抗の直列回路を具え
て成る負荷電圧検出回路と、前記負荷電圧検出用
抵抗において得られる検出電圧を受けこの検出電
圧と予め設定される基準電圧との差に応じた誤差
出力を発生する誤差増幅器とを具えて成り、前記
制御回路は、前記誤差増幅器よりの誤差出力によ
り、前記双方向性半導体スイツチング素子及び前
記半導体スイツチング素子の導通位相を同期して
制御することを特徴とする交流定電圧電源装置。1. An AC power supply, a load supplied with power from this AC power supply, a bidirectional semiconductor switching element inserted between this load and the AC power supply, and a full-wave switching element whose input terminal is connected to the AC power supply. rectifier and
a control circuit for controlling the conduction phase of the bidirectional semiconductor switching device connected between the output terminals of the full-wave rectifier; a connection point between the load and the bidirectional semiconductor switching device; and an output of the full-wave rectifier; a load voltage detection circuit comprising a series circuit of a semiconductor switching element and a load voltage detection resistor inserted between the terminal and the load voltage detection circuit; and an error amplifier that generates an error output according to a difference from a set reference voltage, and the control circuit controls the bidirectional semiconductor switching element and the semiconductor switching element by the error output from the error amplifier. An AC constant voltage power supply device characterized in that the conduction phase of the two is controlled in synchronization.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4635382A JPS58165119A (en) | 1982-03-25 | 1982-03-25 | Ac constant voltage power supply device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4635382A JPS58165119A (en) | 1982-03-25 | 1982-03-25 | Ac constant voltage power supply device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58165119A JPS58165119A (en) | 1983-09-30 |
| JPH0221602B2 true JPH0221602B2 (en) | 1990-05-15 |
Family
ID=12744776
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4635382A Granted JPS58165119A (en) | 1982-03-25 | 1982-03-25 | Ac constant voltage power supply device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58165119A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0668705B2 (en) * | 1984-09-26 | 1994-08-31 | 株式会社クラベ | AC voltage stabilization circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5121157A (en) * | 1974-08-15 | 1976-02-20 | Shimadzu Corp | SAIRISUTASEIGYOANTEIKADENGENSOCHI |
-
1982
- 1982-03-25 JP JP4635382A patent/JPS58165119A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58165119A (en) | 1983-09-30 |
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