JPH0221632A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable the gettering of heavy metal ion remaining in an element region by forming a crystal defect layer in the bottom part of a trench isolation region on a semiconductor substrate surface. CONSTITUTION:On the main surface of a P-type silicon substrate 1, a photoresist mask 2 is arranged; a trench 3 is formed by anisotropic etching; by using the photoresist film 2 as a mask, argon ion 4 is vertically implanted, and an argon implanted layer 5 is formed in the base part of the trench 3; the photoresist film 2 is eliminated; heat treatment is performed; and a crystal defect layer 6 is formed in the implanted layer 5; a silicon oxide film 7 is formed on the silicon substrate 1 surface, and the trench 3 is filled; by uniformly etching-back the surface of the film 7, the film 7 is left only in the inside of the trench 3. On the silicon substrate 1 the silicon oxide film and phosphorus doped polycrystalline silicon film are laminated in order, by selectively etching the polycrystalline silicon film; a gate oxide film 8 and a gate electrode 9 are formed by using the electrode 9 as a mask; arsenic ion is implanted, and an N<+> type diffusion layer 10 is formed. Thereby, the gettering of heavy metal ion remaining in the silicon substrate is enabled by the crystal defect layer, whenever the silicon substrate is subjected to high temperature heat treatment.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a trench isolation region.

[Conventional technology]

Conventionally, in the manufacturing method of this type of semiconductor device, a crystal defect layer is formed in advance on the back surface of the semiconductor substrate by sandblasting, excimer laser irradiation, argon ion implantation, etc. During heat treatment, heavy metal ions present in the semiconductor substrate are gettered in the crystal defect layer.

[Problem to be solved by the invention]

In the conventional semiconductor device manufacturing method described above, when sandblasting and excimer laser irradiation are used, crystal defects are formed by mechanical and thermal strain, so defects can be easily removed by heat treatment during the semiconductor device manufacturing process. The problem is that the gettering effect does not last long because the gettering recovers.

In addition, although the method using argon ion implantation solves the above-mentioned drawback, a crystal defect layer is formed in an extremely shallow region on the back surface of the semiconductor substrate, which makes it difficult for transistors, capacitors, etc. formed on the semiconductor substrate to be formed. The distance between the element region and the crystal defect layer is approximately equal to the thickness of the semiconductor substrate, which has the disadvantage that heavy metal ions in the element region cannot be completely gettered. In addition, in recent years, the diameter of semiconductor wafers has been expanded,
The accompanying increase in the thickness of the semiconductor substrate significantly reduces the effectiveness of the above-mentioned gettering method.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention includes a step of selectively forming a groove on one main surface of a semiconductor substrate, a step of selectively implanting an inert element into the bottom of the groove, and a heat treatment of the semiconductor substrate. The method includes a step of forming crystal defects in a semiconductor substrate using the inert element as a core, and a step of forming an insulating layer filled in the trench.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(f) are cross-sectional views of a semiconductor chip shown in order of steps for explaining an embodiment of the present invention.

As shown in Figure 1(a), it is P-type conductivity type and has a specific resistance of 4 to 5.
A photoresist film 2 having a pattern for forming an element isolation region is provided on the main surface of a silicon substrate 1 having a <100> crystal direction of Ω·l, and RIE (Reactive IonEtchin) is applied using photoresist l-1112 as a mask.
g) Depth of 2-3μ by anisotropic etching using method
Form the full 3 of m.

Next, as shown in FIG. 1(b), photoresist III is applied.
,! Accelerate argon ion 4 using 2 as a mask, energy 50 to 150 ke V, dose 1 x 101
Ions are implanted perpendicularly into the silicon substrate 1 at 4 to I x 10 ''cra-2 to form an argon implantation layer 5 at the bottom of the silicon substrate 1 .

Next, as shown in FIG. 1(C), the photoresist film 2 is removed, and the photoresist film 2 is heated in a nitrogen atmosphere at 950 to 1100° C.
Heat treatment is performed for 0 minutes to create crystal defects in the argon injection layer 5 and form a crystal defect layer 6.

Next, as shown in FIG. 1(d), a silicon oxide film 7 is formed to a thickness of 2 to 3 Lm on the surface of the silicon substrate 1 including the groove 3, and the groove 3 is filled. The silicon oxide film 7 is preferably formed by plasma CVD or sputtering so that the surface is flat.

Next, as shown in FIG. 1(e), the surface of the silicon oxide M7 is uniformly etched back to just expose the top surface of the silicon substrate 1, leaving the silicon oxide film 7 only inside 7III3, and trench isolation. Form a region.

Next, as shown in FIG. 1(f), a silicon oxide film and a phosphorous-doped polycrystalline silicon film are sequentially stacked on the silicon substrate 1, and the polycrystalline silicon film is selectively etched. gate oxide film 8. Forming the gate electrode 9 Next, using the gate electrode 9 as a mask, 50 to 80 ke
Arsenic ions are implanted into the surface of silicon substrate 1 with acceleration energy of V to form N1 type diffusion layer 10 to form an N channel MOS transistor. Here, the gate oxide film 8 has a thickness of 20 to 50n+a, and the gate electrode 9 has a thickness of 0.5n+a.
With such a structure, the thickness of which is preferably 6 to 0.8 μm, the crystal defect layer 6 getster the heavy metal ions remaining in the silicon substrate 1 every time the silicon substrate 1 is subjected to high-temperature heat treatment.

〔Effect of the invention〕

As explained above, the present invention forms a crystal defect layer at the bottom of a trench isolation region on the surface of a semiconductor substrate.
This has the effect of effectively gettering heavy metal ions remaining in element regions such as transistors or capacitors.

[Brief explanation of the drawing]

FIGS. 1(a) to 1(f) are cross-sectional views of a semiconductor chip shown in order of steps for explaining an embodiment of the present invention.

Claims (1)

[Claims] A step of selectively forming a groove on one main surface of the semiconductor substrate, a step of selectively ion-implanting an inert element into the bottom of the groove, and a step of heat-treating the semiconductor substrate to form a semiconductor substrate using the inert element as a core. 1. A method of manufacturing a semiconductor device, comprising the steps of: forming crystal defects in the trench; and forming an insulating layer filled in the trench.