JPH0221705B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a data system for efficiently transmitting packets such as data packets and response packets in a local network system that interconnects computer equipment such as cash registers distributed over a relatively narrow area. Regarding transmission methods. in particular,
The present invention relates to a data transmission system using a so-called HDLC packet in which a predetermined flag is attached as a code for delimiting data at the beginning and end of the data.

Generally, in a local network system, data transmission control is performed using the following procedure.

First, each terminal connected to the transmission line reads the destination terminal address written at the beginning of the data packet, and if it matches its own address, it reads the following data. If there is no error as a result of the CRC check, send the ACK data to the transmitting terminal. If there is an error, the received data is discarded. The sending terminal is
A timer measures the time after sending, and within a certain period of time
If there is no ACK, retransmit. Furthermore, when performing even stricter transmission control, a RACK packet is transmitted to the transmitting terminal when an ACK packet is received.

If the transmission of data packets collides with another terminal (for example, when two terminals access at the same time, there is no collision at least up to the start flag, but a collision occurs with the next data),
Packet transmission is terminated at the point of collision. In this case, each terminal that has caused a collision performs a so-called back-off process (described later) and attempts retransmission.

By the way, in a system that uses a packet format that flags the beginning and end of data,
When carrying out the above transmission control, the receiving side determines the completion of packet reception by detecting the end flag. That is, when the end flag is detected, preparations are made to transmit a response packet such as an ACK packet or NRDY packet to the data packet transmitting terminal.

However, with such transmission control, if a collision occurs during data packet transmission, there is a possibility that the receiving terminal will not be able to properly receive the retransmitted packet. As mentioned above, when a collision occurs, transmission is stopped at that point, but the receiving side enters a data waiting state from that point on and processes the retransmitted data packet, treating it as a continuation of the previously received data. Because it does. In other words, in such a case, the start flag of the data packet related to retransmission is regarded as the end flag of the previous data packet (which was cut off midway), and error processing is performed because the data length is short. Regarding the data packet, it is determined that there is no start flag, and error processing is performed for that packet as well. As a result, the receiving side cannot normally receive retransmitted packets at the time of collision.

An object of the present invention is to provide a local network system in which an error is processed for data packets whose transmission is stopped due to a collision without affecting the reception of data packets related to retransmission, and after processing the error, the retransmitted data packets can be normally received. The purpose of the present invention is to provide a data transmission method.

To summarize, the present invention is characterized in that when transmitting a packet, the start flag is continuously transmitted for a predetermined period of time longer than the reception error processing time.

In other words, by making the start flags consecutive, the receiving side considers the first start flag of the retransmitted packet after a collision to be the end flag of the previous packet, and processes the error while the start flags are consecutive. After the process is completed, the data below the start flag to be subsequently received is normally received.

According to this invention, even if a collision of data packets occurs, on the receiving side, regarding the data (including at least the start flag) received before the collision,
Since error processing is performed without affecting retransmitted packets, normal reception is always possible. Furthermore, since error processing can be performed during flag transmission, there is an advantage that data packets retransmitted after a collision can be received without being missed.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a local network system implementing the present invention. In the figure, terminal devices A to N, which are the main system, are
Transmission interface I/F of the embodiment of this invention
The terminals are connected to a data transmission line L consisting of a coaxial cable, so that various data can be freely transmitted and received between the respective terminals. FIG. 2 is a block diagram of the transmission interface I/F, and FIG. 3 is a more detailed block diagram thereof.

The transmission interface I/F includes a transmission control circuit 10, a reception control circuit 11, and a transmission/reception data transfer control circuit 12. Transmission control circuit 1
0 sends the transmission data or response packet onto the transmission line in a predetermined packet format, and the reception control circuit 11 determines the packet format of the data received from the transmission line L, and applies the determination result to the transmission line. Create a response packet based on the Further, the transmission/reception data transfer control circuit 12 includes the reception control circuit 1
1. Controls the transfer of transmitted and received data between the transmission control circuit 10 and the terminal device.

In FIG. 3, the transmission/reception data transfer control circuit 12 is comprised of a transmission data transfer control circuit 1 and a reception data transfer control circuit 2. The transmission data transfer control circuit 1 includes a register a that temporarily stores data sent from the terminal device side byte by byte when transmitting various data, and a flag that is set when permitting writing to the register a. WEN
and a flag WED that is set when the terminal device has transferred all transmission data. Also,
The reception data transfer control circuit 2 includes a reception register b for transferring the reception data on the interface side to the terminal device byte by byte when receiving various data, and a reception register b for transmitting the reception data on the interface side to the terminal device for each channel. A flag REN is used to notify the interface, a flag RED is used to notify the interface for each channel that the terminal has received all received data, and a flag RED is used to notify the interface that the terminal is ready to receive data. It has a flag RDY to notify.

The above transmission control circuit 10 and reception control circuit 1
1 is a memory 4 for storing transmission/reception data and an interface control program for each channel; a control circuit 6 for controlling a timer and an interrupt function at the transmission/reception stage; and a control circuit 6 between the memory 4 and the transmission/reception data transfer control circuits 1 and 2. A DMAC 3 performs DMA transfer of data, a link controller 7 controls transmission and reception operations and has transmission and reception buffers C and F and transmission and reception shift registers D and E, and a link controller 7 that modulates transmission data and sends it out on the line at the time of transmission, and also controls transmission and reception operations. A line control circuit 8 that includes a collision detection circuit that detects whether access requests are received from terminals at the same time, a line control circuit 9 that receives signals on the line, demodulates the signals, and transfers the signals to the link controller 7, and an interface. It is composed of a sub CPU 5 that controls the entire system according to a control program stored in a memory 4.

FIG. 4 is a circuit diagram of a collision detection circuit provided in the line control circuit 8. As shown in the figure, the modulated signal and the pre-demodulation signal are applied to an exclusive OR circuit 81, whose output is used as a set signal for a flip-flop 82. By doing this, when the transmitted data and the received data are different, that is, at the time of a collision, the collision detection signal is
CO is obtained.

FIG. 5 is a circuit diagram of a carrier detection circuit provided in the line control circuit 9. FIG. 6 is a timing chart of the carrier detection circuit.
In this embodiment, a carrier signal CD1 indicating that there is a flow of data on the line and a signal CD2 indicating that there is no carrier signal CD1 for a certain period of time are obtained. That is, a receive clock a is generated from a signal received from the line by a demodulation circuit 90, and inputted to a binary counter 91 and a latch circuit 92 to obtain signals CD1 and CD2. As shown in FIG. 6, when the receive clock disappears, the CL (clear) terminal of the binary counter 91 is released, and the count returns to the basic clock φ.
As a result, a carrier signal CD1, which is a mirror image signal of the carrier wave, is obtained. As the count progresses further, a signal CD2 is obtained which is obtained by adding a preset processing time t to the period of the clock φ.

Each terminal individually detects the signals CD1 and CD2, and uses a circuit not shown to send out data packets only when the signal CD2 is "low" (logical 0), such as ACK packets or RACK packets. The response packet is controlled so that it can be sent only when the signal CD1 is "low" (logical 0). By controlling transmission and reception while checking the signals CD1 and CD2 in this way, collision with data packets from other terminals is prevented with respect to the transmission of ACK and RACK packets after data packet transmission. FIG. 7 shows the relationship between the signals on the line and the signals CD1 and CD2. In the figure, time t represents a certain period of time when there is no carrier signal on the line. This time is set at least longer than the allowable ACK packet retransmission time, and
If no packets are sent out within this time t, the line is de-occupied and new access from other terminals is allowed.

FIG. 8 shows the basic transmission procedure in this local network. Figure A shows the procedure when both the transmitting terminal and the receiving terminal are in a normal state. First, a data packet including a header section such as a flag and an address is transmitted from a transmitting terminal to a destination.
When this data packet is received normally, the data packet receiving terminal transmits an ACK packet.
The data packet transmitting terminal that has received the ACK packet transmits a response packet (RACK packet) in response to the ACK packet. When the receiving terminal is not ready to accept the data packet, the receiving terminal transmits an NRDY packet and ends the process, as shown in FIG. 2B. Also,
If the receiving buffer corresponding to the channel of the transmitted data packet is blocked,
The process ends by sending an NRDY packet with a buffer statement as shown in the figure below.

FIG. 9 is a diagram showing a packet format.
As already mentioned, the packets used in the transmission system of the present invention are those in the HDLC format, in which data is separated by a start flag (leading flag) and an end flag (trailing flag).

Both flag codes are 7E (hexadecimal)
It is. The trailing flag functions as an end code indicating the end of the packet. The destination address DA specifies the receiving station. Source address SA specifies the transmitting station. data type
TYPE specifies the type of transfer frame. There are four types: data, ACK, RACK, and NRADY. The channel number CH.NO specifies the channel type of the packet. Line status DLS
Write the statement when sending NRADY packet. The statements include "receiving not possible" and "receiving buffer full." bite counter
BCL and BCH specify the number of bytes of data. The data field DATA sets the data to be transferred. This data field DATA exists only in data packets. CRC provides an error detection code.

Next, the operation of the interface shown in Figure 3 is as follows.
This will be explained with reference to FIGS. 10 and 11.

(1) Transmission Operation FIGS. 10A to 10C are flowcharts showing the data transmission operation.

Now, suppose that specific data is to be transmitted from terminal device A to terminal device N.

First, step n1 (hereinafter step ni is simply ni)
), the terminal device A writes 1 byte of data to the write register a of the transmission data transfer control circuit 1, and sets the flag WEN. At this time, the terminal device A sends the transmission data length (number of bytes) and channel information CHn specifying which channel to use for handling the data together with the data and sets it in a predetermined area.

The transfer control circuit 1 that received these data,
Select the DRQ3 channel (the channel used for data transfer within the interface), which is the DMA transfer channel for the transmit data, and send the DMA to DMAC3.
Instruct transfer (n2). Upon receiving the instruction, the DMAC 3 sets a transfer destination address in the memory 4 (n3), and transfers the data in register a to the transmission buffer A at that address (n4). When the transfer of 1 byte is completed, the flag WEN is reset (n5). Terminal device A monitors the above flag WEN, and when it learns that it will be reset (n2
1), return to n20 and send the next 1 byte of data to register a. In this way, terminal device A monitors flag WEN and writes 1 byte of data to register a each time the flag is reset, while on the interface side, DMAC writes 1 byte of data to register a.
Sequentially send data in register a to transmit buffer A
Perform DMA transfer. After completing the transfer of all data, the terminal device A goes to set the flag WED (n22). When this flag WED is set,
The control circuit 1 checks the specified number of bytes and the transmission command at n7 and n8, and if correct, proceeds to n9. DMAC3 is n9, n10
DMA of data from buffer A to buffer B
Perform the transfer. Once the transfer is complete, a flag is set to indicate that the transmit buffer is free.
Reset WED (n11). Terminal device A is
Knowing that the flag WED is in the reset state,
If there is data to be transmitted next, the transmitted data is transferred to buffer A in the same manner as above.

On the other hand, when the transmission data is prepared in the transmission buffer B as described above, the CPU 5, which controls the movement of the interface, issues a transmission instruction (n30).
The link controller 7 is set to a transmission ready state (n31). At this time, the link controller 7
The signal CD2 obtained by the carrier detection circuit CD is checked, and if it is "low", the leading flag F, which is the first data of the packet, is immediately sent out on the line via the line control circuit 8 (n32).
Next, the CPU 5 sets the start address and the number of data bytes of the buffer B in the memory 4 in the DMAC 3 (n33, n34), and instructs data transfer from the buffer B to the link controller 7. During this time, the link controller 7 continues to send out the above-mentioned leading flag F, but after completing n34, it stops sending out the same flag F (n35).

Continuous sending of the leading flag F is performed by this n3
This will be done in stages 2 to n35.

Next, when the transmission buffer C of the link controller 7, which is the data transfer destination, is in an empty state (n36),
When the link controller 7 sends a data transfer enable signal to the buffer C to the DMAC 3 (n37), one byte of data is transferred from the buffer B to the buffer C at n38. The link controller 7 further transfers the data transferred to the buffer C to the shift register D, transfers 1 byte to the shift register D (n40), and then transfers the data to the buffer C again to the shift register D (n40).
7 and executes DMA transfer, and at the same time sends the data in the shift register D to the line control circuit 8, and sends it out to the line after modulation (n41 to n44).
As will be explained later, if the above operations are performed simultaneously on two or more terminals, a collision will occur at least when sending the source address of the data, but this collision will be detected by the collision detection circuit CO. If so, the process advances from n44 to n60 to prohibit transmission. Now, assuming that there is no collision, the link controller 7 sequentially moves from buffer C to shift register D.
Transfer to Bathua C as described above.
The data to be transferred by DMA is sequentially transferred to the line control circuit 8.
send to Repeat these operations n37 to n45, and when the specified data length has been sent,
The DMAC 3 increments its built-in byte counter to notify the link controller 7 of completion of frame transmission (n46). Upon receiving this, the link controller 7 attaches a CRC and 1
Complete frame data transmission. Then, the link controller 7 sends an interrupt signal to the CPU 5 indicating that data transmission of one frame has been completed (n47), and the CPU 5 sends a trailing flag F to the line control circuit 8 via the link controller 7. (n48). For the trailing flag F, the CPU 5 performs transmission completion processing (n49) and reception preparation processing (n50).
When these processes are completed, the flag transmission is stopped (n51).
Set the interface to receive mode (n5
2).

While the trailing flag F is being continuously transmitted as described above, the signal CD2 is naturally high.
maintains the state of Therefore, access from other terminals is prohibited. Furthermore, as will be described later, in the terminal device N, since the signal CD1 is "high" while receiving the trailing flag F, the terminal device N is in a state of waiting for transmission of a response packet.

Next, in n44, the operation when data packets collide will be explained.

Data packet collisions occur when two or more terminals attempt to transmit at the same time in a common channel scheme where each terminal has equal access. Although the signal CD2 prevents collisions when the access timings are completely different, since the propagation delay is large between mutually distant terminals, it takes time to detect the transmission of another terminal. the result,
Collisions are more likely to occur. Generally, in a local network system that employs a common channel method, in order to solve the above problem, data is retransmitted after waiting a certain period of time after a collision is detected. This process is called back-off process. The steps below n60 are the steps for performing this back-off process.

When a collision is detected by the collision detection circuit CO, all terminals that have transmitted data packets stop transmitting (n60). Next, the line is raised to "high" so that other terminals can easily detect that a collision has occurred (n61). Then the signal CD
2 is detected (n62), and at the falling timing, a predetermined back-off timer value is read from the random number table TBL provided in the memory 4 (n63), and the value is set in the timer T of the control circuit 6. (n64). Subsequently, when the predetermined time set in this way has elapsed (n65),
The CPU 5 detects the state of the signal CD2 again, and if the level is "low" and access is possible, the process returns to n30 and repeats the above-described transmission operation. If the level of signal CD2 is "high" and line use is not permitted, the process advances to n67 and starts the back-off timer again at the timing when signal CD2 falls (n64). Wait until the switch is turned off.

FIG. 12 shows the operation when terminals A, B, and C attempt to access almost simultaneously (with some errors due to propagation delays, etc.) and a collision occurs. A,
When each terminal B and C detects a collision as shown in the figure, they immediately stop transmitting, and at the falling timing of signal CD2, the back-off timer values t1, t generated by the random number table in each terminal are set.
2. Start t3. When time t1 has elapsed, terminal A detects the state of signal CD2. At this time, terminal B and terminal C have timer values t2, t
3 has not yet passed, so it cannot be sent. Therefore, as long as there is no access from other terminals, signal CD2 is in the OFF state, allowing retransmission from terminal A. This example shows a case where a data packet is transmitted from terminal A to terminal B. Regarding the other B terminals and C terminals that could not transmit due to the collision, retransmission is attempted after the A terminal's transmission is successful. This method is carried out in the same manner as above. That is, timer values t2 and t3 are started at the falling timing of signal CD2, and the B terminal checks the state of signal CD2 when time t2 has elapsed, and if it is off, retransmits. Furthermore, the C terminal checks the signal CD2 when time t3 has elapsed, and if it is off, retransmits it. In this way, the order of transmissions from colliding terminals is sorted out while performing back-off processing.

As described above, in this embodiment, the starting point of the back-off timer is set at the falling timing of the signal CD2, so that it starts at the same timing regardless of the type of terminal. Therefore, there is an advantage that the probability that a collision will occur again can be reduced and the accuracy of the back-off timer can be improved. The backoff timer value set at n64 is set to the same value the next time it is set at n64 unless a new collision occurs.

FIG. 13 shows the structure of the data packet sent out on the line by the above operation.

As shown in the figure, m lead flags F are located at the beginning of the packet, and j lead flags F are located at the end of the packet.
Trailing flags F are located. As described above, m flags are sent out from n32 to n35, and j flags are sent out from n48 to n51. By consecutively placing flags at the beginning and end of the packet in this way, the transmitting terminal can prepare for reception at the time when the end flag is continuously sent.
The receiving terminal can change the mode to normal receiving mode while receiving consecutive reading flags.

It is clear from the steps n48 to n51 as described above that the transmitting terminal can prepare for reception at the time of the final flag continuous transmission. During this time, access from other terminals is prohibited due to the "high" level of the signal CD2. Furthermore, the transmission of an ACK packet from the terminal device N is also prohibited due to the "high" level of the signal CD1.

If the receiving terminal is set to normal receiving mode, data packets will collide as described above, and
This is when the message is about to be retransmitted after a certain period of time. The operation at this time will be explained once again. For example, if a receiving terminal receives signals from two or more transmitting terminals at the same time, a collision is detected when the source address is received. At this time, since the receiving terminal has already received the reading flag and the receiving mode has not been reset, it is in a data waiting state. However, the two transmitting terminals that caused the collision have terminated their transmission and are waiting for the next chance. Therefore, when a new data packet is transmitted from either terminal or another terminal, the receiving terminal in the data waiting state regards the first leading flag as the trailing flag (the leading flag and the trailing flag are both "7E"). ), and upon receiving the reading flag, it detects that the format of the packet is incorrect (the format length is short) and performs error processing. Therefore, in such a case, if there is only one reading flag, there is a possibility that the received data after error processing will be treated as having no reading flag and error processing will be performed.

On the other hand, if an appropriate number of leading flags are consecutively placed in a data packet, when the receiving terminal receives the first leading flag, it will process the error at the reception time of the next flag and enter normal receiving mode. It becomes possible to process the still continuing reading flag as a flag for the next packet.

As described above, by attaching m leading flags and j trailing flags, it is possible to maintain a state in which the transmitting terminal and the receiving terminal can always receive packets normally.

(2) Reception operation FIGS. 11A to 11C are flowcharts showing the data reception operation.

The data packet sent onto the line as described above is received by the line control circuit 9 on the terminal device N side (n70), demodulated (n71), and guided to the shift register E of the link controller 7 (n72). The link controller 7 determines whether the first byte of the received data is a flag or something other than a flag, and if it is a flag, guides the next byte of data to the shift register E. If it is other than a flag, the destination address
The DA is read and it is determined whether the address is the own address (n75), and if it matches the own address, the process proceeds to n76. At n76, the received data of the shift register E is transferred to the reception buffer F, and an instruction is given to the DMAC 3 that there is received data (n77). At the same time, DRQ1 is selected as the channel for transferring data to buffer G. The DMAC 3, which has received the instruction that there is data to be received, sequentially transfers the received data in the reception buffer F to the buffer G in the memory 4. There are as many buffers G as there are channels, and the received data is transferred to the portion corresponding to the channel number specified in the packet.
This transfer is performed byte by byte of data guided to register E, and when a flag (trailing flag) indicating a data break is detected, it is determined that reception is complete (n79), and the link controller 7 transfers the data to the CPU 5. Instructs reception completion to (n8
0). Upon receiving this instruction, the CPU 5 prohibits the reception mode and determines the type of the transmitted data. If it is data information, a flag in the reception data transfer control circuit 2 indicates whether the terminal device is in a ready state and can receive data at the time of reception.
Determine by RDY (n89). this flag
RDY is controlled by the terminal device and is set when the terminal device is ready to receive. If reception is possible, then it is determined whether the reception buffer G (in the memory 4) of the designated channel (designated by CH.No. in FIG. 9) is free (n90). As mentioned above, this reception buffer G is provided with a number of channels, and the flag REN in the reception data transfer control circuit 2 indicates whether each channel is in an empty state. That is, if the reception buffer of any channel is empty, the flag REN corresponding to that channel is set. Conversely, if the channel is in a buffer-full state, the flag REN corresponding to that channel is reset. If the receiving buffer of the channel specified by n90 is free, the terminal sending the data packet will receive
Send an ACK packet (n91). Although not shown in Figure 11, the assembly of this ACK packet is
This is done by CPU5. As is clear from Figure 9, the assembly of the ACK packet is extremely simple.
Other data except the destination address DA is a fixed code. There is no need to create a destination address itself, and the source address SA of the sent data packet can be used as is. The transmission of the ACK packet naturally takes place when there is no carrier on line L, ie when signal CD1 is "low". When the carrier detection circuit CO is detecting a carrier, it is in a state of waiting for transmission of an ACK packet at n91. Therefore, while the terminal device A is continuously transmitting the trailing flag F, the terminal device N side enters the ACK packet transmission waiting state at n91. After sending the ACK packet, CPU5
sets the data presence flag REN (of the specified channel) in the reception data transfer control circuit 2 (n92),
Set to re-receive mode.

If the terminal device N is unable to receive data at n89, an NRDY packet is transmitted at n93 and the process returns to the re-receiving mode. Also, if the reception buffer is full on n90, that is, when the flag REN corresponding to the specified channel is set, n90
In step 4, send a buffer full (NRDY) packet and return to re-reception mode. In this case as well, the NRDY packet is transmitted after waiting for the completion of the trailing flag transmission.

Although not shown, the trailing flag F is continuously transmitted in the transmission of ACK packets and NRDY packets until preparation for reception is completed. As a result, the RACK packet from terminal device A will also be sent when terminal device N is ready to receive it.

In the above operation, the received data is
If it is not ACK, RACK, NRDY, or buffer full, it will be treated as an error. Therefore, when a collision of data packets occurs and the receiving side receives the data at the time of the collision and then receives the leading flag F of the retransmitted packet, it is determined that none of the above data is present and the data is n86.
→The device exits to n97 and is reset to re-receive mode. In fact, when exiting from n86 to n97, a process (one of error processes) to clear the previously received data is performed. When a data packet is retransmitted after a collision in this way, error processing is performed after receiving the first leading flag F of the retransmitted packet, and then the re-reception mode is set and the next packet is received at n70. Since the leading flag F is consecutive at the beginning of the retransmitted packet, when the process returns to n70, reception starts from the leading flag F of the retransmitted packet. That is, the retransmitted packet will be received in a normal format.

On the other hand, terminal device A uses the above n in terminal device N.
Since the ACK packet transmitted at step 91 is received, the process proceeds from n82 to n83 to n95. In normal cases, after transmitting a data packet, the state transitions to an ACK packet wait state, so the process proceeds from n95 to n96, transmits a RACK packet to the ACK packet transmitting terminal, that is, terminal device N (n96), and sets the transmission/reception control unit to reception mode. (n97).

Note that both the ACK packet transmission at n91 and the RACK packet transmission at n96 are time-controlled by a transmission timer T1, and when ACK packet transmission fails a predetermined number of times,
If a RACK packet cannot be transmitted even after transmitting ACK packets a predetermined number of times, error handling is performed.

When terminal device A transmits the RACK packet as described above, terminal device N changes n82→n8.
Proceed as 3 → n84 → n98. Normal state transition occurs when the RACK packet is received.
Since the transmission of the ACK packet has finished, n9
8→n97 to set the reception mode.
If the ACK packet is not sent,
When the RACK packet is received, the ACK packet is retransmitted (n99) and the reception mode is set (n97). Also, if the received packet at n85 is an NRDY packet, n85 → n10
Proceed to 0. Normally, when receiving an NRDY packet, it is after the data packet is sent, so n10
0 → n101, and the other party is on the terminal device.
Notify that the device is in NRDY state (state where data cannot be received) and set the reception mode (n
97).

Transmission of the response packet is performed at n82 and below as described above, but when the data packet is normally received and the ACK packet is transmitted, the received data is exchanged with the terminal device via the transmit/receive data transfer control circuit. Transfer processing is performed. This procedure is shown below n110.

At n110, the terminal device N checks whether the flag REN corresponding to the channel specified by the main CPU (not shown) is set. If the flag REN corresponding to that channel is set, a received data read command is given to the received data control circuit 2 (n111). Then, the above flag REN is reset (n112),
The CPU 5 sets the start address and received data length (number of bytes) of the buffer G (of the specified channel number) in the memory 5 in the DMAC 3 to prepare for DMA transfer (n113). Furthermore, the CPU 5 sets the channel used for data transfer (different from the above specified channel, refers to the data transfer channel within the interface) to DRQ2 (n114),
Instructs DMA transfer (n115). Then, one byte of data is transferred from buffer G to register b (n116), and an interrupt signal is output to terminal device N (n117).
When the terminal device N receives this interrupt signal, it proceeds from n130 to n131 and takes in the data transferred to register b. On the other hand, since the data presence flag REN has been reset at n112, one new byte of data is transferred from buffer F to buffer G at n78. At the same time, the flag REN is reset at n77.
Therefore, n110 and below are executed again and n1
The next 1 byte of data is set in register H at step 16, and the terminal device N takes in this data at step n131. This operation is repeated, and when all the data in buffer G is taken in through register b, the DMA transfer is completed, the process proceeds from n119 to n120, and DMAC 3 stops operating.

The terminal device N side checks whether the number of bytes of the received data matches the number of bytes of the actually captured data, and if they match, processes the captured data into the desired format (n133), and the processing process is completed. When completed (n134), the flag RED of the reception data transfer control circuit 2 is set (n1
35) Notify the interface side of the completion of import. When the CPU 5 on the interface side detects that the flag RED is set (n121), it resets the flag RED (n122) and prepares for the next data transmission/reception.

In the above manner, from terminal device A to terminal device N
Specific data is sent to.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a local network system implementing the present invention. Figure 2 is a block diagram of the transmission interface I/F.
FIG. 3 is a more detailed block diagram. FIG. 4 is a circuit diagram of a collision detection circuit provided in the line control circuit 8. FIG. 5 is a circuit diagram of a carrier detection circuit provided in the line control circuit 9. FIG. 6 is a timing chart of the carrier detection circuit. FIG. 7 shows the relationship between the signals on the line and the signals CD1 and CD2. FIG. 8 shows the basic transmission procedure in this local network. FIG. 9 is a diagram showing a packet format. FIGS. 10A to 10C are flowcharts showing the data transmission operation. FIGS. 11A to 11C are flowcharts showing the data receiving operation. 12th
The figure shows the operation when terminals A, B, and C attempt to access almost simultaneously and a collision occurs. FIG. 13 shows the structure of a data packet sent out on the line. FIG. 2, 10-transmission control circuit, 11-reception control circuit, 12-transmission/reception data transfer control circuit, third
Figure 1 - Transmission data transfer control circuit, 2 - Reception data transfer control circuit, 3 - DMAC (Direct Memory Access Controller), 4 - Memory, 5 -
Sub CPU, 6-control circuit, 7-link controller, 8-line control circuit (transmission), 9-line control circuit (reception).

Claims (1)

[Claims] 1 Using a formatted packet that flags the start and end positions of transmitted data, transmits a data packet when it is determined that there is no carrier on the data transmission line, and stops transmitting the packet when there is a collision. A data transmission method in which a response packet is retransmitted after a certain period of time and a response packet is received when the retransmission is successful, characterized in that a start flag is continuously transmitted for a specified period of time longer than the reception error processing time when the packet is transmitted. A data transmission method for local network systems.