JPH022173A - Analog switch - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Prior Art (Figures 4 to 6) Problems to be Solved by the Invention Examples of Means and Actions for Solving the Problems (1 to 6) Figure 3) Effects of the extended invention [Summary] Regarding analog switches used in S/H circuits, chopper type comparators, etc., voltage fluctuations in the source region or drain region due to intrusion charges from the outside can be prevented, and the occupied surface (, For the purpose of narrowing 'L, two regions of the conductivity type and the opposite conductivity type are formed at a distance from each other on the surface of the conductivity type substrate, and a gate is formed on the substrate surface between the two regions via an insulating layer. In the analog switch in which an electrode is formed, one region of the two regions of opposite conductivity types surrounds the other region, and more preferably, a conductive rolled thin film is disposed on the gate electrode via an insulating layer. A wiring connected to the other opposite conductivity type region is arranged so as to pass above the conductive rolled thin film and cross over the gate electrode via an insulating layer.

[Industrial Application Field] The present invention relates to an analog switch used in an S/8 circuit, a chopper type comparator, and the like.

[Prior art] In the S/8 circuit shown in FIG.
When an analog voltage is supplied to the source S of and the potential of the gate G is set to low level and the analog switch 1 is turned on,
When the voltage between the terminals of the capacitor 2 becomes equal to the input voltage between the source S and the ground, and then the gate G is set to a high level, the input terminal at this time is held by the capacitor 2. In the figure, 3 is a voltage follower.

This analog switch 1 is, for example, as shown in FIG.
A source region S and a drain region consisting of p° diffusion regions are formed on the surface of the type Si substrate 4 and are spaced apart from each other, and a gate oxide film is formed on the n-type Si substrate 4 between the source region S and the drain region. A gate G is deposited through the gate 5. In the figure, a p-type diffusion region 6 is part of another circuit element and is formed near the drain region.

The + side power supply voltage VDD is applied to this n-type Si substrate 4, but due to noise etc., the voltage of the p-type diffusion region 6
When h' V > V Do, positive charges 7 invade from the p' type diffusion region 6 to the n type Si substrate 4 through the pn junction. This intruding positive charge 7 is absorbed by the holes 1 in the n-type Si substrate 4, but when the amount of intruding charge increases, it is absorbed by the drain region or source region S of the analog switch l, and the holding voltage of the capacitor 2 increases. fluctuate.

Next, in the chopper type comparator shown in FIG. 6, the potentials of the analog switches IA, IB, and the gates G of IC are set to low level to turn them on, and the potential of the gate G of the analog switch ID is set to high level to turn them on. When turned off, a charge proportional to the voltage applied to the input terminal 11 is stored in the capacitor 12, and the inverters 14 and 15 are in a state where they are most likely to operate to the high level side or the low level side depending on the subsequent input. be done. Next, the potentials of the gates G of the analog switches IA, IB, and IC are set to a high level to turn them off, and the gate G of the analog switch ID is set to a low level to turn them on, so that the sample voltage applied to the input terminal 16 The amount of electricity stored in the capacitor I2 changes according to the amount of electricity stored in the capacitor 13, which is amplified by the inverter 14, and the amount of electricity stored in the capacitor 13 changes.
Furthermore, this is amplified by the inverter 15 and the comparison result is taken out to the output terminal 17.

When the reference voltage to be compared and the sample voltage are substantially equal, the intrusion charge 7 causes the analog switch II3 to
, 1G, each of which is amplified by the inverters 14, 15, may cause an error in the comparison result obtained at the output terminal 17.

In order to avoid such fluctuations in the holding potential, conventionally the analog switch ! A contact consisting of a p diffusion region is formed on the outer periphery of the n-type Si substrate 4 and on the surface of the n-type Si substrate 4, and the contact is made to absorb the intruding charge 7 from the outside.

[Problem to be solved by the invention: &] However, since the contacts are formed on the outer periphery of the analog switch 1, the occupied area becomes large, which hinders high integration.

SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide an analog switch that can prevent voltage fluctuations in the source region or drain region due to charge intrusion from the outside, and can reduce the occupied area. .

[Means for Solving the Problems] In order to achieve this object, in the present invention, two regions of a conductivity type opposite to the conductivity type are formed at a distance from each other on the surface portion of a conductivity type substrate, and both regions are separated from each other. In an analog switch in which a gate electrode is formed on the surface of the substrate between the two regions with an insulating layer interposed therebetween, one region of the two regions of opposite conductivity types surrounds the other region.

In a further preferred configuration, a conductive shield thin film is disposed on the gate electrode via an insulating layer, and a wiring connected to the other (inner) region of the opposite conductivity type is connected to the conductive shield thin film via the insulating layer. It is disposed so as to pass above the shield thin film and cross over the gate electrode.

[Action] Charges that enter from outside are absorbed by the outer region of opposite conductivity type, so when this analog switch is used in the S/H circuit shown in FIG. 4, for example, the inner region of opposite conductivity type is By connecting the capacitor 2 to the capacitor 2, the voltage held by the capacitor 2 can be kept substantially constant.

Further, since there is no need to provide a contact on the outer periphery of the analog switch 1 for the sole purpose of absorbing intruding charges from the outside, the occupied area can be reduced and high integration becomes possible.

Furthermore, if a conductive shield thin film is provided between the wiring in the inner opposite conductivity type region and the gate electrode, it will not be affected by voltage fluctuations of the gate electrode. The potential of the mold region can be held more constant.

[Example] (1) One example An embodiment of the present invention will be described based on the drawings.

FIG. 1 is a plan view of a p-MO3 type analog switch IX with an insulating layer omitted, and FIG. 2 is a partial cross-sectional perspective view of the analog switch 1x in FIG. 1 taken along the line ■-■. FIG. 3 is a sectional view taken along the line lll-[ of FIG. 1.

A p° type diffusion region 20 and a p type diffusion region 21 are formed spaced apart from each other on the surface of the n type Si substrate 4, and a circular region 2
A gate electrode 23 is formed on the n-type Si substrate 4 between 0 and 21 with an insulating layer 22a interposed therebetween. This p'-type diffusion region 20 is surrounded by a p-type diffusion region 21. A shield 24 is provided on the gate electrode 23 and crosses the gate electrode 23 and the p' type diffusion region 21 via the insulating layer 22b.
is installed. The shield 24 is a conductive thin film,
A shield 24 is further provided on this via an insulating layer 22c.
A narrower wiring 25 is arranged in the longitudinal direction of the shield 24. One end of the wiring 25 is located above the center of the p' type diffusion region 20, and is connected to a columnar contact 25a deposited at the center of the p' type diffusion region 20.

When the analog switch IX configured as described above is used in an S/H circuit as shown in FIG. area. A negative pulse is applied to the gate electrode 23 to temporarily bring the p° type diffusion regions 21 and 20 into a conductive state, and the capacitor 2 is charged with the voltage supplied to the p type diffusion region 21. Hold. When intrusion charges 7 from other elements flow into the analog switch IA due to noise etc., the outer p-type diffusion region 21
absorbed by.

Therefore, the inner p° type diffusion region 20 is not affected by the intruding charges 7, and the holding voltage of the capacitor 2 can be kept almost constant. Moreover, even if the voltage of the gate electrode 23 fluctuates, its influence is not transmitted to the wiring 25, and the potential of the capacitor 2 can be kept more constant.

When analog switch IX is used in the chopper type comparator shown in FIG.
Since the inverters 14 and 15 amplify the potential on the source S side, by using the inner p° type diffusion region 20 as the source region and the outer p゛ type diffusion region 21 as the drain region, the intruding charge 7 is transferred to the source S. 14.15 to prevent it from being injected into the region and amplified by the inverter 14.15. Regarding the analog switch IAS ID, in order to avoid fluctuations in the potential on the capacitor 12 side due to the intrusion of charge 7, the inner p° type diffusion region 20 is used as the drain region and the outer p type diffusion region 21 is used as the source region. do.

With such a configuration, it is possible to minimize the influence on the circuit caused by the intrusion charge 7 entering the analog switch IA without providing a special contact area on the outer periphery of the analog switch.

[Effects of the Invention] As explained above, the analog switch according to the present invention has a configuration in which one of the source region and the drain region is surrounded by the other region, and one of the source regions and the drain region is surrounded by the other region depending on the circuit to which this is applied. By making one region and the other the drain region, the intruding charges from the outside are absorbed in the outer region, so the voltage fluctuation in the inner region due to this intruding charge becomes extremely small, and the influence on the circuit is reduced to almost zero. It has the excellent effect of being able to

Moreover, there is no need to form special contacts on the outer periphery of the analog switch to absorb intruding charges.
Another advantageous effect is that the surface area of the analog switch can be reduced and high integration becomes possible.

[Brief explanation of the drawing]

1 is a plan view of an analog switch according to an embodiment of the present invention, with an insulating layer omitted; FIG. 2 is a partial cross-sectional perspective view of the analog switch of FIG. Figure 3 is a sectional view taken along line III-III in Figure 1, Figure 4 is an S/H circuit diagram to which an analog switch is applied, Figure 5 is a sectional view showing the configuration of a conventional analog switch, and Figure 6 is an analog FIG. 2 is a circuit diagram of a chopper type comparator to which a switch is applied. In the figure, 1, IA to ID, IX are analog switch 3, voltage follower 21, p' type diffusion regions 22a to 22c, insulating layer 23, gate electrode 24, node 25, wiring S, source D, drain G, gate + side view of the p-MOS type - Ablob switch Fig. 1T Figure 1 [-1 protected cut section Ll; partial cross-sectional perspective view Figure 2A Fig. 1 7711 Cross section Fig. 3 S/H heating 4n type S1 substrate 7 Intrusion charge 1) - MO5 type Rinaroki Sui'nochi Fig. 5

Claims (1)

[Claims] 1) Two regions (38, 39) of a conductivity type opposite to the conductivity type are formed on the surface of a substrate (7) of one conductivity type, separated from each other, and the substrate between the two regions is formed. In an analog switch in which a gate electrode (41) is formed on the surface via an insulating layer (40a), one of the two regions (38, 39) of opposite conductivity type (
38) surrounds the other region (39). 2) Claim 1 further comprises: a conductive shield thin film (42) is disposed on the gate electrode (41) via an insulating layer (40b), and connected to the other opposite conductivity type region (39). Wiring (
43) is disposed so as to pass above the conductive shield thin film (42) and cross over the gate electrode (41) via an insulating layer (40c).