JPH0221786A - Noninterlace conversion circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a non-interlaced conversion circuit used in an image display device, which converts an interlaced video signal to a non-interlaced signal.

(Prior Art) In recent years, large-sized television receivers have been developed and their screens have become larger. On large screens, scanning a normal interlaced signal as it is will make the scanning lines stand out and the image quality will be poor, so in order to make the scanning lines less noticeable, non-interlace conversion is performed to double the number of scanning lines. .

FIG. 5 shows a conventional circuit for performing non-interlaced conversion. A video signal is supplied to an input terminal 1 and delayed by one horizontal period (hereinafter referred to as IH) in a line memory 3. The delay signal from the line memory 3 and the direct signal from the input terminal 1 are added by an adder 4, and the added signal is added by a coefficient unit 5.
It is multiplied by 2. The video signal from this coefficient unit 5 is a so-called interpolation signal.

This interpolated signal and the direct signal from the input terminal 1 are input to the double speed converter 8, are time-compressed, and are alternately transmitted to the output terminal 9.
is derived. The video signal derived in this way is a non-interlaced video signal and has double the scanning line density.

According to the above-mentioned non-interlaced conversion circuit, the scanning line density is doubled, but when looking at the vertical component, it has the same side effect as passing through a low-pass filter.

FIG. 6 represents the interlaced signal in terms of two-dimensional spatial frequencies. The vertical axis is the vertical frequency.

The horizontal axis is the temporal frequency. Now, if the interlaced signal has a component of (0,525/2) and this moves as a moving image, it moves in the coordinate direction of (30,525/2). Furthermore, the aliasing component 1 (which appears around the coordinates of (30, 0)) caused by the interlaced signal moves in the direction of the coordinates (0, 0).

In this way, as the aliasing component approaches (0, 0), the time frequency of interference due to aliasing (such as moiré) approaches 0. This is in the direction where the false image due to folding stops and appears, and becomes more noticeable. In the interlaced state, the originally necessary parts remain, but by deinterlacing, the originally necessary parts are reduced, and relatively only the aliasing components remain.
The unnaturalness caused by the folding will be further emphasized.

(Problems to be Solved by the Invention) As described above, the conventional non-interlaced conversion circuit has a problem in that when a moving image having high-frequency components in the vertical direction is processed, the image becomes unnatural.

SUMMARY OF THE INVENTION An object of the present invention is to provide a non-interlaced conversion circuit that does not produce unnatural images even if a moving image is present when an interlaced signal is converted to non-interlaced.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides that when a non-interlaced signal is obtained by filling between lines of an interlaced video signal with an interpolation signal, the interlaced video signal and the interpolation signal are intermediate. At least one of the two signals is passed through a nonlinear circuit to obtain a luminance difference in luminance level, and a double speed converter 1 is used.
It is designed to be input.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. A video signal is supplied to the input terminal 11 and delayed by one horizontal period in the line memory 12. Delay signal from line memory 12 and input terminal 1
The direct signal from 1 is added in an adder 13, and the added signal is multiplied by 1 and 2 in a coefficient unit 14. This coefficient unit 14
The video signal from is the interpolation signal.

Here, the direct signal and interpolated signal from the input terminal 11 are:
The signals are respectively supplied to nonlinear circuits 15 and 16, and processed so that the difference in level (luminance) between them is emphasized at the intermediate luminance signal level. The output signals of the nonlinear circuits 15 and 16 are input to the double speed converter 17, time-compressed, and alternately led out to the output terminal 18. The video signal derived in this way is a non-interlaced video signal and has double the scanning line density.

The characteristics of the above nonlinear circuits 15 and 16 are as shown in FIG. 2(a) or (b).

In other words, for an input at an intermediate brightness level, the nonlinear circuit 15 is set to raise the level, and the nonlinear circuit 16 is set to lower the level. Note that this relationship may be reversed, and level control may be applied to at least one of the signals.

Further, as shown in FIG. 2(b), if the curved line characteristic is used, the hardware can be reduced.

When processed as described above, the intermediate luminance level signal will not lose its high frequency components even if it is multiplied by the scanning line.

The principle will be explained with reference to FIG.

In Figure 3, the horizontal axis is the position of the scanning line, and the vertical axis is the level.
The back side of the drawing is the time (field) direction. And...○...X...O...is the first
field,...Δ...X...Δ
... is the second field. Further, X is an interpolation signal, and 0 and Δ are original interlaced signals. Normally, a non-interlaced signal can be represented as shown by lines like this. However, according to the present invention, since a nonlinear circuit is used, −・−−X−−・
The signals of each field can be expressed as shown by - and -mu-X--mu-. In other words, a level difference occurs between non-interlaced lines. This means that the high-frequency components in the intermediate brightness level signal remain without being completely eliminated. therefore,
Video exists.

Even if there is a change in brightness between a line in the previous field and the same line in the next field, the change will be artificially created and appear in the image. In the conventional circuit,
When line interpolation was performed, when a high-resolution image moved in the vertical direction, its original spectrum (high-frequency components) decreased, and image distortion appeared due to aliasing components.However, according to the circuit of the present invention, high-frequency components Since it remains, image distortion can be alleviated.

FIG. 4 shows another embodiment of the invention. The previous example is
Although the interpolated signal is created using the signal sum of the upper and lower lines of the interlaced signal, the interpolated signal may be created using the signal of either the upper or lower line. In the example shown in FIG. 4, for example, signals on the same line are used as interpolation signals. In other words, the video signal from the input terminal 11 is transmitted to the nonlinear circuit 15.
For example, the output signal of the nonlinear circuit 16a is supplied to the double speed converter 17 as an interpolation signal. As a result, a video signal in which the scanning lines are multiplied is obtained at the output terminal 18.

[Effects of the Invention] As explained above, according to the present invention, when performing line interpolation to obtain a non-interlaced signal, it is possible to suppress the deterioration of vertical high-frequency components of a moving image, etc., and reduce unnaturalness of the image. can.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing an example of the characteristics of the nonlinear circuit shown in FIG. 1, and FIG. 3 is a diagram for explaining the operation of the circuit of the present invention. Explanatory diagram, 4th
Figure 5 is a circuit diagram showing another embodiment of the present invention, Figure 5 is a diagram showing a conventional non-interlaced circuit, and Figure 6 is a diagram showing the spectrum of an interlaced signal and the signal passband obtained by the sum between lines. It is. 12...Line memory, 13...Adder, 14...
・Coefficient unit, 15.16...Nonlinear circuit, 17...Double speed converter. Applicant's agent Patent attorney Takehiko Suzue Figure 1 (b) Figure 2 Fee λ Kanobango Figure 5

Claims (1)

[Scope of Claims] A non-interlace conversion circuit that obtains a non-interlaced signal by filling in gaps between lines of an interlaced video signal with an interpolation signal, the interlaced video signal and the interpolation signal having a luminance difference at an intermediate luminance level. A non-interlace conversion circuit characterized in that at least one of the two signals is passed through a non-linear circuit and inputted to a double speed converter.