JPH02218059A - System clock generating device - Google Patents

Abstract

PURPOSE:To realize the stable recording and the stable reproduction of information by controlling the frequency of a system clock by the number of revolutions error voltage of a spindle motor outputted from the PLL circuit of the number of revolutions control circuit of the spindle motor. CONSTITUTION:A number of revolutions control system loop-constituted of the PLL circuit 4 phase-compares the number of revolutions reference clock C of the spindle motor 5 outputted from an oscillator 3 and the number of revolutions E of a motor outputted from the motor 5, an outputs error voltage D. On the other hand, the oscillator 1 generates the reference clock A of system. An F/V converter 2 outputs the reference voltage B determined by the frequency of the reference clock A outputted from the oscillator 1. The reference voltage B and the error voltage D are added by an adder 6, and an added result is converted into the frequency by a V/FC 7, and the system block SC is outputted. Thus, frequency difference between a data bit to an information recording medium and the system clock is corrected.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a system clock generator, and more particularly to a system clock generator in an information recording/reproducing apparatus.

Information recording and reproducing devices generally use a clock called a system clock, which is determined by the frequency of the data pulses handled, as a data write reference clock when recording information, and as a data read reference clock when reproducing information. .

Conventionally, a clock oscillator is used in such a system clock generation circuit, and a clock of a constant frequency outputted from this oscillator is used as the system clock.

Since such a conventional system clock has a constant frequency that is completely unrelated to the rotational fluctuations of the spindle motor, the data bits and data bits on the information recording medium during information recording and information reproduction are affected by the rotational fluctuations of the spindle motor. This has the disadvantage that there is a difference in frequency with the system clock, making it impossible to accurately record and reproduce information.

SUMMARY OF THE INVENTION An object of the present invention is to provide a system clock generation device that can generate a system clock while taking into account rotational fluctuations of a spindle motor.

According to the present invention, there is provided a system clock generator for an information recording and reproducing apparatus that records and reproduces information while controlling the rotation of a recording insert through the rotation of a spindle motor, wherein the reference for the rotational frequency of the spindle motor is a rotation control means for generating an error voltage with respect to the frequency and controlling the rotation of the spindle motor according to the error voltage; an oscillation means for generating a reference clock serving as a reference for a system clock; A system clock characterized in that it includes a frequency-voltage conversion means for generating a voltage of a certain level, and a voltage-frequency conversion means for adding this voltage and the error voltage to generate a system clock having a frequency according to the added voltage. A generator is obtained.

Shakuji” Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a system block diagram of an embodiment of the present invention.
This embodiment includes a clock oscillator 1 that generates a clock that becomes a reference clock A of a system clock to be generated, and a frequency/voltage (F/V) converter that generates a voltage B at a level corresponding to the frequency of this clock A. 2 and the rotation reference clock C'! of the spindle motor 5. ! : a generated oscillator 3; a PLL (phase locked loop) circuit 4 that compares the rotation reference clock C and the rotation frequency E of the spindle motor 5 and controls the rotation of the spindle motor 5 according to the error voltage; An adder 6 that adds this error voltage to the output voltage B of the frequency/voltage converter 2, and a voltage/frequency (V/F) converter 7 that generates a clock with a frequency corresponding to this added voltage F. Contains.

The operation of the blocks in FIG. 1 will be explained below.

An information recording and reproducing device that records and reproduces information using an information recording medium uses a spindle motor to rotate the information recording medium. As shown in Figure 1,
A loop is created by a PLL circuit 4 that compares the frequency (phase) of the spindle motor rotation speed reference clock C output from the oscillator 3 and the spindle motor rotation speed clock E output from the spindle motor 5, and outputs the error voltage. There is a spindle motor rotation speed control system consisting of:

For example, in this rotation speed control system, when the rotation speed of the spindle motor 5 is the normal rotation speed, the error voltage is O (zero), and when it is higher than the normal rotation speed, the error voltage is + (plus). It is assumed that the error voltage is - (minus) when the rotation speed is lower than the normal rotation speed, and that the F/V converter 2 and V/V converter 2 are
It is assumed that the gain ratio of the F converter 7 is 1:1.

An oscillator 1 shown in FIG. 1 generates a reference tally clock A that serves as a reference for the system clock. F/V converter 2 is oscillator 1
A reference voltage B determined by the frequency of the reference clock A outputted from the reference clock A is output.

The adder 6 adds the reference voltage B, which is the converted voltage of the reference clock output from the F/V converter 2, and the rotation speed error voltage of the spindle motor 5 output from the PLL circuit 4. The V/F converter 7 generates a system clock with a frequency determined by the added voltage F of the reference voltage B, which is the converted voltage of the reference clock A output from the adder 6, and the rotational speed error voltage of the spindle motor 5. Output S and C.

As shown in the timing chart of FIG.
If the rotation speed error voltage of the spindle motor 5 output from lilli 4 is 0 (zero), the system clocks S and C having the same frequency as the reference clock A, and the rotation speed error voltage of the spindle motor 5 are + (plus). If the system clock S, C has a higher frequency than the reference clock A, if it is - (minus), the system clock S has a lower frequency than the reference clock A.

C is output respectively.

As explained above, according to the present invention, information can be recorded by controlling the frequency of the system clock using the spindle motor rotation speed error voltage output from the PLL circuit, which is the spindle motor rotation speed control circuit. Since it is possible to correct the frequency difference between the data bits for the information recording medium and the system clock between the time and the time of information reproduction, there is an effect that stable information recording and reproduction can be performed.

[Brief explanation of the drawing]

FIG. 1 is a system block diagram of an embodiment of the present invention, and FIG. 2 is a signal waveform diagram of each part showing an example of the operation of the blocks in FIG. Explanation of symbols of main parts 1...System clock reference oscillator 2...
...F/V converter 3...Spindle motor rotation reference oscillator 4...
...PLL circuit 5 ... Spindle motor 6 ... Adder 7 ... V/F converter

Claims (1)

[Claims] (1) A system clock generator for an information recording and reproducing apparatus that records and reproduces information while controlling the rotation of a recording medium through the rotation of a spindle motor, which generates an error voltage with respect to a reference frequency of the spindle motor rotational frequency. Rotation control means for controlling the rotation of the spindle motor according to the error voltage, oscillation means for generating a reference clock serving as a reference for a system clock, and frequency-voltage conversion for generating a voltage at a level corresponding to the frequency of the reference clock. and voltage-frequency conversion means for adding this voltage and the error voltage to generate a system clock having a frequency corresponding to the added voltage.