JPH02223076A - Magnetic disk device - Google Patents

Abstract

PURPOSE:To detect an address mark correctly even when excessive amount of excess readout signals are mixed in an address mark by providing a 2nd count means, a means sending an over signal and a means sending an address mark undetection signal. CONSTITUTION:A discriminator 7 generates a set pulse 8 when a counted value 12 reaches a prescribed value '8' and a timer circuit 10 is operated. The timer circuit 10 generates a timeover signal 16 when 8 clocks are counted to give a command of detecting a SYNC byte to a readout circuit 11. When the SYNC byte is detected, it is informed to a discriminator 15 to input the timeover signal 16 and an address mark undetection signal 14 is generated when the SYNC byte is detected. The address mark undetection signal 14 is informed to a host device, the restorating operation from the host is attained. Thus, the address mark is correctly detected by the retrial from the host device.

Description

[Detailed description of the invention] Kaiketsukuni! The present invention relates to a magnetic disk device, and more particularly to an address mark detection circuit in a magnetic disk device.

2. Description of the Related Art In general, in a magnetic disk device, data is written to or read from a magnetic recording medium according to a predetermined format. The format will be explained using drawings.

FIG. 3 is a schematic diagram showing a data writing format in a general magnetic disk device.

Normally, a data track on which data is written is divided into writing units called records, and data is written in each unit. In Figure 3, data track 3
1 is shown. In other words, a data track on a magnetic recording medium is composed of a plurality of records. The record 32 is composed of a count section 36, a data section 37, and a gap G filling in between them.

Between the count section 36 and the gap G and between the data section 37 and the gap G, the count section 36 and the data section 37 are provided.
SYNG BYTE indicates the starting point of each
) 33 and 35 exist.

In the gap G further before the sync byte 33 in front of the count section 36, there is an address mark 34 without a read signal. This address mark 34 indicates the starting point of the record 32 itself, and plays an important role in the operation of reading data from or writing data to the record 32.

Information on the address to which this record 32 belongs (cylinder, track, record number) and position information of defects existing after this record 32 are written in the counting section 36.

Furthermore, data to be actually written to this record 32' is written in the data section 37.

Next, the operation when reading data from the record 32 will be explained.

First, in order to confirm the position of the record 32, the address mark 34 is detected by an address mark detection operation.

When an address mark is detected, record 3
It is determined that the count section 36 of 2 is present and the count section 36 is read. At this time, the data of the count section 36 is read after the sync byte 33 is read.

When the data in the count section 36 is read, it is determined from the address information whether the record is the one from which the data is to be read. If it is the target record, data is then read from the data section 37. At this time, the data is read after the sync byte 35 is read.

As explained above, the address mark 34 is the record 32
This is an important reference for knowing the location of

Next, a conventional address mark detection circuit, which is a circuit for detecting the address mark 34 shown in FIG. 3, will be explained. FIG. 4 is a schematic diagram showing the configuration of an address mark detection circuit in a conventional magnetic disk drive. In FIG. There is.

The determiner 3 inputs the clock 2 and the data pulse 1, and determines whether the data pulse 1 is within the interval of the clock 2. If it is within the interval, it generates a countdown pulse 5, and the interval is changed. If it is not within the range, a count up pulse 4 is generated.

The addition/subtraction counter 6 subtracts the counted value when it receives the countdown pulse 5 at the countdown terminal CD, and adds the counted value when it receives the countup pulse 4 at the countup terminal CU.

The determiner 7 inputs the count 112 of the addition/subtraction counter 6,
It is determined whether or not the count value 12 has reached a predetermined value, and if the count value 12 has reached a predetermined value, an address mark detection signal 13 is generated.

Next, in FIG. 9, the operation of the address mark detection circuit having such a configuration will be explained using the timing chart of FIG. 5. In FIG.
A data pulse 1, a count up pulse 4, a count down pulse 5, a count value 12 in an addition/subtraction counter 6, and an address mark detection signal 13 are shown.

In the read signal 46 from a magnetic recording medium (not shown), there is an address mark 34 where the read signal is missing. Further, in the address mark 34, a redundant read signal 48 may sometimes be generated as shown in the figure due to disturbance noise or medium defects.

Clock 2 is a signal that serves as a reference for the operation of the address mark detection circuit, and is usually a signal having the same frequency as the highest frequency of the data write signal.

Data pulse 1 is a signal obtained by converting the read signal 46 into a pulse.

The address mark 34 exists in the gear G, but since the gap G is written at the highest frequency of the data write signal, the frequency of the data pulse 1 that read the gap G becomes the same as the frequency of the clock 2. For this reason, gear tube G
Inside, data pulse 1 always exists within the interval of clock 2. On the other hand, since the data pulse 1 does not exist in the address mark 34 except for the surplus read signal 48, the data pulse 1 does not exist within the interval of the clock 2.

As described above, the determiner 3 generates the countdown pulse 5 in the gear G, and generates the countup pulse 4 in the address mark 34 when the signal is other than the surplus read signal 48. Therefore, the count value of addition/subtraction counter 6 is 12
remains as [0] during gear knob G, and address mark 2
In 34, ' I J -' 2 J -''' 3
When the count value 12, which is added as J -' 4 J..., reaches a predetermined reference value rNJ, it is determined that the address mark 34 has been detected, and the address mark detection signal 13 is generated. .

-A-wise, this address mark 34 is a 24-clock data loss location, and the address mark detection circuit determines it as an address mark when it counts 16 clocks of data loss, taking into account the generation of surplus read signals. In this case, which is often the case, the allowable surplus readout signal 48 in the address mark 34 is for 3 clocks, and if the surplus readout signal 48 for more than 3 clocks is mixed in, the address mark cannot be detected. .

Note that if the surplus read signal 48 is mixed in for four clocks, it is unstable whether the address mark can be detected correctly or not, so the range that can be reliably detected is up to three clocks.

However, in the address mark detection circuit described above,
If excessive read signals are mixed into the address mark, it will no longer be possible to detect it as an address mark. Therefore, if the address mark cannot be detected correctly in this way, conventional magnetic disk drives will judge that the record does not exist and will not read the data.
The drawback is that the data in the record may not be readable.

SUMMARY OF THE INVENTION An object of the present invention is to provide a magnetic disk device that can correctly detect address marks even when excessive read signals are mixed into the address marks.

Composition of the Invention The magnetic disk device according to the present invention has a plurality of missing points of data pulses when read, an address mark indicating the start point of a record, which is a recording unit of data on a magnetic recording medium, and a plurality of missing points when read. A magnetic recording medium having a plurality of records including data to be a data pulse and sync information indicating the starting point of this data, and a clock pulse depending on whether or not a data pulse is sent out from the magnetic recording medium in response to a clock pulse. A magnetic disk device comprising a first counting means for increasing or decreasing a numerical value, and a sending means for sending an address mark detection signal when the counted value of the first counting means reaches N (N is an integer), The count value of the first counting means is M (M is an integer with the same sign as N, and IMI<I
a second counting means that performs a counting operation in response to the clock pulses after reaching NI ); and a second counting means that sends out an over signal when the counted value reaches a value in the vicinity of NM or more; and means for transmitting an address mark non-detection signal when the sync information is detected after the over signal is transmitted.

"X ship" Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing the configuration of an address mark detection circuit of an embodiment of a magnetic disk device according to the present invention.
In FIG. 0, parts equivalent to those in FIG. 4 are designated by the same reference numerals. In FIG. It has a configuration in which a determiner 15 is added.

Determiner 3 receives data pulse 1 and clock 2 as input,
If data pulse 1 is present within the interval of clock 2, a countdown pulse 5 is generated, and if data pulse 1 is not present within the interval of clock 2, a countup pulse 4 is generated.

The addition/subtraction counter 6 adds the counted value when the count up pulse 4 is input, and subtracts the counted value when the count down pulse 5 is input.

The determiner 7 inputs the count value 12 of the addition/subtraction counter 6,
When the count value 12 reaches a constant value, a set pulse is generated. Further, this determiner 7 generates a reset pulse 9 and an address mark detection signal 13 when the count value of the addition/subtraction counter 6 is added up from a constant value and reaches a reference value.

The timer circuit 10 receives the clock 2 and starts counting the number of clocks 2 in response to the input of the set pulse 8. In addition, this timer circuit resets the count value to "0" by inputting the reset pulse 9, but if the count value exceeds a certain value without being reset, a time over signal 1 is issued.
Generate 1.

The read circuit 11 receives the data pulse 1 as an input, and detects a sync byte when the time-over signal 16 is input. When the read circuit 11 detects a sync byte, the determiner 15 is notified of this fact.

When the time-over signal 16 is input and the sync byte is detected, the determiner 15 outputs an address mark non-detection signal 1.
4.

Next, the operation of the address mark detection circuit shown in FIG. 1 will be explained using the timing chart of FIG. 2. In FIG. Count value 12
, a set pulse 8, and a time-over signal 16 are shown, indicating a case where an excessive read signal is mixed into the address mark (see FIG. 5) portion.

An address mark 34 is present in the read signal 46, and an excessively redundant read signal 48 is present within the address mark 34. In addition, the address mark 34
Inside, a count up pulse 4 is generated, but a count down pulse 5 is also generated due to the surplus read signal 48.

The count value 12 of the addition/subtraction counter 6 cannot reach the specified value "16" at which the determiner 7 determines that it is an address mark due to the excessive surplus read signal 48, and as a result, the address mark 34 cannot be detected. Here, when the count value 12 reaches a certain value "8", the determiner 7 generates the set pulse 8 (TI) and operates the timer circuit 10.

Furthermore, in this case, since the count value 12 does not reach the specified value "16" that is determined as an address mark, the reset pulse 9
Therefore, the timer circuit 10 generates the time-over signal 16 after counting eight clocks (T2). This time-over signal 16 instructs the readout circuit 11 to detect the sync byte. do.

If the address mark 34 is a true address mark, there will always be a count section after it, so a sync byte indicating its starting point will be detected. In other words, if the time-over signal 16 is generated and the sync byte is detected, it can be determined that the original address mark was present but could not be detected.

By notifying the higher-level device of this non-detection of the address mark as the address mark non-detection signal 14 (Figure 1), the higher-level device can take appropriate recovery measures such as re-detecting the address mark by retrying. It will become. Therefore, if the address mark is detected again, there is less possibility that the surplus read signal will become excessive, and therefore the address mark can be detected correctly.

On the other hand, if there are few or no surplus read signals in the address mark 34, the count value 12 can reach "16" after the set pulse 8 is generated, so the reset signal 9 is generated and the address mark By sending the detection signal 13 to the higher-level device, it is possible to notify that the address mark has been correctly detected.

Also, if no sync byte is detected after the time-over signal 16 is generated, there is no address mark and a record exists! - It will be judged that there is no such thing.

In this embodiment, the possibility of the existence of an address mark is determined based on whether or not a sync byte is detected after the time-over signal is generated. ) is detected or not. Generally, the recorded content of the data section is different from gaps and the like, and is a random pattern, so if this is detected, the same effect as the present embodiment of using the sync byte can be obtained.

Additionally, this type of magnetic disk device generally suffers from defect skipping (defect skipping).
g), the count value that is the timing to generate the set pulse must be greater than the clock count value for the maximum length of the medium 7 defect, and smaller than the count value that is determined as an address mark. Must be.

Furthermore, in this embodiment, there are eight clocks from when the timer circuit is set by the set pulse until it generates the time-over signal. This is determined to be the difference between the count value ff1l'16J detected as an address mark and the count value "8" which is the timing to generate a set pulse, but the same effect can be obtained with a larger value. .

However, if the value is too large, the count value up to the sync byte portion after the address mark will be exceeded, and the readout circuit will not be able to detect the sync byte after that, so the value must be set so that such a value does not occur.

As explained above, in the present invention, even if the address mark detection circuit detects a missing data point that cannot be determined as an address mark, if a sync byte is detected after that point, there is a possibility that an address mark existed. By determining that there is an address mark and notifying the higher-level device to that effect, it becomes possible for the higher-level device to perform a recovery operation.This allows the higher-level device to detect the address mark again in a retry, and detect the address mark again. This has the effect of making it possible to detect correctly.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an address mark detection circuit in a magnetic disk device according to an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of each part in FIG. 1,
Fig. 3 is a schematic diagram showing a general write format in a magnetic disk device, Fig. 4 is a block diagram showing the configuration of an address mark detection circuit in a conventional magnetic disk device, and Fig. 5 is an operation of each part in Fig. 4. FIG. Explanation of symbols of main parts 3.7.15... Determiner 6... Addition/subtraction counter 10... Timer circuit 11... Readout circuit

Claims (1)

[Claims] (1) Data that becomes multiple missing data pulses when read and an address mark that indicates the start point of a record, which is a recording unit of data on a magnetic recording medium, and data that becomes multiple data pulses when read, and this data a magnetic recording medium having a plurality of records including sync information indicating a starting point of the magnetic recording medium; and a first count that increases or decreases a count value depending on whether or not a data pulse is sent from the magnetic recording medium in response to a clock pulse. and sending means for sending out an address mark detection signal when the count value of the first counting means reaches N (N is an integer), a second counting means that performs a counting operation in accordance with the clock pulse after the numerical value reaches M (M is an integer with the same sign as N, and |M|<|N|); and the second counting means means for transmitting an over signal when the count value reaches a value near N-M or more; and means for transmitting an address mark non-detection signal when the sync information is detected after the over signal is transmitted. A magnetic disk device comprising: