JPH02224548A - Atm cell exchange circuit network - Google Patents

Abstract

PURPOSE:To facilitate the operation management by using a cell extraction circuit so as to extract only an ATM cell where a condition on an input highway is in agreement with a predetermined condition and inserting the cell to an output highway at an ATM cell insertion circuit. CONSTITUTION:In the case of bypassing an ATM switch 83, a control circuit 85 gives a command to an ATM extraction circuit 21 and an ATM insertion circuit 61 via a control bus 84 at call setting in terms of a 'bypass command' representing a logical channel a of a call to be bypassed and an output logical channel beta. When a channel number alpha is inputted to the circuit 21, the number is outputted to an ATM extraction highway 31, multiplexed with other ATM cell at a cell multiplex circuit 81 and outputted to an ATM insertion highway 82. The circuit 61 receives the ATM cell, detects the channel number alpha, adds a logical channel beta on the ATM output highway 71 to call the channel with highest priority and gives an output. Thus, the communication line is ensured to an important call such as a call to a police station or a call to a fire station.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to ATM cell switching networks.

[Conventional technology]

Conventional digital switching equipment has a switching function using a circuit switching method or a packet switching method.

In the case of circuit-switched systems, the time slots have a time-division multiplexed highway, with fixed frames (typically 125μ
One call occupies a time slot at a predetermined time position every (second period). In the line switching system, switching operations between incoming lines and outgoing lines determined by call control signals are performed by hardware.

On the other hand, in the case of the packet switching method, the packet length is variable and the maximum length is about 4000 bytes.
In many cases, software in a processing device performs packet exchange based on the contents of each packet.

In recent years, CCITT or the Institute of Electronics, Information and Communication Engineers, etc.
The switching method is attracting attention as a switching method different from the circuit switching method and the packet switching method.

Like the line switching system, ATM implements switching operations using hardware. The ATM highway is different from the circuit-switched highway. In ATM, information is transferred in a type of fixed-length (approximately 40 to 120 bytes) packets called cells. Cell locations are determined on ATM highways, and cells are entered only when information to be sent is generated. When there is no information, the cell becomes an empty cell.

ATMs that perform cell switching on such ATM highways
Many research results regarding the M switch have been presented at domestic and overseas academic conferences in recent years.

[Problem that the invention seeks to solve]

In the circuit-switched power system, call loss occurs when a call is set up, but if a call is accepted every time and the time slot (or channel) is occupied by that call, the connection state of the call is completely unaffected by other calls. On the other hand, unlike the circuit switching method, the ATM cell switching method is based on a so-called statistical multiplexing method in which one cell location on an output highway is shared by cells to be output from multiple input highways to that output highway. ing. Therefore, in the ATM cell switching system, even if a call is accepted, it is not possible to secure dedicated resources for that call on the output highway, so even during communication there is a constant influence from other calls (if the traffic of other calls increases, competition for the output highway may occur). conditions will worsen).

However, calls that must minimize the impact of other calls (
For example, there is a need for an ATM cell switching network that can specially handle such calls (for example, communications for police, fire departments, VIPs, etc.), but such a network does not currently exist, and no research results have been published. There wasn't.

It is an object of the present invention to transfer ATM cells related to a particular call to AT
By bypassing the M switch, the influence of other calls is minimized, and this also secures a telephone line for very important calls such as police calls, fire calls, government calls (disaster notifications, etc.). It's about making it easier.

[Means for solving problems]

The ATM cell switching network of the present invention is comprised of a plurality of input highways for transferring ATM cells, a plurality of output highways for transferring the ATM cells, and an ATM switch accommodating the input highways and the output highways. In the ATM cell switching circuit network, an ATM cell extraction circuit is provided on the input highway, and an ATM cell insertion circuit is provided on the output highway, and the ATM cell extraction circuit and the ATM cell insertion circuit are connected,
Only ATM cells whose conditions on the input highway match predetermined conditions are extracted by the cell extraction circuit, and
The configuration is such that the M cell is inserted into the output highway from the M cell insertion circuit.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

Each of the n ATM input highways 11 to 1n is an ATM
The ATM cell extraction circuits 21 to 2n output to the ATM extraction highways 31 to 3n and the switched highways 41 to 4n, respectively, and the ATM extraction highways 31 to 3n connect to the cell multiplexing circuit 81. The switched byways 41 to 4n are connected to the ATM switch 83. Cell ATM switch 83 outputs to switch output highways 51-5n, and switch output highways 51-5n are connected to ATM cell insertion circuits 61-6n, respectively. The cell multiplexing circuit 81 outputs to an ATM insertion highway 82, and the ATM insertion highway 82 is multi-connected to the ATM cell insertion circuits 61 to 6n. The ATM cell insertion circuits 61 to 6n are connected to the ATM output highways 71 to 6n, respectively.
Output to 7n. The control circuit 85 includes ATM cell extraction circuits 21 to 2n, ATM cell insertion circuits 61 to 6n, and AT
A bus connection is made via an M switch 83 and a control bus 84.

FIG. 2 is a block diagram of the ATM cell extraction circuit 21.

The ATM cell extracting circuits 22 to 2n also have a similar configuration.

In FIG. 2, the ATM input highway 11 is connected to a receiving circuit 101, and the output of the receiving circuit 101 is dually connected to a transmitting circuit 102 and a cell detection circuit 104. The transmitting circuit 102 outputs to the switch highway 41. The output of the cell detection circuit 104 is transmitted via the transmission circuit 105 to
Output to ATM extraction highway 31. Control bus 84 connects to interface circuit 106 , and the output of interface circuit 106 connects to control memory 103 .

Control memory 103 and cell detection circuit 104 are interconnected.

FIG. 3 is a block diagram of the ATM cell insertion circuit 61. The ATM cell insertion circuits 62 to 6n also have a similar configuration.

In FIG. 3, the switch output highway 51 is input to a receiving circuit 201, and the output of the receiving circuit 201 is connected to a first buffer 202. The ATM insertion highway 82 is input to the cell selection circuit 203. Control bus 84 connects to interface circuit 206 , and the output of interface circuit 206 connects to cell selection memory 205 . Cell selection circuit 203 and cell selection memory 205 are interconnected. Further, the output of the cell selection circuit 203 is connected to a second buffer 204. The output of the first buffer 202 and the output of the second buffer 204 are connected to the cell multiplexing circuit 2.
07, and an ATM output highway 71 is output from the cell multiplexing circuit 207.

Next, the overall operation will be explained. Mainly refer to FIG. 1, and also refer to FIGS. 2 and 3 as appropriate.

In the following description, n ATM input highways 11-in, ATM cell extraction circuits 21-2n, and ATM
Extraction Highway 31-3n, Switch Highway 41
~4n, switch output highways 51~5n, ATM cell insertion circuits 61~6n, ATM output highways 71~7n
The operation when the ATM input highway 11, ATM cell extraction circuit 21, ATM extraction highway 31, switch highway 41, switch output highway 51, ATM cell insertion circuit 61, and ATM output highway 71 are selected from among them will be explained.

First, the case where normal ATM cell exchange is performed will be explained.

The ATM cell on the ATM input input way 11 is input to the ATM cell extraction circuit 21, and within the ATM cell extraction circuit 21, it is output to the switch highway 41 via the reception circuit 101 and transmission circuit 102 shown in FIG. and ATM switch 8
Enter 3.

The ATM switch 83 checks the logical channel number displayed in the header of the input ATM cell, and switches the control circuit 8
Based on the information set in advance from 5, output is made to any one of the switch output highways 51 to 5n. Here, it is assumed that the signal is output to the switch output highway 51.

The ATM cell output to the switch output highway 51 is
The signal is input to the ATM cell insertion circuit 61, and within the ATM cell insertion circuit 61, it is input to the first buffer 202 via the reception circuit 201 in FIG. be done. Note that in the cell multiplexing circuit 207, the output of the first buffer 202 and the output of the second buffer 204 are connected, and if there is an ATM cell to be inserted into the second buffer 204,
The ATM cells in the second buffer 204 are read until they become empty, and the A to be inserted into the second buffer 204 is
If there is no TM cell, the AT
Performs an operation to read the M cell.

Next, A for calls that bypass the ATM switch 83.
The case of a TM cell will be explained.

Generally, a call with a certain logical channel number α on the ATM input way 1x (x=1 to n) is bypassed by the ATM switch 83 and
n) When outputting as a certain logical channel number β on
For the ATM cell extraction circuit 2x and the ATM cell insertion circuit 6y, the ATM input highway number X of the call to be bypassed, the logical channel number α thereon, and the logical channel number β on the ATM output highway number Displaying “
An instruction to that effect is given using the "Bypass Instruction Command".

Here, a case will be described in which a call with a certain logical channel number α on the ATM input way 11 is outputted as a logical channel number β on the ATM output highway 71 by bypassing the ATM switch 83. In this case, the control circuit 85, via the control bus 84 at the time of call setup,
The ATM input highway number "1" of the call to be bypassed is sent to the ATM cell extraction circuit 21 and the ATM cell insertion circuit 61.
'', the logical channel number α thereon, the ATM output highway number "1", and the logical channel number β thereon, are displayed using a [bypass instruction command] to issue an instruction to that effect.

In the ATM cell extraction circuit 21, via the control bus 84,
When the interface circuit 106 in FIG. 2 determines that the bypass instruction command has been received, the control memory 10
In addition, the ATM cell insertion circuit 61 receives a "bypass instruction command" in which the ATM output highway number is displayed as "1" via the control bus 84. If the interface circuit 206 of FIG. Write.

Here, when an ATM cell having the physical channel number α of the ATM input Kabaka Highway 11 is inputted, it is inputted to the ATM cell extraction circuit 21, and in the ATV cell extraction circuit 21, the second
The signal is input to the cell detection circuit 104 via the receiving circuit 101 shown in the figure. The cell detection circuit 104 compares the logical channel number of the input ATM cell with the logical channel number stored in the control memory 103, and only when they match, sends the input ATM cell to the ATM input highway. A number is added and output to the ATM extraction highway 31 via the transmission circuit 105. Therefore, the ATM cell having the logical channel number α is added with the ATM input highway number “1” and output to the ATM extraction highway 31.

Note that the ATM cell with the logical channel number α is also output to the switch highway 41 via the transmitting circuit 102 in FIG. 2, but since the control circuit 85 has not issued a connection instruction to the ATM switch 83, It is discarded by the ATM switch 83.

The above-mentioned ATM output from ATM extraction highway 31
The cell is multiplexed with ATM cells from other ATM extraction highways 32 to 3n in a cell multiplexing circuit 81, and the ATM
It is output to the insertion highway 82.

In the ATM cell insertion circuit 61, the ATM insertion highway 8
2, the above-mentioned ATM cell is inputted to the cell selection circuit 203 of FIG. The cell selection circuit 203 selects the AT to be inserted written in the cell selection memory 205.
With reference to the ATM input highway number of the V cell and the logical channel number thereon, the ATM input highway number written in the cell selection memory 205 among the ATM cells input from the ATM insertion highway 82 and the upper Detects an ATM cell in which the same information is displayed as the logical channel number on the ATM cell, deletes the ATM input highway number and logical channel number, adds the logical channel number on the ATM output highway, and write to the buffer 204 of. When the above information is written in the cell selection memory 205, the ATM cell displaying the ATM input highway number "1" and the logical channel number α inputted from the ATM insertion highway 82 is detected;
ATM input highway number “1” and logical channel number α
and the logical channel number β on the ATM output highway 71 is added to the second buffer 204 in FIG.
write to. When an ATM cell is written to the second buffer 204 as described above, the cell multiplexing circuit 207 reads this cell from the second buffer 204 with the highest priority, and
Output to TM output highway 71.

When disconnecting a call to be bypassed, the control circuit 85 connects the control bus 8
4, the ATM input highway number "1" and the logical channel number α, and the ATM output highway number "1"
and the logical channel number β are sent to the ATM cell extraction circuit 21 and the ATM cell insertion circuit 61, and upon reception of this command, the
The M cell extraction circuit 21 and the ATM cell insertion circuit 61 erase the data related to the corresponding call written in the control memory 103 of FIG. 2 and the cell selection memory 205 of FIG. 3, respectively. Due to this erasure, even if an ATM cell with logical channel number α arrives on the ATM input highway 11 next time, it will not be bypassed.

[Effects of the Invention] The present invention minimizes the influence of other calls by bypassing the ATM switch for ATM cells related to a specific call. This has the effect of making it easier to secure communication lines for very important calls such as (e.g.).

Such effects are essential when introducing an ATM switching system into a public network, and by implementing the present invention, the advantages of the ATM switching system, such as economic efficiency and ease of operation management, can be realized. , it will be possible to implement it on public networks.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is an AT
A block diagram of the M cell extraction circuit, and FIG. 3 is a block diagram of the ATM cell insertion circuit 61. 11~1n...ATM input highway, 21~
2n...ATM cell extraction circuit, 31-3n...
...ATM extraction highway, 41-4n...
・Switch input highway, 51-5n...Switch output highway, 61-6n...ATM
Cell insertion circuit, 71-7n...ATM output highway, 81...Cell multiplex circuit 82...
-ATM insertion highway, 83...ATM switch, 84...control bus, 85...-control circuit, 101...reception circuit, 102...
...Transmission circuit, 103... Control memory, 104
... Cell detection circuit, 105 ... Transmission circuit, 106 ... Interface circuit, 201.
...Receiving circuit, 202...First buffer, 203...Cell selection circuit, 204...
...Second buffer, 205...Cell selection memory, 206...Interface circuit, 207...
...Cell multiplex circuit.

Claims (1)

[Claims] a plurality of input highways for transferring ATM cells;
a plurality of output highways for transferring TM cells and an ATM that accommodates the input highway and the output highway;
an ATM cell switching circuit network comprising a switch, an ATM cell extraction circuit provided on the input highway and an ATM cell insertion circuit provided on the output highway, wherein the ATM cell extraction circuit and the ATM cell insertion circuit The ATM cell is characterized in that only ATM cells whose conditions on the input highway meet predetermined conditions are extracted by the cell extraction circuit and inserted into the output highway from the ATM cell insertion circuit. switching network.