JPH0222537B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for forming interdigital electrodes having an electrode width in the submicron range.

(Prior Art and Problems to be Solved by the Invention) In recent years, in semiconductor devices and the like, a technology for forming electrodes having a width in the submicron region has been required in order to improve the focusing degree and high speed. However, when it comes to forming interdigital electrodes with line widths in the submicron range, the electrode width is different from the exposure width due to the density of the electrodes due to the proximity effect of exposure, making it impossible to form good interdigital electrodes. There were some problems (for example, "Proceedings of the 26th Applied Physics Association Conference", 29p-s-6, Spring 1979).

An object of the present invention is to provide a method for forming interdigital electrodes with good electrode width accuracy.

(Means for Solving the Problems) According to the present invention, there is a step of forming a first pattern of simple repeated lines and spaces, and a step of forming a first pattern of a resist covering other than the external connection electrode portion. forming a second resist pattern, and using the second resist pattern as a mask, removing the lines of the first pattern existing in the external connection electrode section; a step of transforming the resist pattern into a third resist pattern that covers only the outside; a step of depositing a conductive material using the third resist pattern and the first pattern; A method for forming interdigital electrodes is obtained, which includes the step of removing the pattern.

(Example) Hereinafter, a method for forming interdigital electrodes according to the present invention will be described in detail with reference to the drawings.

Assume that we want to obtain interdigital electrodes as shown in FIG. Here, 1 is an external connection electrode, 2 is an interdigital electrode, and 3 is an abutting portion. Interdigital electrode width is 1
When forming conventional interdigital electrodes of micron size or larger, exposure is performed according to the pattern shown in Figure 1.
A resist pattern as shown in the figure was formed. However, as the width of the interdigital electrodes becomes finer in the submicron range, the interaction between the exposure patterns of the interdigital electrodes (the influence of exposure fog) cannot be ignored. (This is called the proximity effect). That is,
As shown in Fig. 8a, even though the width of the interdigital electrode is on the order of submicrons, if the shaded area in Fig. 1 is exposed and developed in the same way as when the width is 1 micron or more, as shown in Fig. 8a, In areas where the interdigital electrodes are close to each other, such as the shaded area, the electrode width becomes thicker as shown in 701, and due to normal process variations such as exposure and development variations, the electrode fingers are partially connected to their neighbors. more likely to become defective. On the other hand, if the overall exposure amount is reduced and the electrode fingers are exposed, the connection of the electrode fingers will not occur, but as shown in 702 in Figure 8b, the electrode width next to the abutting portion will become narrower, and the exposure/development time will be reduced. There has been a problem in that the electrode fingers tend to be partially disconnected due to normal process variations such as variations, making them more likely to be defective.

The present invention solves this proximity effect problem by doing the following.

First, a resist is applied onto a substrate, exposed and developed to form a first pattern in which lines 11 and spaces 12 are simply repeated as shown in FIG.
Since such a line-and-space pattern requires only one pattern parameter to be controlled, it is relatively easy to form even if the pattern width is on the order of submicrons.

Next, a resist is applied on top of this, and the second part of the resist covers the area other than the external connection electrode part as shown in Figure 3.
The pattern is formed by exposure and development. Here 1
4 is a region where the resist remains, and 15 is a region (space) from which the resist is removed. At this time, the alignment between the first pattern and the second pattern is performed as shown in FIG.

Next, using this second resist pattern as a mask, lines of the first pattern existing in the external connection electrode section are removed. This method is
There are various types. When the first pattern is formed from a resist, it is also possible to perform this by appropriately selecting the resist for the first pattern and the resist for the second pattern. For example, if a line-and-space pattern of PMMA resist is used as the first pattern, a second resist pattern is formed using AZ1350 (trade name, Shippray Co., Ltd.), and then deep ultraviolet rays are irradiated all at once, the first pattern is Since only the first resist pattern present in the external connection electrode section is exposed using the second resist pattern as a mask, it is also possible to develop this (with a developer of the resist of the first pattern). (e.g.
J.Vac.Sci.Technol., Vol.16, No.6, 1669-1671
Page, 1979).

Also, the first simple repeat line and
When a space pattern is formed by etching a base layer using a resist pattern formed by exposure and development as a mask, the resist for forming the second pattern can be selected relatively arbitrarily, and this second resist pattern can be It is also possible to perform etching as a mask.

Next, the second resist pattern is exposed and developed so as to become a third resist pattern that covers only the abutting portion and the outside of the device area, as shown in FIG. (It is desirable that the developing conditions at this time be weak also when forming the second resist pattern).
FIG. 6 shows the state of alignment of this third resist pattern. Here, 17 is a region where the resist remains, and 18 is a region (space) from which the resist is removed.

Next, using this third resist pattern and the first pattern, a conductive material is deposited by a lift-off method or an electrodeposition method according to the space area of these patterns, and then these pattern materials are removed. By doing so, a desired interdigital electrode can be obtained.

Note that if the second and third resist patterns shown in FIGS. 3 and 5 are formed using one mask as shown in FIG. 7, the desired interdigital electrodes can be formed with only one alignment. . Here, 31 is the opaque part,
32 is a transparent portion, and 33 is a semi-transparent portion. The reason is that if you expose with such an exposure mask, the first
In the second development, a second pattern as shown in Figure 3 is obtained, and in the second development, a third pattern as shown in Figure 5 is obtained.
This is because a pattern of .

(Effects of the Invention) As described above, according to the present invention, the pattern with the narrowest line width is formed from a simply repeated line and space pattern.
There is no adverse effect of the proximity effect due to exposure fog, and it is possible to form interdigital electrodes with good line width accuracy.

[Brief explanation of drawings]

Figure 1 is a plan view showing the desired interdigital electrodes;
The figure is a plan view showing the first pattern, and the third figure is a plan view showing the second pattern.
FIG. 4 is a plan view showing a state in which the lines of the first pattern in the space part of the second pattern have been removed. FIG. 5 is a plan view showing the third pattern. The figure is a plan view showing the state of the pattern before applying the conductive material, and Figure 7 is the second pattern.
FIGS. 8a and 8b are plan views showing examples of defective patterns when formed by the conventional method. FIGS. In the figure, 1 is an electrode for external connection, 2 is an interdigital electrode,
3 is a butting part, 11 is a line part of the first pattern, 12 is a space part of the first pattern, 14
15 is the resist remaining part of the second pattern, and 15 is the second pattern.
17 is the resist remaining part of the third pattern, 18 is the space part of the third pattern, 31 is the opaque part of the exposure mask, 32 is the transparent part of the exposure mask, 33 is the exposure mask , 701 is a part near the interdigital electrode, and 702 is a finger electrode part.

Claims (1)

[Claims] 1 Step of forming a first pattern of simple repeated lines and spaces, forming a second pattern of resist covering areas other than the external connection electrode portion on top of the first pattern, and masking the second resist pattern. The first electrode existing in the external connection electrode part as
a step of removing lines of the pattern, a step of transforming the second resist pattern into a third resist pattern that covers only the abutting portion and the outside of the device area, and a step of covering the third resist pattern with a conductive material. A method for forming interdigital electrodes, comprising the steps of: depositing the third resist pattern; and removing the third resist pattern.