JPH0222569B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an optically controlled semiconductor switch, which is particularly used for ignition of a bidirectional thyristor with a gate electrode (hereinafter referred to as TRIAC), and is a monolithic switch that uses light as energy for a trigger signal. The present invention relates to bidirectional optical semiconductor switches in the form of integrated circuits.

A conventional device of this kind is a photo-ignition reverse blocking three-terminal thyristor (hereinafter referred to as photo-ignition reverse blocking type thyristor) as shown in Figure 1b.
SCR) is known to be connected in anti-parallel.
Signals must be supplied to each of the SCRs 16 and 17 by light irradiation, and in particular, in those manufactured as photocoupled devices that also include a light emitting part, one or two light emitting diodes (hereinafter referred to as LEDs) and the photoSCR2
Each pellet chip must be mounted (mounting, bonding, etc.) with consideration to optical trigger sensitivity and dielectric strength, which requires many complicated work processes and is also economically problematic. In addition, when providing a so-called zero cross trigger function that conducts only near zero volts of the AC power supply voltage, two photo SCRs are used as shown in Figure 2a.
Since the gate and cathode electrodes between 16 and 17 are completely different in potential, there are two sets of transistors.
A component configuration consisting of a diode and a bias resistor is required. Furthermore, a capacitor is often inserted between the gate and cathode as a measure to prevent DV/DT false firings that occur when turning on the AC power supply or due to the steeply applied surge voltage that is superimposed on the AC power supply voltage. However, for the same reason as mentioned above, there were various essential drawbacks, such as the need for attachment at two locations as shown in FIG. 2b.

By performing impurity diffusion multiple times in a silicon wafer, the present invention creates a unidirectional PNPN switch consisting of one equivalent transistor and two other equivalent transistors connected in common with each other for current positive feedback. It features a monolithic integrated circuit structure of anti-parallel equivalent diodes connected to each switch, and its purpose is to provide one chip lateral for TRIAC ignition with one trigger light illumination junction and one pair of gate/cathode terminals. The objective is to provide a forwarding switch.

Figure 1a shows the basic circuit configuration in which a light-igniting semiconductor switch is connected between the main electrode _T1 and the gate electrode G for turning on a bidirectional thyristor with gate electrode (TRIAC). b shows a conventional type of this optical ignition semiconductor switch (photo-SCR anti-parallel connection structure). In the figure,
1 is a bidirectional three-terminal thyristor with a gate electrode (TRIAC); 2 is the main electrode T ₁ of the TRIAC 1 and a connection terminal with a load impedance 9; 3 is TRIAC1
The gate electrode G, 4 of the TRIAC 1 is connected to the AC power source 10 at the other main electrode T ₂ of the TRIAC 1. 5 is a bidirectional semiconductor switch that is turned on by the optical signal 12;
6 and 7 are two AC electrodes of the light ignition bidirectional semiconductor switch 5, 8 is a current limiting resistor, 11 is a light emitting diode (LED), 13 is a current limiting resistor, 14
15 is a DC power supply, 15 is a current on/off switch for the LED, 16 is a gate electrode 18, and optical signal 1
The photo SCR 2a is electrically conductive, and the photo SCR 17 has a gate electrode 19 and is electrically conductive based on the optical signal 12b.

In addition, FIG. 2a shows the conventional type, that is, the photo
A light-igniting semiconductor switch that uses an anti-parallel SCR connection structure with a zero-cross trigger function that conducts at the zero-cross point of the AC power supply voltage.
Further, in FIG. 2b, a capacitor and a resistor are inserted between the gate and cathode to prevent dv/dt erroneous firing. In the figure, 20 and 21 are NPN transistors, 24 and 25 are diodes, and 22 and 23 are NPN transistors.
26, 27, 28 are bias resistors for transistors 20, 21, 29 is a zero-cross trigger function circuit block composed of these parts, 30, 31 are photo-SCRs 17 and 16, respectively, SCR17,1
Connect between the gate and cathode of 6 and photoSCR1
A capacitor 32 bypasses the displacement charge flowing through the internal junction capacitances 7 and 16, and a gate-cathode shorting resistor 22 and 23 constitute the capacitor 32.
This is a DV/DT false ignition prevention circuit block.

3a to 3c show one embodiment of the present invention. FIG. 3a is an equivalent circuit of a light-igniting bidirectional semiconductor switch according to the present invention, and FIG. Figure 3c shows a cross-sectional model of a monolithic light-ignited bidirectional semiconductor switch constructed by impurity diffusion, and Figure 3c shows a cross-sectional model in which the gate-cathode short-circuit resistor is constructed as an ion-implanted resistor, respectively, corresponding to the equivalent connection circuit. This is what I wrote down. 6 and 7 are two AC electrodes of a light-igniting bidirectional semiconductor switch according to the present invention; 33;
34 is a PNP equivalent transistor, 35 is an NPN equivalent transistor, 36 and 37 are equivalent diodes, 3
8 is an emitter electrode of the equivalent NPN transistor 35, which is connected to the anode electrodes of the equivalent diodes 36 and 37. 39 is the base electrode of the equivalent NPN transistor 35, which is also the collector electrode of the PNP equivalent transistors 33 and 34. 40 is the emitter-base short circuit resistance of the equivalent NPN transistor 35, and 42 is the P-type single crystal substrate 4.
1. Before the epitaxial growth process, a selectively diffused N ⁺ buried layer with a high impurity concentration is used to lower the lateral resistance in the active region directly under the base and collector regions of the equivalent transistors 33, 34, and 35, and to reduce the lateral resistance of the P substrate. The purpose is to prevent parasitic operation between the two.
43 is an N-type epitaxial layer, which is the base layer of the equivalent transistors 33 and 34, and the equivalent transistor 35.
form a collector layer. 44 and 45 are N-type epitaxial layers grown in vapor phase on a P-type single crystal substrate 41 at the same time as 43, and are equivalent diodes 36 and 3.
7 cathode layer. 41-a and 41-b are P-type films passing through the N-type epitaxial layer from the wafer surface.
A P-type isolation trench is diffused into the monocrystalline substrate 41 and is formed continuously around selected regions of the N-type epitaxial layer. Numerals 46 and 47 are P layers formed simultaneously with 48 by high-temperature diffusion of P-type impurities, and are emitter layers of the equivalent PNP transistors 33 and 34. Further, 48 is the transistor 33,
34 and a diffusion layer corresponding to the base layer of the equivalent NPN transistor 35. 50,5
1 is an N ⁺ layer formed by diffusion of high concentration of N type impurity at the same time as 49, and the equivalent diode 36, 3
49 is a diffusion layer provided to prevent rectifying contact between the wiring metal (generally aluminum, which is a P-type impurity) and the N-type layers 44 and 45, which have high resistivity, and to obtain good ohmic contact. The P diffusion layer 4 serves as the emitter diffusion layer of the equivalent NPN transistor 35.
Provided within 8. 53 and 54 are respectively P diffusion layers 4
6 and the N ⁺ diffusion layer 50 are connected to each other, and the P diffusion layer 47 and the N ⁺ diffusion layer 51 are connected to each other in an electrically conductive manner.
This portion corresponds to a wiring metal that electrically conductively connects the N + diffusion layer 49 and the N ⁺ diffusion layer 49 .

The operation of FIGS. 3a and 3b, which are embodiments of the present invention configured in this way, will be explained. Now, the trigger light signal 12 from the LED is applied to the two AC electrodes 6 and 7 so that the electrode 6 is positive and the electrode 7 is negative, and the trigger light signal 12 is applied to the base-collector junction of the equivalent NPN transistor 35. It consists of an equivalent PNP transistor 33 and an NPN transistor 35 which are forward biased through a diode 37 when the area is irradiated.
As a result of the increase in leakage current and the positive feedback effect, the PNPN switch turns into a conductive state, and the switch current flows from electrode 6 to PNP transistor 33 to NPN transistor 35 to diode 37 to electrode 7. Also,
Equivalent when the polarity of the AC power source is reversed and electrode 6 is applied in the negative direction and electrode 7 is applied in the positive direction.
A PNPN switch consisting of a PNP transistor 34 and an equivalent NPN transistor 35 is forward biased through a diode 36. In this state,
As before, when the trigger light signal 12 is irradiated to the base-collector junction of the equivalent NPN transistor 35, due to the leakage current positive feedback effect,
The PNPN switch conducts, and as a result,
A switch current flows through the path of electrode 7 → PNP transistor 34 → NPN transistor 35 → diode 36 → electrode 6. In this way, the optical ignition semiconductor switch according to the present invention constitutes a bidirectional switch by having the equivalent transistor 35 which is always forward biased in the same direction and irradiated with the same optical signal regardless of the reversal of the polarity of the applied AC voltage. It is characterized by

FIG. 3c is a model showing a cut portion of a wafer in which an emitter-base short-circuit resistor 40 of an equivalent NPN transistor 35 is built by ion implantation, and the corresponding equivalent circuit is shown. 55 is P provided for making ohmic contact at the resistance lead-out part.
It is the foundation of shape diffusion. 56 is the P region of the high-energy ion implantation resistor, and 57 is the resistor lead-out portion 5.
5 and the N ⁺ emitter diffusion layer 49 of the NPN transistor 35.The short-circuit resistance value is in the range of about 1 to 10 kilohms, and the relationship with hfe of the equivalent NPN transistor 35 is Determine the low resistance value for driving.

Next, a circuit in which a zero-cross trigger function and a DV/DT erroneous ignition prevention function are added to the optical ignition semiconductor switch according to the present invention will be explained with reference to FIGS. 4a and 4b. 60 is an NPN transistor that is conductive except near the zero cross of the AC voltage applied to the AC electrode terminals 6 and 7, and short-circuits the emitter and base of the equivalent NPN transistor 35;
9 and 61 are bias resistors for the NPN transistor 60. 29' is a novel zero-cross trigger function circuit block for the optical ignition semiconductor switch of the present invention, which is constructed of these parts. 32' is a dv/
This is a functional block that prevents DT erroneous firing. The basic operation of the zero-cross trigger function circuit block 29' is the same as that of the conventional type zero-cross trigger function circuit block 29 shown in FIG.
By short-circuiting between the bases except for the part near the zero cross of the AC power supply (generally 5 volts or less), the transistor operation is killed and the current positive feedback action is stopped.

Finally, N channel enhancement type
Figure 5 shows a circuit with a zero-cross trigger function using MOS-FET. FIG. 5a shows the source (S) and drain (D) of an N-channel enhancement type MOS-FET 62 connected to the emitter, base and collector electrodes of the equivalent transistor NPN 35, respectively, in the optically triggered bidirectional semiconductor switch of the present invention. and a gate (G) electrode are connected. Equivalent transistor of PNPN switch
The technology of connecting MOS-FETs in this way between the emitter and base to perform zero-cross triggering is already known, but in the case of the present invention, one MOS-FET
The feature is that by using , both have zero cross trigger function.

FIG. 5b shows the N-channel MOS-FET6
2, the other active elements 33, 34, 35, 3
Similar to 6 and 37, this is a cross-section model constructed using a monolithic integrated structure on the surface of a silicon wafer, which is common to selective diffusion of impurities and metal wiring technology, and is shown in correspondence with an equivalent connection circuit. 63 is equivalent
A P-type region where diffusion is performed simultaneously with the P-type diffusion layer 48 which is the base layer of the NPN transistor 35;
64 and 65 are N ⁺ layers formed by simultaneous diffusion with N ⁺ type diffusion layers 66 and 49, respectively, and are N channel MOS.
-The drain (D) and source (S) of FET62. 66 is an N ⁺ diffusion layer 68, 69, for obtaining good ohmic contact between the insulated gate electrode 67 provided on the top of the gate dielectric (generally an insulating layer made of SiO ₂ ) and the wiring metal 68 for conductive connection; 70,
Reference numeral 71 indicates a portion corresponding to a wiring metal connecting each electrode. Let us briefly describe the zero-cross trigger operation and characteristics of this MOS-FET. N-channel enhancement type MOS-
When the gate bias of FET62 is zero,
If the channel does not exist and increases up to a certain bias voltage and exceeds the so-called threshold voltage,
An inversion layer is formed directly under the gate, and a channel is induced between the source (S) and drain (D). As the bias becomes deeper, the resistance of the induced channel layer decreases, and as a result, the bypass current to the source (S) and drain (D) increases, and finally the equivalent
The transistor operation of the NPN transistor 35 is killed, the current positive feedback action is stopped, and conduction is ensured from the zero-crossing point of the AC power supply voltage in response to the irradiation of the trigger optical signal 12, similarly to the already explained FIGS. 2a and 4a. do. This type of zero-cross trigger has the characteristic that the leakage current between the electrodes 6 and 7 is extremely small even when the trigger optical signal 12 is not irradiated, so-called AC voltage is blocked between the electrodes 6 and 7. There is. In both FIG. 2a and FIG. 4a, a bias current of several milliamperes constantly flows even in the blocked state due to the bias resistors forming the zero-cross trigger function blocks 29, 29'.

The configuration and operation of the present invention have been explained above using a common embodiment in which the polarity of each active element is fixed.
Even if the polarity is completely reversed, the basic function and operational configuration are the same.

Lastly, in the case of TRIAC inductive load control, the commutation critical voltage rise rate (dt/
dt) The malfunction is not a problem with this TRIAC ignition bidirectional switch due to its circuit configuration and operating mode. In other words, when the TRIAC that controls the main load becomes conductive, the voltage between the electrodes 6 and 7 of this bidirectional switch changes.
This is because it is clamped by the second voltage between the T ₁ and T ₂ electrodes of the TRIAC. The second voltage between the AC electrode terminals 6 and 7 of the bidirectional switch of the present invention is designed to be larger than the clamp voltage of the TRIAC because the PN junction of the PNPN switch and the equivalent diode operate in series.

As explained above, compared to the conventional device (a bidirectional switch using photo-SCR antiparallel connection), the light receiving element section is a one-chip bidirectional switch formed of one predetermined junction surface, and two In addition to the two AC electrodes, the monolithic integrated circuit configuration uses the emitter and base of an equivalent transistor as electrodes, which can always provide a common bias regardless of the polarity of the applied AC voltage.
In particular, when manufactured as a photocoupled device including a light emitting portion, the mounting and assembly process is simplified, and there are many economic advantages. In addition, the number of components for the zero-cross trigger function and DV/DT false ignition prevention function circuit has been reduced to less than half of that of conventional devices, which is extremely advantageous not only from an economic standpoint but also for circuit applications that require high density. It is. In addition, zero cross
When designing and manufacturing a dedicated trigger switch, it is possible to easily incorporate a zero-cross trigger function with low leakage current using the same manufacturing technology as bipolar transistors using one MOS/FET in the same pellet chip. There are also some advantages.

[Brief explanation of drawings]

Figure 1a shows the main electrode T ₁ for on-conversion of TRIAC.
Figure 1b is a basic circuit configuration diagram in which a light-igniting semiconductor switch is connected between the gate electrode G and the gate electrode G.
FIG. 2 is a circuit diagram illustrating a light-igniting bidirectional semiconductor switch with an SCR antiparallel connection structure. FIGS. 2a and 2b are a circuit diagram of a conventional photo-SCR anti-parallel connected semiconductor switch with a zero-cross trigger function and a DV/DT erroneous firing prevention function, respectively. FIG. 3a is an equivalent circuit diagram of a light-igniting bidirectional switch according to an embodiment of the present invention;
FIG. 3b is a sectional view of a monolithic integrated circuit according to an embodiment of the present invention, FIG. 3c is a structural model diagram of an ion implantation resistor, and FIGS. This is a circuit diagram when a zero-cross trigger function circuit and a capacitor for preventing DV/DT erroneous ignition are added to the power switch. Fifth
Figures a and 5b show an equivalent circuit diagram and a cross section of the integrated circuit in which the zero-cross trigger function is constructed using N-channel MOS-FETs on the same wafer. In these drawings, 1...TRIAC, 2,
3, 4...TRIAC T ₁ , G and T ₂ electrodes, 5...
...light-ignited bidirectional semiconductor switch, 6,7...two AC electrode terminals of the light-ignited bidirectional switch,
8, 13, 22, 23, 26, 27, 28, 5
8,59,61...Resistance, 9...Load, 10...
AC power supply, 11... Light emitting diode, 12, 12
a, 12b...Trigger optical signal, 14...DC power supply, 15...Switch, 16, 17...Photo
SCR, 18, 19... Gate terminal of photo SCR,
20, 21, 60...NPN transistor, 24,
25... Diode, 29, 29'... Zero cross trigger function block, 30, 31... Capacitor, 32, 32'... DV/DT false ignition prevention function block, 33, 34... Equivalent PNP transistor,
35... Equivalent NPN transistor, 36, 37...
... Equivalent diode, 38, 39 ... Emitter and base electrode of equivalent NPN transistor, 40 ... Equivalent implant resistance, 41 ... P-type silicon substrate, 4
1-a, 41-b, 46, 47, 48, 55, 6
3...P-type diffusion layer, 42...N ⁺ buried layer, 43,
44, 45...N type epitaxial diffusion layer, 4
9, 50, 51, 64, 65, 66...N ⁺ type diffusion layer, 52, 53, 54, 57, 68, 69, 7
0,71...Wiring metal department, 56...Ion implantation resistance layer, 62...N channel MOS-
FET, 67...MOS-FET gate metal.

Claims (1)

[Claims] 1 first and second terminals between which a power source to be controlled is connected, a third terminal, a first emitter of one conductivity type, a first base of another conductivity type, and the one conductivity type. a first collector, the first emitter being connected to the first terminal.
, the second emitter of one conductivity type, the second base of the other conductivity type, and the second collector of the one conductivity type, and the second emitter is connected to the second terminal. and the second base and the second collector are connected to the first base and the first collector, respectively.
a third emitter of the other conductivity type, a third base of the one conductivity type, and a third collector of the other conductivity type, and the third emitter has the third emitter of the other conductivity type. 3, the third terminal
has a base connected to the first and second collectors, a third collector connected to the first and second bases, a third transistor connected to the first and second bases, and a first semiconductor region of one conductivity type. A PN junction is formed by the second semiconductor region of the other conductivity type, the first semiconductor region is connected to the third terminal, and the second semiconductor region is connected to the first terminal. A PN junction is formed by the first diode, the third semiconductor region of one conductivity type, and the fourth semiconductor region of the other conductivity type, and the third semiconductor region is connected to the third terminal. . A bidirectional thyristor, wherein the fourth semiconductor region has a second diode connected to the second terminal.