JPH02226709A - J-lead-type surface mounting ic with chip capacitor - Google Patents

J-lead-type surface mounting ic with chip capacitor

Info

Publication number
JPH02226709A
JPH02226709A JP1045220A JP4522089A JPH02226709A JP H02226709 A JPH02226709 A JP H02226709A JP 1045220 A JP1045220 A JP 1045220A JP 4522089 A JP4522089 A JP 4522089A JP H02226709 A JPH02226709 A JP H02226709A
Authority
JP
Japan
Prior art keywords
capacitor
leads
chip
lead
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1045220A
Other languages
Japanese (ja)
Inventor
Yukihiro Anraku
安樂　幸博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1045220A priority Critical patent/JPH02226709A/en
Publication of JPH02226709A publication Critical patent/JPH02226709A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To make one process of surface mounting IC sufficient and to obviate the need of confirming a mounting position of a chip capacitor by previously installing the capacitor on the lower face of the IC. CONSTITUTION:A chip-type capacitor 3 is bonded at a predetermined position on the lower face of a surface-packaging IC 1 having J-shaped leads 2. The capacitor 3 and the leads 2 are designed such that the lower face of the capacitor is present on the same plane with the ends of the leads 2. A printed board 4 is previously provided with electrodes to which the capacitor 3 and the leads 2 are to be soldered, respectively, according to the predetermined positional relationship between the leads 2 and the capacitor 3. The IC 1 and the capacitor 3 are soldered to and packaged on the printed board 4. In this manner, only one packaging operation is required to package the IC on the board and the capacitor 3 can be packaged properly without taking care of its packaging position if the IC 1 is packaged at a correct position.

Description

【発明の詳細な説明】[Detailed description of the invention]

［産業上の利用分野］ 本発明は、Ｊ型リードを有する表面実装型ＩＣに関する
。 特に、チップ型コンデンサを下面に接着したＪリード型
表面実装置Ｃに関するものである。 ［従来の技術］ 近年１表面実装型の部品が多く使われるようになってき
ている。 そして１表面実装型プリント基板においては、実装面積
を狭くするために、デカップリングコンデンサｉ　Ｊリ
ード型表面実装置Ｃの下面とプリント基板上面とで形成
される間隙を利用してＪリード型ＩＣの下に実装するこ
とが行なわれている。 この場合の実装手順としては、まず、クリーム半田をプ
リント基板に付着し、次いでチップ型コンデンサ奄プリ
ント基板上に載せ、その後、Ｊリード型表面実装型ＩＣ
をチップ型コンデンサの上に覆うようにして実装し半田
付け（リフロー）している。[Industrial Application Field] The present invention relates to a surface mount IC having a J-type lead. In particular, it relates to a J-lead type surface-mounted device C having a chip-type capacitor bonded to its bottom surface. [Prior Art] In recent years, many surface-mounted components have come into use. In order to reduce the mounting area on a surface mount type printed circuit board, the gap formed between the bottom surface of the decoupling capacitor i and the top surface of the printed circuit board is used to mount the J-lead type IC. The implementation below is being done. The mounting procedure in this case is to first apply cream solder to the printed circuit board, then place the chip type capacitor on the printed circuit board, and then place the J-lead type surface mount type IC on the printed circuit board.
The capacitor is mounted on top of the chip capacitor and soldered (reflowed).

【解決すべき課題】【Problems to be solved】

上述した従来のチップ型コンデンサと表面実装型ＩＣの
実装では、チップ型コンデンサとＩＣとを別々に実装し
ていたので、実装作業が二回必要になるという問題があ
った。 また、ＩＣを実装した後は、チップコンデンサが見えな
くなるので、コンデンサが正しい位置に実装されている
かどうかを確認することができないという問題があった
。 本発明は上述した問題点にかんがみてなされたもので、
実装作業が一回で済み、しかもコンデンサの実装位置を
確認する必要のないチップコンデンサ付Ｊリード型表面
実装置Ｃの提供を目的とする。 ［課題の解決手段］ 上記目的を達成するために本発明は、Ｊ型り一ドを有す
る表面実装型ＩＣであって、プリント基板に実装される
ときにプリント基板上面とＩＣ下面とで形成される間隙
と同じ厚さを有するチップ型コンデンサを下面に接着し
た構成としである。 ［実施例１ 以下、本発明の一実施例について図面を参照して説明す
る。 第１図は本発明に係るチップコンデンサ付Ｊリード型表
面実装置Ｃの一実施例をプリント基板に実装する状態を
示す正面図である。 同図において、ｌは表面実装型ＩＣであり。 Ｊ型リード２を有している。 ３はチップ型コンデンサであり、前記ＩＣＩの下面の決
められた位置に接着されている。 モして、コンデンサ３の下面と、Ｊ型リード２の先端と
は、図中の破線で示すように、−線上に位置するように
設定されている。すなわち、コンデンサ３は、ＩＣＩが
プリント基板に実装されるときにプリント基板上面とＩ
Ｃ下面とで形成される間隙と同じ厚さを持っている。 ４はプリント基板であり、このプリント基板４上に前記
ＩＣＩとコンデンサ３とが実装される。このため、プリ
ント基板４には、あらかじめ定められたＪ型リード２と
、コンデンサ３の位置関係に従い、コンデンサ３が半田
付される電極とＪ型リード２が半田付される電極が設け
られている。５はその電極上に付着されたクリーム半田
である。 以上のような表面実装型ＩＣＩによれば、ＩＣＩの下腹
部にチップ型コンデンサ３が装着されているので、プリ
ント基板４への実装作業が一回で済み、しかもＩＣＩさ
え正しい位置に実装されていれば、その下にあらかじめ
装着されているコンデンサ３の実装位置を気にする必要
が無いという利点がある。 【発明の、争果］ 以上説明したように本発明は、あらかじめ表面実装型Ｉ
Ｃの下腹部にチップ型コンデンサを装着することにより
、基板実装時部品搭載の作業が従来の半分である一回で
済み、ＩＣさえ正しい位置に実装されていれば、コンデ
ンサの実装位置を確認する必要がないという効果がある
。In the above-described conventional mounting of a chip capacitor and a surface mount IC, the chip capacitor and the IC were mounted separately, so there was a problem in that the mounting work was required twice. Furthermore, since the chip capacitor is no longer visible after the IC is mounted, there is a problem in that it is impossible to confirm whether the capacitor is mounted in the correct position. The present invention has been made in view of the above-mentioned problems.
To provide a J-lead type surface-mounted device C with a chip capacitor that requires only one mounting work and does not require checking the mounting position of the capacitor. [Means for Solving the Problems] In order to achieve the above object, the present invention provides a surface-mounted IC having a J-shaped lead, which is formed by an upper surface of the printed circuit board and a lower surface of the IC when mounted on a printed circuit board. A chip type capacitor having the same thickness as the gap is bonded to the bottom surface. [Embodiment 1] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a front view showing a state in which an embodiment of a J-lead type surface real device C with a chip capacitor according to the present invention is mounted on a printed circuit board. In the figure, l is a surface-mounted IC. It has a J-type lead 2. 3 is a chip type capacitor, which is bonded to a predetermined position on the bottom surface of the ICI. Furthermore, the lower surface of the capacitor 3 and the tip of the J-type lead 2 are set to be located on the - line, as shown by the broken line in the figure. That is, when the ICI is mounted on the printed circuit board, the capacitor 3 is connected to the top surface of the printed circuit board.
It has the same thickness as the gap formed with the lower surface of C. 4 is a printed circuit board, on which the ICI and the capacitor 3 are mounted. For this reason, the printed circuit board 4 is provided with an electrode to which the capacitor 3 is soldered and an electrode to which the J-shaped lead 2 is soldered, according to a predetermined positional relationship between the J-shaped lead 2 and the capacitor 3. . 5 is cream solder deposited on the electrode. According to the surface mount type ICI as described above, since the chip capacitor 3 is mounted on the lower part of the ICI, the mounting work on the printed circuit board 4 is only required once, and even the ICI is mounted in the correct position. If so, there is an advantage that there is no need to be concerned about the mounting position of the capacitor 3 that is previously mounted below. [Results of the Invention] As explained above, the present invention has a surface mount type I in advance.
By attaching a chip-type capacitor to the lower abdomen of the C, the work of mounting components on the board can be done only once, which is half of the conventional work.If the IC is mounted in the correct position, the mounting position of the capacitor can be confirmed. The effect is that it is not necessary.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明に係るチップコンデンサ付Ｊリード型表
面実装置Ｃの一実施例をプリント基板に実装する状態を
示す正面図である。 １：表面実装型ＩＣ ２：Ｊｙ！ｉリード ３：チップ型コンデンサ ４ニブリント基板 ５：クリームハンダ 代理人　弁理士　渡　辺　喜　平FIG. 1 is a front view showing a state in which an embodiment of a J-lead type surface real device C with a chip capacitor according to the present invention is mounted on a printed circuit board. 1: Surface mount IC 2: Jy! i-lead 3: Chip type capacitor 4 Niblint board 5: Cream solder agent Patent attorney Kihei Watanabe

Claims (1)

【特許請求の範囲】[Claims] 　Ｊ型リードを有する表面実装型ＩＣであって、プリン
ト基板に実装されるときにプリント基板上面とＩＣ下面
とで形成される間隙と同じ厚さを有するチップ型コンデ
ンサを下面に接着したことを特徴とするチップコンデン
サ付Ｊリード型表面実装ＩＣ。A surface mount IC with J-type leads, characterized by having a chip-type capacitor bonded to the bottom surface with the same thickness as the gap formed between the top surface of the printed circuit board and the bottom surface of the IC when mounted on a printed circuit board. J-lead type surface mount IC with chip capacitor.
JP1045220A 1989-02-28 1989-02-28 J-lead-type surface mounting ic with chip capacitor Pending JPH02226709A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1045220A JPH02226709A (en) 1989-02-28 1989-02-28 J-lead-type surface mounting ic with chip capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1045220A JPH02226709A (en) 1989-02-28 1989-02-28 J-lead-type surface mounting ic with chip capacitor

Publications (1)

Publication Number Publication Date
JPH02226709A true JPH02226709A (en) 1990-09-10

Family

ID=12713185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1045220A Pending JPH02226709A (en) 1989-02-28 1989-02-28 J-lead-type surface mounting ic with chip capacitor

Country Status (1)

Country Link
JP (1) JPH02226709A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015146436A (en) * 2007-11-26 2015-08-13 エーティーアイ・テクノロジーズ・ユーエルシーＡｔｉ Ｔｅｃｈｎｏｌｏｇｉｅｓ Ｕｌｃ chip capacitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015146436A (en) * 2007-11-26 2015-08-13 エーティーアイ・テクノロジーズ・ユーエルシーＡｔｉ Ｔｅｃｈｎｏｌｏｇｉｅｓ Ｕｌｃ chip capacitor

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