JPS60201696A - Method of soldering flt package - Google Patents

Method of soldering flt package

Info

Publication number
JPS60201696A
JPS60201696A JP59059991A JP5999184A JPS60201696A JP S60201696 A JPS60201696 A JP S60201696A JP 59059991 A JP59059991 A JP 59059991A JP 5999184 A JP5999184 A JP 5999184A JP S60201696 A JPS60201696 A JP S60201696A
Authority
JP
Japan
Prior art keywords
package
soldering
flat package
circuit board
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59059991A
Other languages
Japanese (ja)
Inventor
高本 勲
薮崎 俊一
護 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59059991A priority Critical patent/JPS60201696A/en
Publication of JPS60201696A publication Critical patent/JPS60201696A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はフラ、)パッケージの半田付方法に関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for soldering packages.

従来例の構成とその問題点 従来、フラットパッケージをプリント基板に半田付けす
るに際しては、先ずプリント基板上に形成した銅箔パタ
ーンの上に、クリーム半田を印刷により載せ、その上に
フラットパッケージを載せてフロー半田付をしていた。
Conventional configuration and its problems Traditionally, when soldering a flat package to a printed circuit board, cream solder was first placed on a copper foil pattern formed on the printed circuit board by printing, and then the flat package was placed on top of that. I was using flow soldering.

クリーム半田はプリント基板上のパターン及びフラット
パッケージのリード端子との相対位置精度が必要である
が、この方法を用いた場合にはプリント基板位置ずれ、
印刷版の歪み等により、正確に印刷することは困難であ
った。
Cream solder requires relative positional accuracy between the pattern on the printed circuit board and the lead terminals of the flat package, but when using this method, there is no possibility of misalignment of the printed circuit board,
It was difficult to print accurately due to distortion of the printing plate.

たとえば第1図に示すように版11上に載せたクリーム
半田12をスキージ゛13により、プリント基板14の
パターン15上に印刷していた。しかし前述したように
位置ずれが発生し、第2図に示すように正確な半田付け
を行なうことができなかった0 なお16はフラットパッケージ、17はその端子である
。
For example, as shown in FIG. 1, cream solder 12 placed on a plate 11 was printed on a pattern 15 of a printed circuit board 14 using a squeegee 13. However, as described above, misalignment occurred and accurate soldering could not be performed as shown in FIG. 2. Note that 16 is a flat package and 17 is its terminal.

まだクリーム半田を印刷しない方法も採用することがで
きる。すなわちフラットパッケージリード端子同様プリ
ント基板パターンにも半田メ、フキもしくは半田コーテ
ングをしておいて、パ、フケージを載せ加熱溶融半田付
していた。しかしながらこの方法はフラックス塗布とパ
ッケージの位置規正もしくは保持機能が必要となり複雑
な工程となり、作業性の悪いものであった。
It is also possible to adopt a method that does not print cream solder. That is, similar to the flat package lead terminal, the printed circuit board pattern is also coated with solder, foil, or solder coating, and then a solder paste is placed on it and the solder is heated and melted. However, this method required flux application and a package position adjustment or holding function, resulting in a complicated process and poor workability.

発明の目的 本発明はこれらの問題を解決し、簡単にしかも正常な半
田付けを行うことを目的とする。
OBJECTS OF THE INVENTION It is an object of the present invention to solve these problems and to perform simple and normal soldering.

発明の構成 本発明はパッケージ側のリード端子に予めクリーム半田
を付着させた後、プリント基板に半田付けを行なうこと
により上記目的を達成するものである。
Structure of the Invention The present invention achieves the above object by applying cream solder to the lead terminals on the package side in advance and then soldering them to the printed circuit board.

実施例の説明 以下に本発明の実施例について説明する。Description of examples Examples of the present invention will be described below.

第3図〜第5図において、1はリード端子2を有するフ
ラットパッケージ、3はクリーム半田、4はフラットパ
ッケージ1を保持する吸着ヘッド、6はクリーム半田を
入れ、その表面が水平となる状態に保持した容器である
。
In Figures 3 to 5, 1 is a flat package having lead terminals 2, 3 is cream solder, 4 is a suction head that holds flat package 1, and 6 is cream solder, and its surface is horizontal. It is a container that holds

先ず第3図に示すように吸着へラド4によりフラットパ
ッケージ1を保持し、第4図に示すように端子2がクリ
ーム半田3に接する位置まで下降させる。再び吸着ヘッ
ド4を上昇させることにより第6図に示すように端子2
の裏面、端面にクリーム半田を付着させることができる
。
First, the flat package 1 is held by the suction pad 4 as shown in FIG. 3, and is lowered to a position where the terminals 2 contact the cream solder 3 as shown in FIG. By raising the suction head 4 again, the terminal 2 is removed as shown in FIG.
Cream solder can be applied to the back and end surfaces of the

このように加工されたパッケージ1をプリント基板6に
半田付けするに際しては第6図に示すように導電パター
ン7上にパッケージ1の端子2を当接させ、加熱するこ
とにより溶融半田付けを行なうことができる。
When soldering the package 1 processed in this way to the printed circuit board 6, the terminals 2 of the package 1 are brought into contact with the conductive pattern 7 as shown in FIG. 6, and molten soldering is performed by heating. I can do it.

この場合、プリント基板6上にパッケージ1を載せれば
、溶融固定までパッケージ保持する必要がなく、製作工
程の作業が簡単になる。
In this case, if the package 1 is placed on the printed circuit board 6, there is no need to hold the package until it is melted and fixed, which simplifies the manufacturing process.

発明の効果 上記実施例より明らかなように本発明によれば印刷の精
度アップ、及び機種別板の製作等は不要となシ、また溶
融固定までパッケージを保持する必要がなくなりその効
果は大きい。
Effects of the Invention As is clear from the above embodiments, the present invention has great effects because it improves printing accuracy, eliminates the need to manufacture plates for different models, and eliminates the need to hold the package until it is melted and fixed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のクリーム半田を印刷する工程の要部側面
図、第2は同平面図、第3図、第4図はそれぞれ本発明
の一実施例によるフラットパッケージの半田付方法の工
程を示す要部側面図、第6図はフラットパッケージの側
面図、第6図は他の工程における要部側面図である。 1・・・・・・フラットパッケージ、2・・・・・・端
子、3・・・・・・クリーム半田、6・・・・・・プリ
ント基板。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名邪1
図 第2図 第3図
FIG. 1 is a side view of the main part of the conventional process of printing cream solder, FIG. 2 is a plan view of the same, and FIGS. 3 and 4 each illustrate the steps of a flat package soldering method according to an embodiment of the present invention. FIG. 6 is a side view of the flat package, and FIG. 6 is a side view of the main part in another process. 1... Flat package, 2... Terminal, 3... Cream solder, 6... Printed circuit board. Name of agent: Patent attorney Toshio Nakao and 1 other person
Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] フラットパッケージの端子の少なくともプリント基板当
接面にクリーム半田を付着せしめた後、そのフラットパ
ッケージをプリント基板上に載せ、その後に前記クリー
ム半田を加熱溶融させて前記プリント基板と前記フラッ
トパッケージとを半田付けすることを特徴とするフラッ
トパッケージの半田付方法。
After applying cream solder to at least the contact surface of the printed circuit board of the terminal of the flat package, the flat package is placed on the printed circuit board, and then the cream solder is heated and melted to solder the printed circuit board and the flat package. A flat package soldering method characterized by attaching a flat package.
JP59059991A 1984-03-27 1984-03-27 Method of soldering flt package Pending JPS60201696A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59059991A JPS60201696A (en) 1984-03-27 1984-03-27 Method of soldering flt package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59059991A JPS60201696A (en) 1984-03-27 1984-03-27 Method of soldering flt package

Publications (1)

Publication Number Publication Date
JPS60201696A true JPS60201696A (en) 1985-10-12

Family

ID=13129141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59059991A Pending JPS60201696A (en) 1984-03-27 1984-03-27 Method of soldering flt package

Country Status (1)

Country Link
JP (1) JPS60201696A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63143894A (en) * 1986-12-01 1988-06-16 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Method and apparatus for attaching solder bump to lead wire of electronic device
JPS63178583A (en) * 1987-01-20 1988-07-22 東京生産技研株式会社 Automatic soldering apparatus for flat package integrated device
JPS63115300U (en) * 1987-01-20 1988-07-25
JPS645049A (en) * 1987-06-26 1989-01-10 Fujitsu Ltd Resin sealed semiconductor device
JPH01187787A (en) * 1988-01-20 1989-07-27 Matsushita Electric Ind Co Ltd How to solder hybrid integrated circuits
JPH01298793A (en) * 1988-05-27 1989-12-01 Abisare:Kk Method of mounting chip component

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63143894A (en) * 1986-12-01 1988-06-16 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン Method and apparatus for attaching solder bump to lead wire of electronic device
JPS63178583A (en) * 1987-01-20 1988-07-22 東京生産技研株式会社 Automatic soldering apparatus for flat package integrated device
JPS63115300U (en) * 1987-01-20 1988-07-25
JPS645049A (en) * 1987-06-26 1989-01-10 Fujitsu Ltd Resin sealed semiconductor device
JPH01187787A (en) * 1988-01-20 1989-07-27 Matsushita Electric Ind Co Ltd How to solder hybrid integrated circuits
JPH01298793A (en) * 1988-05-27 1989-12-01 Abisare:Kk Method of mounting chip component

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