JPH02228124A - Load driving circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to load driving circuits, and furthermore, to power MOSFETs.
The present invention relates to techniques that are effective when applied to power drive circuits using field effect transistors (field effect transistors), for example, techniques that are effective when applied to on/off and speed control of motors.

[Conventional technology] FIG. 2 shows an example of the configuration of a conventional load drive circuit.

The load drive circuit shown in the same figure has p-channel power MOSFET Mp1, Mp that is DC-driven on/off by an 0N10FF drive circuit 11.12.
2, and an n-channel power MO3FET that is AC-activated on and off by PWM drive circuits 21 and 22.
Mn 1. Build a bridge circuit using Mn2, connect the power supply Vdd to the power supply terminal of this bridge circuit, connect a load 3 such as a motor to the balanced terminal, and connect the current line from the power supply Vdd to Mpl and Mnl. 1 or Mp2. A load 3 such as a motor can be driven in either the forward or reverse direction by the current 2 passing through Mn2.

Here, p-channel power MOSFET Mp1, Mp
2 is connected from the 0N10FF drive circuit 11°12 to the transistor Q1. Only the on/off driving of the power supply to the load 3 is performed by the DC gate control voltage applied via Q2. On the other hand, n-channel power MOSFET
Mnl and Mn2 continuously switch and control the magnitude of power supplied to the load 3 using pulse width modulated alternating current gate control voltages output from the PWM drive circuits 21 and 22.

This type of load drive circuit uses a MOSFET that can be driven by voltage, so it has the advantage that it can be driven with low power due to its high impedance. For example, in the circuit shown in Figure 2, 0N10
The output of the FF drive circuit 11.12 is transmitted through small power transistors Ql, Q2, and resistors R11, R21.
, R12, and R22, the power MO3FETMp1. It is now possible to drive Mp 2 (for example, "Integrated Circuit Engineering (2)" published by Corona Co., Ltd., Hisayoshi Yanai, Ei 1).
Co-authored, p139. (Refer to issue dated June 20, 1978).

[Problems to be Solved by the Invention] However, the inventors have found that the above-mentioned technique has the following problems.

That is, the MOSFET has some parasitic interelectrode capacitances Cgd and Cgs between its gate and drain and between its gate and source. For this reason, for example, in the load drive circuit shown in FIG. 2, both Mpl and Mnl are turned off steadily, Mp2 is turned on constantly, and Mn2 is driven by alternating current switching with a pulse width modulated pulse voltage. As shown by the dotted arrow in Figure 1, when
The pulse voltage generated on the drain side of n2, that is, on the load 3 side, circulates to the gate side of Mpl via the gate-drain capacitance Cgd of Mpl. As a result, Mpl, which should be in an off state, is driven on, and a through current may flow through Mpl and Mn2. Problems such as this arise. Such a problem similarly occurs on the MpZ side.

As a means to solve the above-mentioned problem, Mpl.

It is conceivable to perform on/off driving of Mp2 with sufficiently low impedance. However, in this case,
Another problem arises in that a large drive power is required, increasing the power burden on the 0N10 FF driver 41 circuit 11.12.

It is an object of the present invention to
Interposed in series between the power supply and the load to turn on and off the power supply to the load.
It is an object of the present invention to provide a technique for reliably maintaining the off state of a power MOSFET to be off-controlled.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for Solving the Problems] Representative inventions disclosed in this application will be summarized as follows.

That is, two power MO3FEs are connected between the load and the power supply.
In a drive circuit in which T is interposed in series, one FET is driven on and off with direct current, and the other FET is driven on and off with alternating current using a pulse signal. This involves adding a capacitor in parallel between the gate and source.

[Operation] According to the above-mentioned means, for a power MO3FET that is driven on and off by direct current, the AC impedance between the gate and source is significantly lower than that between the gate and drain, so that the power MO3FET is The pulse voltage that wraps around to the gate side via the gate-drain capacitance is
Most of it will be bypassed to the source side. As a result.

A power MOSFET that is driven on and off by direct current will not be erroneously driven even if a pulse voltage appears on its drain side, and will be able to reliably maintain an off state when not driven.

On the other hand, the impedance between the gate and source of the above FET is low in alternating current, but high impedance in direct current.

Even a small output drive circuit can reliably perform on/off driving.

This achieves the objective of ensuring that the power MO5FET, which is interposed in series between the power supply and the load and controls the on/off of power supply to the load, can be kept in the off state without increasing the load on the drive circuit. be done.

[Embodiments] Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

FIG. 1 shows an embodiment of a load driving circuit to which the technology of the present invention is applied.

The load drive circuit of the embodiment shown in the same figure first consists of 0N10
DC ON/OFF by F F driver 11 circuit 11.12
Off-driven p-channel power MOSFET Mp
1. Mp 2 and n-channel power M driven on and off AC by PWM drive circuits 21 and 22.
OSFETMn 1. A bridge circuit is formed by Mn2.

This bridge circuit has a power supply Vdd connected to its power supply terminal, and a load 3 such as a motor, for example, to its balanced terminal. As a result, current line 1 or Mp2. Mn2
A load 3 such as a motor can be driven in either the forward or reverse direction by the current 2 passing through.

p channel power MO5FET Mp 1. MP2 is
Only the on/off control of the power supply to the load 3 is performed by the DC gate control voltage applied from the 0N10FF driver 11 circuit 11.12 via the transistors Ql and Q2. On the other hand, n-channel power MO'SFET
Mn1. Mn2 continuously switches and controls the magnitude of the power supplied to the load 3 using a pulse width modulated alternating current gate control voltage output from the PWM drive circuits 21 and 22.

Here, the power supply is turned on and off using a DC gate control voltage.
P-channel power MOSFET that performs only off control
Mp1. Regarding Mp2, a capacitor Ca is externally added in parallel between its gate and source. The capacitance value of this capacitor Ca is equivalently added to the gate-source capacitance Cgs that the FETs Mpl and Mp2 originally have. The capacitance value of the capacitor Ca is set so that the added gate-source capacitance (Ca+Cgs) is sufficiently larger than the gate-drain capacitance Cgd.

Next, the operation will be explained.

First, the above-described load drive circuit uses a MOSFET that can be driven by voltage, so that it can be driven with low power due to its high impedance. That is, the outputs of the 0N10FF drive circuits 11 and 12 are transmitted by the low power transistors Ql and Q2.

By appropriately level shifting the resistors R11, R21, R12, and R22, the power MOSFET M P1
s M p 2 can be driven.

Furthermore, in addition to the advantages described above, the load drive circuit of the embodiment can provide the following effects. That is,
P-channel power MO driven on and off by direct current
3FETMp 1. Regarding Mp 2, its gate
The AC impedance between the source is significantly lower than that between the gate and drain. Therefore, most of the voltage that flows from the drain side to the gate side via the gate-drain capacitance Cds is the gate-drain capacitance (Cds).
Ca+Cgs) causes it to be bypassed to the source side. As a result, the p-channel power M OS F E T M p1 * Mp which is driven on and off by direct current
Regarding No. 2, even if a pulse voltage appears on the drain side, it will not be erroneously driven, and the off state can be reliably maintained when not driven. On the other hand, n-channel power MOSFET Mn that is driven on and off AC
1. Regarding Mn2, the impedance between its gate and source is low in AC, but high in DC, so even a high impedance, low output drive circuit can reliably turn on and off. can do.

As a result, a power MOSFET that is interposed in series between the power supply Vcc and the load 3 and controls the power supply to the load 3 on and off without increasing the load on the drive circuits 11 and 12.
It becomes possible to reliably maintain the off state of PI and Mp2.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor.

For example, the load drive circuit does not necessarily have to be of a bridge type, and may have, for example, a single-ended push-pull type circuit configuration.

In the above explanation, the invention made by the present inventor was mainly applied to a motor drive circuit, which is the background field of application. can also be applied.

[Effects of the Invention] The effects obtained by typical inventions disclosed in this application are briefly explained below.

That is, it becomes possible to reliably maintain the off state of the power MOSFET that is interposed in series between the power supply and the load and controls the on/off of power supply to the load, without increasing the load on the drive circuit. This effect can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a schematic configuration of a load driving circuit according to an embodiment of the present invention, and FIG. 2 is a diagram showing an example of the configuration of a conventional similar type of load driving circuit. 11.12-...B'7-A drive circuit that drives the M08FET on and off in a direct current manner, 21.22...A')-A drive circuit that drives the MOSFET on and off in an alternating current manner, 3... Load of motor etc., Mpl, M
p2: p-channel power MOSFET that controls on/off power supply to the load, Mnl, Mn2: n-channel power MOSF that controls power supply to the load
ET, Cgd...Gate-drain capacitance, Cg
s...gate-source capacitance, Ca...additional capacitance. Figure 1 Figure 2

Claims (1)

[Claims] 1. Two power MOSFETs are interposed in series between the load and the power source, one FET is driven on and off with direct current, and the other FET is driven on and off with alternating current. A load driving circuit configured such that one of the above FEs
A load dynamic circuit characterized by adding a capacitor in parallel between the gate and source of a T. 2. Two power MOSFETs are interposed in series between the load and the power supply, and a DC control voltage is applied to the gate of one FET to control the power supply to the load on and off, and a power MOSFET is applied to the gate of the other FET. A load drive circuit configured to control power supplied to the load by applying a pulse width modulated pulse voltage, characterized in that a capacitor is added in parallel between the gate and source of one of the FETs. An additional drive circuit according to claim 1. 3. Power MOSFET driven on and off by direct current
A load driving circuit that supplies power to a load and controls the supplied power by a bridge circuit configured using a power MOSFET that is driven on and off in an alternating current manner,
3. The load drive circuit according to claim 1, wherein a capacitor is added in parallel between the gate and source of the FET which is driven on and off in a direct current manner.