JPH02230456A - Data dependence relation detection type multiprocessor - Google Patents

Abstract

PURPOSE:To eliminate the load for scattering of processes and for control of synchronization and to improve the processing speed when a conflict of accesses is produced by providing a memory access control circuit which can identify the data dependence relation. CONSTITUTION:A multiprocessor consists of processors 10 - 1N, an access request arbitrating means 20, a memory 30, a selection means 40, an address comparison means 50, a buffer 60, and a memory access control circuit including the address transfer means 70 and 80. If the access requests have a conflict to the shared memory 30, the access order is decided according to the scattering method of the processing contents and the data dependence relation that is decided by a memory address. As a result, the scattering of processes due to the software and the control of synchronization are not required. Then the overall system processing speed is improved.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to multiprocessors, and in particular, dynamically detects data dependencies and determines the access order based on an appropriate method of distributing and synchronizing processing contents. This invention relates to a high-speed multiprocessor using a memory access control method that defines

[Prior Art 1] As shown in FIG. 2, in conventional memory access control, when arbitrating competing access requests such as update and reference to the memory 30 shared by the processors 10 to IN, The access request arbitration means 20 receives the access requests R1 to Rn and grants access rights according to a predetermined arbitration algorithm, such as first-come-first-served basis or processor number order.

When the processor to which the access right is granted is determined by the arbitration algorithm, the access request arbitration means 20 instructs the selection means 40 to that effect and selects the access request addresses A1 to An.
The access request address related to the processor to which the access right is to be granted is selected from the list and inputted to the memory 30 as an address signal A for access execution. At this time, at the same time, the access request arbitration means 20 returns an access request acceptance signal (Kl to Kn) to the processor that has granted the access right. Transfer it to the memory 30 as signal D,
In the case of data reference, it is taken in as a reference data signal D.

[Invention or problem to be solved] - In the conventional memory access control method described above, if there is a data dependency relationship on the shared memory, that is, if those accesses are to the same address, (1) a certain update is Must be done after some other update.

(2) Some references must occur after some other updates.

(3) Certain updates must occur after certain other references.

Because it was not possible to identify these relationships, software was used to manage the distribution and synchronization of processing in a way that guaranteed these data dependencies by setting tags and flags. The drawback is that speed is limited.

[Means for Solving the Problems] The data dependency detection type multiprocessor of the present invention is capable of distributing data determined by a method of distributing processing contents and a memory address when there are conflicting access requests to a shared memory. This problem is solved by having a memory access control circuit that determines the access order based on dependencies.

[Operation] Processing contents are appropriately distributed to the processors in advance so that the access order can be determined in the event of access conflict and data dependency is detected, and the processors are operated in synchronization with each other as appropriate. When an access request is generated, each processor issues the access request all at once at a certain timing.

By comparing the addresses of access requests, the memory access control circuit included in the multiprocessor of the present invention
When the existence of a data dependency relationship is detected, the access order is determined based on the initial distribution method of processing contents, for example by paying attention to the processor number, and correct processing is realized as a whole.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a data dependency detection type multiprocessor of the present invention.

This multiprocessor includes processors 10 to IN, and a memory access control circuit composed of access request arbitration means 20, memory 30, selection means 40, address comparison means 50, huffer 60, and address transfer means 70 and 80. There is.

The access request arbitration means 20 receives memory access request signals R1 to RN issued by the processors 10 to IN, and determines access priority by checking the processor number of the processor that issued the access request when access to the memory 30 conflicts. , sequentially send back memory access request acceptance signals K1 to KN to the processor. The selection means 40 transfers the access request addresses A1 to AN related to the access requests issued by each processor to the address transfer means 70 in the order determined by the access request arbitration means 20. The address comparison means 5o receives the address from the address transfer means 70, compares the address with the address stored in the buffer 60, checks the data dependency relationship, and transfers the address to the address if there is no data dependency relationship. The means 70 and 80 select and transfer the address to the memory 30 as an address signal A, and if there is a data dependency, the address transfer means 70 is instructed to transfer the address to the buffer 60.

Next, the operation of this embodiment will be explained.

First, when the access request arbitration means 20 receives an access request for data update or reference from a plurality of processors,
The access priority is determined by checking the processor number of the processor that issued the access request. Subsequently, addresses related to each access request are selected by the selection means 40 in accordance with the order, and sequentially sent to the address comparison means 50, where they are compared with the addresses in the buffer 60 to check data dependence. Here, if there is no dependency relationship, the data is transferred as is to the memory 30 as the address signal A, and in the case of updating, the corresponding processor outputs the write data as the data signal D to update the data of the target address and refer to it. In this case, the data at the target address in the memory 30 is taken in as the data signal D. Furthermore, if there is a data dependency, this address is temporarily stored in the buffer 60, and priority is given to access corresponding to the address previously stored in the buffer 60.

[Effects of the Invention] As explained below, the present invention operates synchronously as appropriate,
If there is an access conflict, you can check the data dependencies.
By distributing processing so that it is determined which access has priority, and by providing a memory access control circuit that can identify this data dependency, it is possible to distribute processing and manage synchronization to ensure data dependence. The load is gone,
It has the effect of improving processing speed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a data dependency detection type multiprocessor of the present invention, and FIG. 2 is a block diagram showing a conventional example. 10-IN... Processor, 20... Access request arbitration means,
30・・・・・・・・・Memory, 40...
・・・Selection means, 50・・・・・・・・・Atres comparison means, 60・・・・・・・・・Puffer,
70. 80...Address transfer means.

Claims (1)

[Claims] 1. In a multiprocessor in which multiple processors share a memory and operate in synchronization as appropriate, when access requests to the memory conflict, a method for distributing processing contents and data determined by memory addresses are provided. A data dependency detection type multiprocessor having a memory access control circuit that determines access order based on dependency relationships.