JPH02230738A - Tungsten wiring - Google Patents
Tungsten wiringInfo
- Publication number
- JPH02230738A JPH02230738A JP5140889A JP5140889A JPH02230738A JP H02230738 A JPH02230738 A JP H02230738A JP 5140889 A JP5140889 A JP 5140889A JP 5140889 A JP5140889 A JP 5140889A JP H02230738 A JPH02230738 A JP H02230738A
- Authority
- JP
- Japan
- Prior art keywords
- film
- tungsten wiring
- present
- tungsten
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 title claims description 12
- 229910052721 tungsten Inorganic materials 0.000 title claims description 12
- 239000010937 tungsten Substances 0.000 title claims description 12
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 238000000034 method Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229910016006 MoSi Inorganic materials 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
[産業上の利用分野コ
本発明は、集積回路装置におけるタングステン配線構造
K関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a tungsten wiring structure K in an integrated circuit device.
[発明が解決しようとする課題]
しかし、上記従来技術によると、W膜が下地S102膜
等との接着力が弱く、剥離すると云う課題があった。[Problems to be Solved by the Invention] However, according to the above-mentioned prior art, there was a problem in that the W film had a weak adhesive force with the underlying S102 film, etc., and could peel off.
本発明は、かかる従来技術の課題を解決し、タングステ
ン配線におげるW膜の下地S102膜等の絶縁膜との接
着力を向上する新しいタングステン配線Wt造を提供す
る事を目的とする。It is an object of the present invention to solve the problems of the prior art and to provide a new tungsten wiring Wt structure that improves the adhesion of the W film to the underlying insulating film such as the S102 film in the tungsten wiring.
[課題を解決するための手段コ
上記課題を解決するために本発明は、タングステン配線
に関し、WSi,TiW,TiN,Si,Ti ,Mo
又はMoSi膜とW膜とを多層に形成する手段を取る。[Means for Solving the Problems] In order to solve the above problems, the present invention relates to tungsten wiring, and uses WSi, TiW, TiN, Si, Ti, Mo.
Alternatively, a method of forming a multi-layered MoSi film and W film is taken.
?従来の技術]
従来、集積回路装置におけるタングステン配線は、Si
O■膜等の絶縁膜上にW膜をスバッタ蒸着法あるいはO
VD法等により形成して成るのが通例であった。? Conventional technology] Conventionally, tungsten wiring in integrated circuit devices is made of Si.
A W film is deposited on an insulating film such as an O film using a sputter deposition method or an O film.
It was customary to form it by a VD method or the like.
[実施例] 以下、実施例により本発明を詳述する。[Example] Hereinafter, the present invention will be explained in detail with reference to Examples.
第1図及び第2図は本発明の実施例を示す半導体集禎回
路装置忙おけるタングステン配線の断面図である。1 and 2 are cross-sectional views of tungsten wiring in a semiconductor integrated circuit device showing an embodiment of the present invention.
?1図では、81基板1の表面に形成されたS i O
!+膜2の表面に、WSi,TiW’,TiN,Si
,Ti,Mo又はMoSi膜から成る下地膜6が形成さ
れ、更にその上にW膜4が積層して形成されて成る。? 1, 81 S i O formed on the surface of the substrate 1
! + WSi, TiW', TiN, Si on the surface of film 2
, Ti, Mo, or MoSi film is formed, and a W film 4 is further laminated thereon.
第2図では、81基板11の表面に形成されたS i
O2膜12の表面からコンタクト穴又はトレンチが形成
され、該、コンタクト穴又はトレンチの側面を含む表面
にW S i , Ti W. , T i N ,S
i,Ti,Mo又はMOSi膜から成る下地膜13が形
成され、更にその上にW膜14が形成されて成る訳であ
るが、該、下地膜13とW膜14かも成るタングステン
配線では、SiO■膜12等の絶縁膜のコンタクト穴部
あるいはトレンチ部を除く表面に延在して形成されても
良く、又、W膜14は必ずしもコンタクト穴部あるいは
トレンチ部内部を埋め込む様に形成されなくても良い。In FIG. 2, Si formed on the surface of the 81 substrate 11 is shown.
A contact hole or trench is formed from the surface of the O2 film 12, and W Si , Ti W . , T i N , S
A base film 13 made of i, Ti, Mo, or MOSi film is formed, and a W film 14 is further formed on it. (2) The W film 14 may be formed to extend over the surface of the insulating film other than the contact hole or trench portion, such as the film 12, and the W film 14 does not necessarily have to be formed to fill the contact hole or trench portion. Also good.
尚、下地膜3,13はW膜4,14の上面や側面にも形
成されても良《、この場合は多層タングステン配線の層
間絶縁膜との接着力が向上する作用がある。The base films 3 and 13 may also be formed on the upper and side surfaces of the W films 4 and 14. In this case, the adhesive strength between the multilayer tungsten wiring and the interlayer insulating film is improved.
[発明の効果]
本発明によりタングステン配線の下地絶縁膜との接着力
を向上することができる効果がある。[Effects of the Invention] The present invention has the effect of improving the adhesion of the tungsten wiring to the underlying insulating film.
第1図及び第2図は本発明の実施例を示すタングステン
配線の断面図である。
1 11・・・・・・s1基板
2,12・・・・・・S102膜
3,16・・・・・・下地膜
4,14・・・・・・W膜
以上1 and 2 are cross-sectional views of tungsten wiring showing an embodiment of the present invention. 1 11...s1 substrate 2, 12...S102 film 3, 16...base film 4, 14...W film or more
Claims (1)
i膜とW膜とが多層に形成されて成る事を特徴とするタ
ングステン配線。WSi, TiW, TiN, Si, Ti, Mo or MOS
A tungsten wiring characterized by being formed in multiple layers of an i film and a tungsten film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5140889A JPH02230738A (en) | 1989-03-03 | 1989-03-03 | Tungsten wiring |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5140889A JPH02230738A (en) | 1989-03-03 | 1989-03-03 | Tungsten wiring |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02230738A true JPH02230738A (en) | 1990-09-13 |
Family
ID=12886112
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5140889A Pending JPH02230738A (en) | 1989-03-03 | 1989-03-03 | Tungsten wiring |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02230738A (en) |
-
1989
- 1989-03-03 JP JP5140889A patent/JPH02230738A/en active Pending
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